]> git.proxmox.com Git - mirror_qemu.git/blame - include/hw/ppc/spapr_vio.h
spapr: Treat devices added before inbound migration as coldplugged
[mirror_qemu.git] / include / hw / ppc / spapr_vio.h
CommitLineData
2a6a4076
MA
1#ifndef HW_SPAPR_VIO_H
2#define HW_SPAPR_VIO_H
3
4040ab72
DG
4/*
5 * QEMU sPAPR VIO bus definitions
6 *
7 * Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au>
8 * Based on the s390 virtio bus definitions:
9 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
10 *
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
20 *
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 */
24
9c17d615 25#include "sysemu/dma.h"
ee86dfee 26
3954d33a
AL
27#define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"
28#define VIO_SPAPR_DEVICE(obj) \
29 OBJECT_CHECK(VIOsPAPRDevice, (obj), TYPE_VIO_SPAPR_DEVICE)
30#define VIO_SPAPR_DEVICE_CLASS(klass) \
31 OBJECT_CLASS_CHECK(VIOsPAPRDeviceClass, (klass), TYPE_VIO_SPAPR_DEVICE)
32#define VIO_SPAPR_DEVICE_GET_CLASS(obj) \
33 OBJECT_GET_CLASS(VIOsPAPRDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE)
34
0d936928
AL
35#define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
36#define SPAPR_VIO_BUS(obj) OBJECT_CHECK(VIOsPAPRBus, (obj), TYPE_SPAPR_VIO_BUS)
37
215e2098 38#define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge"
b45d63b6 39
b45d63b6
BH
40typedef struct VIOsPAPR_CRQ {
41 uint64_t qladdr;
42 uint32_t qsize;
43 uint32_t qnext;
44 int(*SendFunc)(struct VIOsPAPRDevice *vdev, uint8_t *crq);
45} VIOsPAPR_CRQ;
46
3954d33a
AL
47typedef struct VIOsPAPRDevice VIOsPAPRDevice;
48typedef struct VIOsPAPRBus VIOsPAPRBus;
49
50typedef struct VIOsPAPRDeviceClass {
51 DeviceClass parent_class;
52
53 const char *dt_name, *dt_type, *dt_compatible;
54 target_ulong signal_mask;
ad0ebb91 55 uint32_t rtce_window_size;
28b07e73 56 void (*realize)(VIOsPAPRDevice *dev, Error **errp);
b1c7f725 57 void (*reset)(VIOsPAPRDevice *dev);
3954d33a
AL
58 int (*devnode)(VIOsPAPRDevice *dev, void *fdt, int node_off);
59} VIOsPAPRDeviceClass;
60
61struct VIOsPAPRDevice {
4040ab72
DG
62 DeviceState qdev;
63 uint32_t reg;
a307d594 64 uint32_t irq;
cbd62f86 65 uint64_t signal_state;
b45d63b6 66 VIOsPAPR_CRQ crq;
96478592 67 AddressSpace as;
ee9a569a
AK
68 MemoryRegion mrroot;
69 MemoryRegion mrbypass;
2b7dc949 70 sPAPRTCETable *tcet;
3954d33a 71};
4040ab72 72
ad0ebb91
DG
73#define DEFINE_SPAPR_PROPERTIES(type, field) \
74 DEFINE_PROP_UINT32("reg", type, field.reg, -1)
77c7ea5e 75
3954d33a 76struct VIOsPAPRBus {
4040ab72 77 BusState bus;
d601fac4 78 uint32_t next_reg;
3954d33a 79};
4040ab72
DG
80
81extern VIOsPAPRBus *spapr_vio_bus_init(void);
82extern VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg);
bf5a6696 83void spapr_dt_vdevice(VIOsPAPRBus *bus, void *fdt);
7c866c6a 84extern gchar *spapr_vio_stdout_path(VIOsPAPRBus *bus);
4040ab72 85
a307d594
AK
86static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev)
87{
28e02042
DG
88 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
89
f7759e43 90 return xics_get_qirq(XICS_FABRIC(spapr), dev->irq);
a307d594
AK
91}
92
ad0ebb91
DG
93static inline bool spapr_vio_dma_valid(VIOsPAPRDevice *dev, uint64_t taddr,
94 uint32_t size, DMADirection dir)
95{
df32fd1c 96 return dma_memory_valid(&dev->as, taddr, size, dir);
ad0ebb91
DG
97}
98
99static inline int spapr_vio_dma_read(VIOsPAPRDevice *dev, uint64_t taddr,
100 void *buf, uint32_t size)
101{
df32fd1c 102 return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
ad0ebb91
DG
103 H_DEST_PARM : H_SUCCESS;
104}
105
106static inline int spapr_vio_dma_write(VIOsPAPRDevice *dev, uint64_t taddr,
107 const void *buf, uint32_t size)
108{
df32fd1c 109 return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
ad0ebb91
DG
110 H_DEST_PARM : H_SUCCESS;
111}
112
113static inline int spapr_vio_dma_set(VIOsPAPRDevice *dev, uint64_t taddr,
114 uint8_t c, uint32_t size)
115{
df32fd1c 116 return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
ad0ebb91
DG
117 H_DEST_PARM : H_SUCCESS;
118}
119
df32fd1c
PB
120#define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val)))
121#define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val)))
122#define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val)))
123#define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val)))
124#define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr)))
ee86dfee 125
b45d63b6
BH
126int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq);
127
28e02042 128VIOsPAPRDevice *vty_lookup(sPAPRMachineState *spapr, target_ulong reg);
4040ab72 129void vty_putchars(VIOsPAPRDevice *sdev, uint8_t *buf, int len);
0ec7b3e7 130void spapr_vty_create(VIOsPAPRBus *bus, Chardev *chardev);
d601fac4
DG
131void spapr_vlan_create(VIOsPAPRBus *bus, NICInfo *nd);
132void spapr_vscsi_create(VIOsPAPRBus *bus);
6e270446 133
68f3a94c
DG
134VIOsPAPRDevice *spapr_vty_get_default(VIOsPAPRBus *bus);
135
b368a7d8
DG
136extern const VMStateDescription vmstate_spapr_vio;
137
138#define VMSTATE_SPAPR_VIO(_f, _s) \
139 VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, VIOsPAPRDevice)
140
ee9a569a
AK
141void spapr_vio_set_bypass(VIOsPAPRDevice *dev, bool bypass);
142
2a6a4076 143#endif /* HW_SPAPR_VIO_H */