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2a6a4076 MA |
1 | #ifndef HW_SPAPR_VIO_H |
2 | #define HW_SPAPR_VIO_H | |
3 | ||
4040ab72 DG |
4 | /* |
5 | * QEMU sPAPR VIO bus definitions | |
6 | * | |
7 | * Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au> | |
8 | * Based on the s390 virtio bus definitions: | |
9 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
10 | * | |
11 | * This library is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU Lesser General Public | |
13 | * License as published by the Free Software Foundation; either | |
61f3c91a | 14 | * version 2.1 of the License, or (at your option) any later version. |
4040ab72 DG |
15 | * |
16 | * This library is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * Lesser General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU Lesser General Public | |
22 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
23 | */ | |
24 | ||
ec150c7e | 25 | #include "hw/ppc/spapr.h" |
9c17d615 | 26 | #include "sysemu/dma.h" |
7678b74a | 27 | #include "hw/irq.h" |
db1015e9 | 28 | #include "qom/object.h" |
ee86dfee | 29 | |
3954d33a | 30 | #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device" |
c821774a | 31 | OBJECT_DECLARE_TYPE(SpaprVioDevice, SpaprVioDeviceClass, |
30b5707c | 32 | VIO_SPAPR_DEVICE) |
3954d33a | 33 | |
0d936928 | 34 | #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus" |
8063396b | 35 | OBJECT_DECLARE_SIMPLE_TYPE(SpaprVioBus, SPAPR_VIO_BUS) |
0d936928 | 36 | |
215e2098 | 37 | #define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge" |
b45d63b6 | 38 | |
ce2918cb | 39 | typedef struct SpaprVioCrq { |
b45d63b6 BH |
40 | uint64_t qladdr; |
41 | uint32_t qsize; | |
42 | uint32_t qnext; | |
ce2918cb DG |
43 | int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq); |
44 | } SpaprVioCrq; | |
b45d63b6 | 45 | |
3954d33a | 46 | |
db1015e9 | 47 | struct SpaprVioDeviceClass { |
3954d33a AL |
48 | DeviceClass parent_class; |
49 | ||
50 | const char *dt_name, *dt_type, *dt_compatible; | |
51 | target_ulong signal_mask; | |
ad0ebb91 | 52 | uint32_t rtce_window_size; |
ce2918cb DG |
53 | void (*realize)(SpaprVioDevice *dev, Error **errp); |
54 | void (*reset)(SpaprVioDevice *dev); | |
55 | int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off); | |
864674fa | 56 | const char *(*get_dt_compatible)(SpaprVioDevice *dev); |
db1015e9 | 57 | }; |
3954d33a | 58 | |
ce2918cb | 59 | struct SpaprVioDevice { |
4040ab72 DG |
60 | DeviceState qdev; |
61 | uint32_t reg; | |
a307d594 | 62 | uint32_t irq; |
cbd62f86 | 63 | uint64_t signal_state; |
ce2918cb | 64 | SpaprVioCrq crq; |
96478592 | 65 | AddressSpace as; |
ee9a569a AK |
66 | MemoryRegion mrroot; |
67 | MemoryRegion mrbypass; | |
ce2918cb | 68 | SpaprTceTable *tcet; |
3954d33a | 69 | }; |
4040ab72 | 70 | |
ad0ebb91 DG |
71 | #define DEFINE_SPAPR_PROPERTIES(type, field) \ |
72 | DEFINE_PROP_UINT32("reg", type, field.reg, -1) | |
77c7ea5e | 73 | |
ce2918cb | 74 | struct SpaprVioBus { |
4040ab72 | 75 | BusState bus; |
d601fac4 | 76 | uint32_t next_reg; |
3954d33a | 77 | }; |
4040ab72 | 78 | |
aeb7a330 GK |
79 | SpaprVioBus *spapr_vio_bus_init(void); |
80 | SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg); | |
ce2918cb | 81 | void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt); |
aeb7a330 | 82 | gchar *spapr_vio_stdout_path(SpaprVioBus *bus); |
4040ab72 | 83 | |
7678b74a | 84 | static inline void spapr_vio_irq_pulse(SpaprVioDevice *dev) |
a307d594 | 85 | { |
ce2918cb | 86 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
28e02042 | 87 | |
7678b74a | 88 | qemu_irq_pulse(spapr_qirq(spapr, dev->irq)); |
a307d594 AK |
89 | } |
90 | ||
ce2918cb | 91 | static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr, |
ad0ebb91 DG |
92 | uint32_t size, DMADirection dir) |
93 | { | |
7ccb391c | 94 | return dma_memory_valid(&dev->as, taddr, size, dir, MEMTXATTRS_UNSPECIFIED); |
ad0ebb91 DG |
95 | } |
96 | ||
ce2918cb | 97 | static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr, |
ad0ebb91 DG |
98 | void *buf, uint32_t size) |
99 | { | |
ba06fe8a PMD |
100 | return (dma_memory_read(&dev->as, taddr, |
101 | buf, size, MEMTXATTRS_UNSPECIFIED) != 0) ? | |
ad0ebb91 DG |
102 | H_DEST_PARM : H_SUCCESS; |
103 | } | |
104 | ||
ce2918cb | 105 | static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr, |
ad0ebb91 DG |
106 | const void *buf, uint32_t size) |
107 | { | |
ba06fe8a PMD |
108 | return (dma_memory_write(&dev->as, taddr, |
109 | buf, size, MEMTXATTRS_UNSPECIFIED) != 0) ? | |
ad0ebb91 DG |
110 | H_DEST_PARM : H_SUCCESS; |
111 | } | |
112 | ||
ce2918cb | 113 | static inline int spapr_vio_dma_set(SpaprVioDevice *dev, uint64_t taddr, |
ad0ebb91 DG |
114 | uint8_t c, uint32_t size) |
115 | { | |
7a36e42d PMD |
116 | return (dma_memory_set(&dev->as, taddr, |
117 | c, size, MEMTXATTRS_UNSPECIFIED) != 0) ? | |
ad0ebb91 DG |
118 | H_DEST_PARM : H_SUCCESS; |
119 | } | |
120 | ||
2280c27a PMD |
121 | #define vio_stb(_dev, _addr, _val) \ |
122 | (stb_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED)) | |
123 | #define vio_sth(_dev, _addr, _val) \ | |
124 | (stw_be_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED)) | |
125 | #define vio_stl(_dev, _addr, _val) \ | |
126 | (stl_be_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED)) | |
127 | #define vio_stq(_dev, _addr, _val) \ | |
128 | (stq_be_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED)) | |
34cdea1d PMD |
129 | #define vio_ldq(_dev, _addr) \ |
130 | (ldq_be_dma(&(_dev)->as, (_addr), MEMTXATTRS_UNSPECIFIED)) | |
ee86dfee | 131 | |
ce2918cb | 132 | int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq); |
b45d63b6 | 133 | |
ce2918cb DG |
134 | SpaprVioDevice *vty_lookup(SpaprMachineState *spapr, target_ulong reg); |
135 | void vty_putchars(SpaprVioDevice *sdev, uint8_t *buf, int len); | |
136 | void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev); | |
137 | void spapr_vlan_create(SpaprVioBus *bus, NICInfo *nd); | |
138 | void spapr_vscsi_create(SpaprVioBus *bus); | |
6e270446 | 139 | |
ce2918cb | 140 | SpaprVioDevice *spapr_vty_get_default(SpaprVioBus *bus); |
68f3a94c | 141 | |
b368a7d8 DG |
142 | extern const VMStateDescription vmstate_spapr_vio; |
143 | ||
144 | #define VMSTATE_SPAPR_VIO(_f, _s) \ | |
ce2918cb | 145 | VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, SpaprVioDevice) |
b368a7d8 | 146 | |
ce2918cb | 147 | void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass); |
ee9a569a | 148 | |
2a6a4076 | 149 | #endif /* HW_SPAPR_VIO_H */ |