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spapr: Replace spapr_vio_qirq() helper with spapr_vio_irq_pulse() helper
[mirror_qemu.git] / include / hw / ppc / spapr_vio.h
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2a6a4076
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1#ifndef HW_SPAPR_VIO_H
2#define HW_SPAPR_VIO_H
3
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4/*
5 * QEMU sPAPR VIO bus definitions
6 *
7 * Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au>
8 * Based on the s390 virtio bus definitions:
9 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
10 *
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
20 *
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 */
24
ec150c7e 25#include "hw/ppc/spapr.h"
9c17d615 26#include "sysemu/dma.h"
7678b74a 27#include "hw/irq.h"
ee86dfee 28
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29#define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"
30#define VIO_SPAPR_DEVICE(obj) \
ce2918cb 31 OBJECT_CHECK(SpaprVioDevice, (obj), TYPE_VIO_SPAPR_DEVICE)
3954d33a 32#define VIO_SPAPR_DEVICE_CLASS(klass) \
ce2918cb 33 OBJECT_CLASS_CHECK(SpaprVioDeviceClass, (klass), TYPE_VIO_SPAPR_DEVICE)
3954d33a 34#define VIO_SPAPR_DEVICE_GET_CLASS(obj) \
ce2918cb 35 OBJECT_GET_CLASS(SpaprVioDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE)
3954d33a 36
0d936928 37#define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
ce2918cb 38#define SPAPR_VIO_BUS(obj) OBJECT_CHECK(SpaprVioBus, (obj), TYPE_SPAPR_VIO_BUS)
0d936928 39
215e2098 40#define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge"
b45d63b6 41
ce2918cb 42typedef struct SpaprVioCrq {
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43 uint64_t qladdr;
44 uint32_t qsize;
45 uint32_t qnext;
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46 int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq);
47} SpaprVioCrq;
b45d63b6 48
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49typedef struct SpaprVioDevice SpaprVioDevice;
50typedef struct SpaprVioBus SpaprVioBus;
3954d33a 51
ce2918cb 52typedef struct SpaprVioDeviceClass {
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53 DeviceClass parent_class;
54
55 const char *dt_name, *dt_type, *dt_compatible;
56 target_ulong signal_mask;
ad0ebb91 57 uint32_t rtce_window_size;
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58 void (*realize)(SpaprVioDevice *dev, Error **errp);
59 void (*reset)(SpaprVioDevice *dev);
60 int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off);
61} SpaprVioDeviceClass;
3954d33a 62
ce2918cb 63struct SpaprVioDevice {
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64 DeviceState qdev;
65 uint32_t reg;
a307d594 66 uint32_t irq;
cbd62f86 67 uint64_t signal_state;
ce2918cb 68 SpaprVioCrq crq;
96478592 69 AddressSpace as;
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70 MemoryRegion mrroot;
71 MemoryRegion mrbypass;
ce2918cb 72 SpaprTceTable *tcet;
3954d33a 73};
4040ab72 74
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75#define DEFINE_SPAPR_PROPERTIES(type, field) \
76 DEFINE_PROP_UINT32("reg", type, field.reg, -1)
77c7ea5e 77
ce2918cb 78struct SpaprVioBus {
4040ab72 79 BusState bus;
d601fac4 80 uint32_t next_reg;
3954d33a 81};
4040ab72 82
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83extern SpaprVioBus *spapr_vio_bus_init(void);
84extern SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg);
85void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt);
86extern gchar *spapr_vio_stdout_path(SpaprVioBus *bus);
4040ab72 87
7678b74a 88static inline void spapr_vio_irq_pulse(SpaprVioDevice *dev)
a307d594 89{
ce2918cb 90 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
28e02042 91
7678b74a 92 qemu_irq_pulse(spapr_qirq(spapr, dev->irq));
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93}
94
ce2918cb 95static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr,
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96 uint32_t size, DMADirection dir)
97{
df32fd1c 98 return dma_memory_valid(&dev->as, taddr, size, dir);
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99}
100
ce2918cb 101static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr,
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102 void *buf, uint32_t size)
103{
df32fd1c 104 return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
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105 H_DEST_PARM : H_SUCCESS;
106}
107
ce2918cb 108static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr,
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109 const void *buf, uint32_t size)
110{
df32fd1c 111 return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
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112 H_DEST_PARM : H_SUCCESS;
113}
114
ce2918cb 115static inline int spapr_vio_dma_set(SpaprVioDevice *dev, uint64_t taddr,
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116 uint8_t c, uint32_t size)
117{
df32fd1c 118 return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
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119 H_DEST_PARM : H_SUCCESS;
120}
121
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122#define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val)))
123#define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val)))
124#define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val)))
125#define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val)))
126#define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr)))
ee86dfee 127
ce2918cb 128int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq);
b45d63b6 129
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130SpaprVioDevice *vty_lookup(SpaprMachineState *spapr, target_ulong reg);
131void vty_putchars(SpaprVioDevice *sdev, uint8_t *buf, int len);
132void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev);
133void spapr_vlan_create(SpaprVioBus *bus, NICInfo *nd);
134void spapr_vscsi_create(SpaprVioBus *bus);
6e270446 135
ce2918cb 136SpaprVioDevice *spapr_vty_get_default(SpaprVioBus *bus);
68f3a94c 137
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138extern const VMStateDescription vmstate_spapr_vio;
139
140#define VMSTATE_SPAPR_VIO(_f, _s) \
ce2918cb 141 VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, SpaprVioDevice)
b368a7d8 142
ce2918cb 143void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass);
ee9a569a 144
2a6a4076 145#endif /* HW_SPAPR_VIO_H */