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2a6a4076 MA |
1 | #ifndef HW_SPAPR_VIO_H |
2 | #define HW_SPAPR_VIO_H | |
3 | ||
4040ab72 DG |
4 | /* |
5 | * QEMU sPAPR VIO bus definitions | |
6 | * | |
7 | * Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au> | |
8 | * Based on the s390 virtio bus definitions: | |
9 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
10 | * | |
11 | * This library is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU Lesser General Public | |
13 | * License as published by the Free Software Foundation; either | |
14 | * version 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This library is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * Lesser General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU Lesser General Public | |
22 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
23 | */ | |
24 | ||
ec150c7e | 25 | #include "hw/ppc/spapr.h" |
9c17d615 | 26 | #include "sysemu/dma.h" |
7678b74a | 27 | #include "hw/irq.h" |
db1015e9 | 28 | #include "qom/object.h" |
ee86dfee | 29 | |
3954d33a | 30 | #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device" |
db1015e9 EH |
31 | typedef struct SpaprVioDevice SpaprVioDevice; |
32 | typedef struct SpaprVioDeviceClass SpaprVioDeviceClass; | |
8110fa1d EH |
33 | DECLARE_OBJ_CHECKERS(SpaprVioDevice, SpaprVioDeviceClass, |
34 | VIO_SPAPR_DEVICE, TYPE_VIO_SPAPR_DEVICE) | |
3954d33a | 35 | |
0d936928 | 36 | #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus" |
db1015e9 | 37 | typedef struct SpaprVioBus SpaprVioBus; |
8110fa1d EH |
38 | DECLARE_INSTANCE_CHECKER(SpaprVioBus, SPAPR_VIO_BUS, |
39 | TYPE_SPAPR_VIO_BUS) | |
0d936928 | 40 | |
215e2098 | 41 | #define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge" |
b45d63b6 | 42 | |
ce2918cb | 43 | typedef struct SpaprVioCrq { |
b45d63b6 BH |
44 | uint64_t qladdr; |
45 | uint32_t qsize; | |
46 | uint32_t qnext; | |
ce2918cb DG |
47 | int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq); |
48 | } SpaprVioCrq; | |
b45d63b6 | 49 | |
3954d33a | 50 | |
db1015e9 | 51 | struct SpaprVioDeviceClass { |
3954d33a AL |
52 | DeviceClass parent_class; |
53 | ||
54 | const char *dt_name, *dt_type, *dt_compatible; | |
55 | target_ulong signal_mask; | |
ad0ebb91 | 56 | uint32_t rtce_window_size; |
ce2918cb DG |
57 | void (*realize)(SpaprVioDevice *dev, Error **errp); |
58 | void (*reset)(SpaprVioDevice *dev); | |
59 | int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off); | |
864674fa | 60 | const char *(*get_dt_compatible)(SpaprVioDevice *dev); |
db1015e9 | 61 | }; |
3954d33a | 62 | |
ce2918cb | 63 | struct SpaprVioDevice { |
4040ab72 DG |
64 | DeviceState qdev; |
65 | uint32_t reg; | |
a307d594 | 66 | uint32_t irq; |
cbd62f86 | 67 | uint64_t signal_state; |
ce2918cb | 68 | SpaprVioCrq crq; |
96478592 | 69 | AddressSpace as; |
ee9a569a AK |
70 | MemoryRegion mrroot; |
71 | MemoryRegion mrbypass; | |
ce2918cb | 72 | SpaprTceTable *tcet; |
3954d33a | 73 | }; |
4040ab72 | 74 | |
ad0ebb91 DG |
75 | #define DEFINE_SPAPR_PROPERTIES(type, field) \ |
76 | DEFINE_PROP_UINT32("reg", type, field.reg, -1) | |
77c7ea5e | 77 | |
ce2918cb | 78 | struct SpaprVioBus { |
4040ab72 | 79 | BusState bus; |
d601fac4 | 80 | uint32_t next_reg; |
3954d33a | 81 | }; |
4040ab72 | 82 | |
aeb7a330 GK |
83 | SpaprVioBus *spapr_vio_bus_init(void); |
84 | SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg); | |
ce2918cb | 85 | void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt); |
aeb7a330 | 86 | gchar *spapr_vio_stdout_path(SpaprVioBus *bus); |
4040ab72 | 87 | |
7678b74a | 88 | static inline void spapr_vio_irq_pulse(SpaprVioDevice *dev) |
a307d594 | 89 | { |
ce2918cb | 90 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
28e02042 | 91 | |
7678b74a | 92 | qemu_irq_pulse(spapr_qirq(spapr, dev->irq)); |
a307d594 AK |
93 | } |
94 | ||
ce2918cb | 95 | static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr, |
ad0ebb91 DG |
96 | uint32_t size, DMADirection dir) |
97 | { | |
df32fd1c | 98 | return dma_memory_valid(&dev->as, taddr, size, dir); |
ad0ebb91 DG |
99 | } |
100 | ||
ce2918cb | 101 | static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr, |
ad0ebb91 DG |
102 | void *buf, uint32_t size) |
103 | { | |
df32fd1c | 104 | return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ? |
ad0ebb91 DG |
105 | H_DEST_PARM : H_SUCCESS; |
106 | } | |
107 | ||
ce2918cb | 108 | static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr, |
ad0ebb91 DG |
109 | const void *buf, uint32_t size) |
110 | { | |
df32fd1c | 111 | return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ? |
ad0ebb91 DG |
112 | H_DEST_PARM : H_SUCCESS; |
113 | } | |
114 | ||
ce2918cb | 115 | static inline int spapr_vio_dma_set(SpaprVioDevice *dev, uint64_t taddr, |
ad0ebb91 DG |
116 | uint8_t c, uint32_t size) |
117 | { | |
df32fd1c | 118 | return (dma_memory_set(&dev->as, taddr, c, size) != 0) ? |
ad0ebb91 DG |
119 | H_DEST_PARM : H_SUCCESS; |
120 | } | |
121 | ||
df32fd1c PB |
122 | #define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val))) |
123 | #define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val))) | |
124 | #define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val))) | |
125 | #define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val))) | |
126 | #define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr))) | |
ee86dfee | 127 | |
ce2918cb | 128 | int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq); |
b45d63b6 | 129 | |
ce2918cb DG |
130 | SpaprVioDevice *vty_lookup(SpaprMachineState *spapr, target_ulong reg); |
131 | void vty_putchars(SpaprVioDevice *sdev, uint8_t *buf, int len); | |
132 | void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev); | |
133 | void spapr_vlan_create(SpaprVioBus *bus, NICInfo *nd); | |
134 | void spapr_vscsi_create(SpaprVioBus *bus); | |
6e270446 | 135 | |
ce2918cb | 136 | SpaprVioDevice *spapr_vty_get_default(SpaprVioBus *bus); |
68f3a94c | 137 | |
b368a7d8 DG |
138 | extern const VMStateDescription vmstate_spapr_vio; |
139 | ||
140 | #define VMSTATE_SPAPR_VIO(_f, _s) \ | |
ce2918cb | 141 | VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, SpaprVioDevice) |
b368a7d8 | 142 | |
ce2918cb | 143 | void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass); |
ee9a569a | 144 | |
2a6a4076 | 145 | #endif /* HW_SPAPR_VIO_H */ |