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88a07990 MC |
1 | /* |
2 | * QEMU Test Finisher interface | |
3 | * | |
4 | * Copyright (c) 2018 SiFive, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2 or later, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
17 | */ | |
18 | ||
19 | #ifndef HW_SIFIVE_TEST_H | |
20 | #define HW_SIFIVE_TEST_H | |
21 | ||
ec150c7e MA |
22 | #include "hw/sysbus.h" |
23 | ||
88a07990 MC |
24 | #define TYPE_SIFIVE_TEST "riscv.sifive.test" |
25 | ||
26 | #define SIFIVE_TEST(obj) \ | |
27 | OBJECT_CHECK(SiFiveTestState, (obj), TYPE_SIFIVE_TEST) | |
28 | ||
29 | typedef struct SiFiveTestState { | |
30 | /*< private >*/ | |
31 | SysBusDevice parent_obj; | |
32 | ||
33 | /*< public >*/ | |
34 | MemoryRegion mmio; | |
35 | } SiFiveTestState; | |
36 | ||
37 | enum { | |
38 | FINISHER_FAIL = 0x3333, | |
9a2551ed BM |
39 | FINISHER_PASS = 0x5555, |
40 | FINISHER_RESET = 0x7777 | |
88a07990 MC |
41 | }; |
42 | ||
43 | DeviceState *sifive_test_create(hwaddr addr); | |
44 | ||
45 | #endif |