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637d23be SPB |
1 | /* |
2 | * SD Association Host Standard Specification v2.0 controller emulation | |
3 | * | |
4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
5 | * Mitsyanko Igor <i.mitsyanko@samsung.com> | |
6 | * Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com> | |
7 | * | |
8 | * Based on MMC controller for Samsung S5PC1xx-based board emulation | |
9 | * by Alexey Merkulov and Vladimir Monakhov. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the | |
13 | * Free Software Foundation; either version 2 of the License, or (at your | |
14 | * option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
19 | * See the GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU _General Public License along | |
22 | * with this program; if not, see <http://www.gnu.org/licenses/>. | |
23 | */ | |
24 | ||
25 | #ifndef SDHCI_H | |
26 | #define SDHCI_H | |
27 | ||
edf5ca5d | 28 | #include "hw/pci/pci_device.h" |
637d23be SPB |
29 | #include "hw/sysbus.h" |
30 | #include "hw/sd/sd.h" | |
db1015e9 | 31 | #include "qom/object.h" |
637d23be SPB |
32 | |
33 | /* SD/MMC host controller state */ | |
db1015e9 | 34 | struct SDHCIState { |
f82a0f44 | 35 | /*< private >*/ |
637d23be SPB |
36 | union { |
37 | PCIDevice pcidev; | |
38 | SysBusDevice busdev; | |
39 | }; | |
f82a0f44 PMD |
40 | |
41 | /*< public >*/ | |
40bbc194 | 42 | SDBus sdbus; |
637d23be | 43 | MemoryRegion iomem; |
02e57e1c | 44 | AddressSpace sysbus_dma_as; |
dd55c485 | 45 | AddressSpace *dma_as; |
60765b6c | 46 | MemoryRegion *dma_mr; |
fd1e5c81 | 47 | const MemoryRegionOps *io_ops; |
637d23be SPB |
48 | |
49 | QEMUTimer *insert_timer; /* timer for 'changing' sd card. */ | |
50 | QEMUTimer *transfer_timer; | |
637d23be SPB |
51 | qemu_irq irq; |
52 | ||
f82a0f44 | 53 | /* Registers cleared on reset */ |
637d23be SPB |
54 | uint32_t sdmasysad; /* SDMA System Address register */ |
55 | uint16_t blksize; /* Host DMA Buff Boundary and Transfer BlkSize Reg */ | |
56 | uint16_t blkcnt; /* Blocks count for current transfer */ | |
57 | uint32_t argument; /* Command Argument Register */ | |
58 | uint16_t trnmod; /* Transfer Mode Setting Register */ | |
59 | uint16_t cmdreg; /* Command Register */ | |
60 | uint32_t rspreg[4]; /* Response Registers 0-3 */ | |
61 | uint32_t prnsts; /* Present State Register */ | |
06c5120b | 62 | uint8_t hostctl1; /* Host Control Register */ |
637d23be SPB |
63 | uint8_t pwrcon; /* Power control Register */ |
64 | uint8_t blkgap; /* Block Gap Control Register */ | |
65 | uint8_t wakcon; /* WakeUp Control Register */ | |
66 | uint16_t clkcon; /* Clock control Register */ | |
67 | uint8_t timeoutcon; /* Timeout Control Register */ | |
68 | uint8_t admaerr; /* ADMA Error Status Register */ | |
69 | uint16_t norintsts; /* Normal Interrupt Status Register */ | |
70 | uint16_t errintsts; /* Error Interrupt Status Register */ | |
71 | uint16_t norintstsen; /* Normal Interrupt Status Enable Register */ | |
72 | uint16_t errintstsen; /* Error Interrupt Status Enable Register */ | |
73 | uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */ | |
74 | uint16_t errintsigen; /* Error Interrupt Signal Enable Register */ | |
75 | uint16_t acmd12errsts; /* Auto CMD12 error status register */ | |
ea55a221 | 76 | uint16_t hostctl2; /* Host Control 2 */ |
637d23be | 77 | uint64_t admasysaddr; /* ADMA System Address Register */ |
3b2d8176 | 78 | uint16_t vendor_spec; /* Vendor specific register */ |
637d23be | 79 | |
f82a0f44 | 80 | /* Read-only registers */ |
5efc9016 PMD |
81 | uint64_t capareg; /* Capabilities Register */ |
82 | uint64_t maxcurr; /* Maximum Current Capabilities Register */ | |
aceb5b06 | 83 | uint16_t version; /* Host Controller Version Register */ |
f82a0f44 | 84 | |
637d23be SPB |
85 | uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */ |
86 | uint32_t buf_maxsz; | |
87 | uint16_t data_count; /* current element in FIFO buffer */ | |
88 | uint8_t stopped_state;/* Current SDHC state */ | |
0a7ac9f9 | 89 | bool pending_insert_state; |
637d23be SPB |
90 | /* Buffer Data Port Register - virtual access point to R and W buffers */ |
91 | /* Software Reset Register - always reads as 0 */ | |
92 | /* Force Event Auto CMD12 Error Interrupt Reg - write only */ | |
93 | /* Force Event Error Interrupt Register- write only */ | |
94 | /* RO Host Controller Version Register always reads as 0x2401 */ | |
b635d98c PMD |
95 | |
96 | /* Configurable properties */ | |
97 | bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */ | |
fd1e5c81 | 98 | uint32_t quirks; |
c0a55a0c | 99 | uint8_t endianness; |
aceb5b06 | 100 | uint8_t sd_spec_version; |
0034ebe6 | 101 | uint8_t uhs_mode; |
3b2d8176 | 102 | uint8_t vendor; /* For vendor specific functionality */ |
db1015e9 EH |
103 | }; |
104 | typedef struct SDHCIState SDHCIState; | |
637d23be | 105 | |
3b2d8176 GR |
106 | #define SDHCI_VENDOR_NONE 0 |
107 | #define SDHCI_VENDOR_IMX 1 | |
108 | ||
fd1e5c81 AS |
109 | /* |
110 | * Controller does not provide transfer-complete interrupt when not | |
111 | * busy. | |
112 | * | |
113 | * NOTE: This definition is taken out of Linux kernel and so the | |
114 | * original bit number is preserved | |
115 | */ | |
116 | #define SDHCI_QUIRK_NO_BUSY_IRQ BIT(14) | |
117 | ||
637d23be | 118 | #define TYPE_PCI_SDHCI "sdhci-pci" |
8110fa1d EH |
119 | DECLARE_INSTANCE_CHECKER(SDHCIState, PCI_SDHCI, |
120 | TYPE_PCI_SDHCI) | |
637d23be SPB |
121 | |
122 | #define TYPE_SYSBUS_SDHCI "generic-sdhci" | |
8110fa1d EH |
123 | DECLARE_INSTANCE_CHECKER(SDHCIState, SYSBUS_SDHCI, |
124 | TYPE_SYSBUS_SDHCI) | |
637d23be | 125 | |
fd1e5c81 AS |
126 | #define TYPE_IMX_USDHC "imx-usdhc" |
127 | ||
c85fba50 PMD |
128 | #define TYPE_S3C_SDHCI "s3c-sdhci" |
129 | ||
637d23be | 130 | #endif /* SDHCI_H */ |