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1 | /* |
2 | * ASPEED AST2400 SMC Controller (SPI Flash Only) | |
3 | * | |
4 | * Copyright (C) 2016 IBM Corp. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | #ifndef ASPEED_SMC_H | |
26 | #define ASPEED_SMC_H | |
27 | ||
28 | #include "hw/ssi/ssi.h" | |
ec150c7e | 29 | #include "hw/sysbus.h" |
db1015e9 | 30 | #include "qom/object.h" |
7c1c69bc | 31 | |
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32 | typedef struct AspeedSegments { |
33 | hwaddr addr; | |
34 | uint32_t size; | |
35 | } AspeedSegments; | |
36 | ||
37 | struct AspeedSMCState; | |
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38 | typedef struct AspeedSMCController { |
39 | const char *name; | |
40 | uint8_t r_conf; | |
41 | uint8_t r_ce_ctrl; | |
42 | uint8_t r_ctrl0; | |
43 | uint8_t r_timings; | |
f286f04c | 44 | uint8_t nregs_timings; |
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45 | uint8_t conf_enable_w0; |
46 | uint8_t max_slaves; | |
924ed163 | 47 | const AspeedSegments *segments; |
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48 | hwaddr flash_window_base; |
49 | uint32_t flash_window_size; | |
d09dc5b7 | 50 | bool has_dma; |
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51 | hwaddr dma_flash_mask; |
52 | hwaddr dma_dram_mask; | |
087b57c9 | 53 | uint32_t nregs; |
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54 | uint32_t (*segment_to_reg)(const struct AspeedSMCState *s, |
55 | const AspeedSegments *seg); | |
56 | void (*reg_to_segment)(const struct AspeedSMCState *s, uint32_t reg, | |
57 | AspeedSegments *seg); | |
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58 | } AspeedSMCController; |
59 | ||
924ed163 | 60 | typedef struct AspeedSMCFlash { |
fcdf2c59 | 61 | struct AspeedSMCState *controller; |
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62 | |
63 | uint8_t id; | |
64 | uint32_t size; | |
65 | ||
66 | MemoryRegion mmio; | |
67 | DeviceState *flash; | |
68 | } AspeedSMCFlash; | |
69 | ||
7c1c69bc | 70 | #define TYPE_ASPEED_SMC "aspeed.smc" |
db1015e9 EH |
71 | typedef struct AspeedSMCClass AspeedSMCClass; |
72 | typedef struct AspeedSMCState AspeedSMCState; | |
7c1c69bc CLG |
73 | #define ASPEED_SMC(obj) OBJECT_CHECK(AspeedSMCState, (obj), TYPE_ASPEED_SMC) |
74 | #define ASPEED_SMC_CLASS(klass) \ | |
75 | OBJECT_CLASS_CHECK(AspeedSMCClass, (klass), TYPE_ASPEED_SMC) | |
76 | #define ASPEED_SMC_GET_CLASS(obj) \ | |
77 | OBJECT_GET_CLASS(AspeedSMCClass, (obj), TYPE_ASPEED_SMC) | |
78 | ||
db1015e9 | 79 | struct AspeedSMCClass { |
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80 | SysBusDevice parent_obj; |
81 | const AspeedSMCController *ctrl; | |
db1015e9 | 82 | }; |
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83 | |
84 | #define ASPEED_SMC_R_MAX (0x100 / 4) | |
85 | ||
db1015e9 | 86 | struct AspeedSMCState { |
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87 | SysBusDevice parent_obj; |
88 | ||
89 | const AspeedSMCController *ctrl; | |
90 | ||
91 | MemoryRegion mmio; | |
924ed163 | 92 | MemoryRegion mmio_flash; |
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93 | |
94 | qemu_irq irq; | |
95 | int irqline; | |
96 | ||
97 | uint32_t num_cs; | |
98 | qemu_irq *cs_lines; | |
5258c2a6 | 99 | bool inject_failure; |
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100 | |
101 | SSIBus *spi; | |
102 | ||
103 | uint32_t regs[ASPEED_SMC_R_MAX]; | |
104 | ||
105 | /* depends on the controller type */ | |
106 | uint8_t r_conf; | |
107 | uint8_t r_ce_ctrl; | |
108 | uint8_t r_ctrl0; | |
109 | uint8_t r_timings; | |
110 | uint8_t conf_enable_w0; | |
924ed163 | 111 | |
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112 | /* for DMA support */ |
113 | uint64_t sdram_base; | |
114 | ||
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115 | AddressSpace flash_as; |
116 | MemoryRegion *dram_mr; | |
117 | AddressSpace dram_as; | |
118 | ||
924ed163 | 119 | AspeedSMCFlash *flashes; |
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120 | |
121 | uint8_t snoop_index; | |
122 | uint8_t snoop_dummies; | |
db1015e9 | 123 | }; |
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124 | |
125 | #endif /* ASPEED_SMC_H */ |