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1 | /* |
2 | * ARM PrimeCell PL022 Synchronous Serial Port | |
3 | * | |
4 | * Copyright (c) 2007 CodeSourcery. | |
5 | * Written by Paul Brook | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | /* This is a model of the Arm PrimeCell PL022 synchronous serial port. | |
13 | * The PL022 TRM is: | |
14 | * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0194h/DDI0194H_ssp_pl022_trm.pdf | |
15 | * | |
16 | * QEMU interface: | |
17 | * + sysbus IRQ: SSPINTR combined interrupt line | |
18 | * + sysbus MMIO region 0: MemoryRegion for the device's registers | |
19 | */ | |
20 | ||
21 | #ifndef HW_SSI_PL022_H | |
22 | #define HW_SSI_PL022_H | |
23 | ||
24 | #include "hw/sysbus.h" | |
db1015e9 | 25 | #include "qom/object.h" |
1d52866f PM |
26 | |
27 | #define TYPE_PL022 "pl022" | |
8063396b | 28 | OBJECT_DECLARE_SIMPLE_TYPE(PL022State, PL022) |
1d52866f | 29 | |
db1015e9 | 30 | struct PL022State { |
1d52866f PM |
31 | SysBusDevice parent_obj; |
32 | ||
33 | MemoryRegion iomem; | |
34 | uint32_t cr0; | |
35 | uint32_t cr1; | |
36 | uint32_t bitmask; | |
37 | uint32_t sr; | |
38 | uint32_t cpsr; | |
39 | uint32_t is; | |
40 | uint32_t im; | |
41 | /* The FIFO head points to the next empty entry. */ | |
42 | int tx_fifo_head; | |
43 | int rx_fifo_head; | |
44 | int tx_fifo_len; | |
45 | int rx_fifo_len; | |
46 | uint16_t tx_fifo[8]; | |
47 | uint16_t rx_fifo[8]; | |
48 | qemu_irq irq; | |
49 | SSIBus *ssi; | |
db1015e9 | 50 | }; |
1d52866f PM |
51 | |
52 | #endif |