[mirror_qemu.git] / include / hw / timer / mss-timer.h

/*
 * Microsemi SmartFusion2 Timer.
 *
 * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

#ifndef HW_MSS_TIMER_H
#define HW_MSS_TIMER_H

#include "hw/sysbus.h"
#include "hw/ptimer.h"
#include "qom/object.h"

#define TYPE_MSS_TIMER     "mss-timer"
OBJECT_DECLARE_SIMPLE_TYPE(MSSTimerState, MSS_TIMER)

/*
 * There are two 32-bit down counting timers.
 * Timers 1 and 2 can be concatenated into a single 64-bit Timer
 * that operates either in Periodic mode or in One-shot mode.
 * Writing 1 to the TIM64_MODE register bit 0 sets the Timers in 64-bit mode.
 * In 64-bit mode, writing to the 32-bit registers has no effect.
 * Similarly, in 32-bit mode, writing to the 64-bit mode registers
 * has no effect. Only two 32-bit timers are supported currently.
 */
#define NUM_TIMERS        2

#define R_TIM1_MAX        6

struct Msf2Timer {
    ptimer_state *ptimer;

    uint32_t regs[R_TIM1_MAX];
    qemu_irq irq;
};

struct MSSTimerState {
    SysBusDevice parent_obj;

    MemoryRegion mmio;
    uint32_t freq_hz;
    struct Msf2Timer timers[NUM_TIMERS];
};

#endif /* HW_MSS_TIMER_H */
Commit	Line	Data
96401bad SS	1	/*
	2	* Microsemi SmartFusion2 Timer.
	3	*
	4	* Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
	24
	25	#ifndef HW_MSS_TIMER_H
	26	#define HW_MSS_TIMER_H
	27
	28	#include "hw/sysbus.h"
	29	#include "hw/ptimer.h"
db1015e9	30	#include "qom/object.h"
96401bad SS	31
96401bad SS	32	#define TYPE_MSS_TIMER "mss-timer"
8063396b	33	OBJECT_DECLARE_SIMPLE_TYPE(MSSTimerState, MSS_TIMER)
96401bad SS	34
	35	/*
	36	* There are two 32-bit down counting timers.
	37	* Timers 1 and 2 can be concatenated into a single 64-bit Timer
	38	* that operates either in Periodic mode or in One-shot mode.
	39	* Writing 1 to the TIM64_MODE register bit 0 sets the Timers in 64-bit mode.
	40	* In 64-bit mode, writing to the 32-bit registers has no effect.
	41	* Similarly, in 32-bit mode, writing to the 64-bit mode registers
	42	* has no effect. Only two 32-bit timers are supported currently.
	43	*/
	44	#define NUM_TIMERS 2
	45
	46	#define R_TIM1_MAX 6
	47
	48	struct Msf2Timer {
96401bad SS	49	ptimer_state *ptimer;
	50
	51	uint32_t regs[R_TIM1_MAX];
	52	qemu_irq irq;
	53	};
	54
db1015e9	55	struct MSSTimerState {
96401bad SS	56	SysBusDevice parent_obj;
	57
	58	MemoryRegion mmio;
	59	uint32_t freq_hz;
	60	struct Msf2Timer timers[NUM_TIMERS];
db1015e9	61	};
96401bad SS	62
96401bad SS	63	#endif /* HW_MSS_TIMER_H */