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c5a4829c SG |
1 | /* |
2 | * nRF51 System-on-Chip Timer peripheral | |
3 | * | |
4 | * QEMU interface: | |
5 | * + sysbus MMIO regions 0: GPIO registers | |
6 | * + sysbus irq | |
7 | * | |
8 | * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de> | |
9 | * | |
10 | * This code is licensed under the GPL version 2 or later. See | |
11 | * the COPYING file in the top-level directory. | |
12 | */ | |
13 | #ifndef NRF51_TIMER_H | |
14 | #define NRF51_TIMER_H | |
15 | ||
16 | #include "hw/sysbus.h" | |
17 | #include "qemu/timer.h" | |
db1015e9 | 18 | #include "qom/object.h" |
c5a4829c | 19 | #define TYPE_NRF51_TIMER "nrf51_soc.timer" |
db1015e9 | 20 | typedef struct NRF51TimerState NRF51TimerState; |
c5a4829c SG |
21 | #define NRF51_TIMER(obj) OBJECT_CHECK(NRF51TimerState, (obj), TYPE_NRF51_TIMER) |
22 | ||
23 | #define NRF51_TIMER_REG_COUNT 4 | |
24 | ||
25 | #define NRF51_TIMER_TASK_START 0x000 | |
26 | #define NRF51_TIMER_TASK_STOP 0x004 | |
27 | #define NRF51_TIMER_TASK_COUNT 0x008 | |
28 | #define NRF51_TIMER_TASK_CLEAR 0x00C | |
29 | #define NRF51_TIMER_TASK_SHUTDOWN 0x010 | |
30 | #define NRF51_TIMER_TASK_CAPTURE_0 0x040 | |
31 | #define NRF51_TIMER_TASK_CAPTURE_3 0x04C | |
32 | ||
33 | #define NRF51_TIMER_EVENT_COMPARE_0 0x140 | |
34 | #define NRF51_TIMER_EVENT_COMPARE_1 0x144 | |
35 | #define NRF51_TIMER_EVENT_COMPARE_2 0x148 | |
36 | #define NRF51_TIMER_EVENT_COMPARE_3 0x14C | |
37 | ||
38 | #define NRF51_TIMER_REG_SHORTS 0x200 | |
39 | #define NRF51_TIMER_REG_SHORTS_MASK 0xf0f | |
40 | #define NRF51_TIMER_REG_INTENSET 0x304 | |
41 | #define NRF51_TIMER_REG_INTENCLR 0x308 | |
42 | #define NRF51_TIMER_REG_INTEN_MASK 0xf0000 | |
43 | #define NRF51_TIMER_REG_MODE 0x504 | |
44 | #define NRF51_TIMER_REG_MODE_MASK 0x01 | |
45 | #define NRF51_TIMER_TIMER 0 | |
46 | #define NRF51_TIMER_COUNTER 1 | |
47 | #define NRF51_TIMER_REG_BITMODE 0x508 | |
48 | #define NRF51_TIMER_REG_BITMODE_MASK 0x03 | |
49 | #define NRF51_TIMER_WIDTH_16 0 | |
50 | #define NRF51_TIMER_WIDTH_8 1 | |
51 | #define NRF51_TIMER_WIDTH_24 2 | |
52 | #define NRF51_TIMER_WIDTH_32 3 | |
53 | #define NRF51_TIMER_REG_PRESCALER 0x510 | |
54 | #define NRF51_TIMER_REG_PRESCALER_MASK 0x0F | |
55 | #define NRF51_TIMER_REG_CC0 0x540 | |
56 | #define NRF51_TIMER_REG_CC3 0x54C | |
57 | ||
db1015e9 | 58 | struct NRF51TimerState { |
c5a4829c SG |
59 | SysBusDevice parent_obj; |
60 | ||
61 | MemoryRegion iomem; | |
62 | qemu_irq irq; | |
63 | ||
27d6dea3 | 64 | uint8_t id; |
c5a4829c SG |
65 | QEMUTimer timer; |
66 | int64_t timer_start_ns; | |
67 | int64_t update_counter_ns; | |
68 | uint32_t counter; | |
69 | ||
70 | bool running; | |
71 | ||
72 | uint8_t events_compare[NRF51_TIMER_REG_COUNT]; | |
73 | uint32_t cc[NRF51_TIMER_REG_COUNT]; | |
74 | uint32_t shorts; | |
75 | uint32_t inten; | |
76 | uint32_t mode; | |
77 | uint32_t bitmode; | |
78 | uint32_t prescaler; | |
79 | ||
db1015e9 | 80 | }; |
c5a4829c SG |
81 | |
82 | ||
83 | #endif |