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53e72406 MZ |
1 | /* |
2 | * Copyright (C) 2012 ARM Ltd. | |
3 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __ASM_ARM_KVM_ARCH_TIMER_H | |
20 | #define __ASM_ARM_KVM_ARCH_TIMER_H | |
21 | ||
22 | #include <linux/clocksource.h> | |
23 | #include <linux/hrtimer.h> | |
24 | #include <linux/workqueue.h> | |
25 | ||
fbb4aeec | 26 | struct arch_timer_context { |
53e72406 | 27 | /* Registers: control register, timer value */ |
fbb4aeec JL |
28 | u32 cnt_ctl; |
29 | u64 cnt_cval; | |
30 | ||
31 | /* Timer IRQ */ | |
32 | struct kvm_irq_level irq; | |
33 | ||
34 | /* Active IRQ state caching */ | |
35 | bool active_cleared_last; | |
90de943a JL |
36 | |
37 | /* Virtual offset */ | |
38 | u64 cntvoff; | |
fbb4aeec | 39 | }; |
53e72406 | 40 | |
fbb4aeec JL |
41 | struct arch_timer_cpu { |
42 | struct arch_timer_context vtimer; | |
009a5701 | 43 | struct arch_timer_context ptimer; |
53e72406 MZ |
44 | |
45 | /* Background timer used when the guest is not running */ | |
46 | struct hrtimer timer; | |
47 | ||
48 | /* Work queued with the above timer expires */ | |
49 | struct work_struct expired; | |
50 | ||
51 | /* Background timer active */ | |
52 | bool armed; | |
53 | ||
41a54482 CD |
54 | /* Is the timer enabled */ |
55 | bool enabled; | |
53e72406 MZ |
56 | }; |
57 | ||
53e72406 | 58 | int kvm_timer_hyp_init(void); |
41a54482 | 59 | int kvm_timer_enable(struct kvm_vcpu *vcpu); |
85e69ad7 | 60 | int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu); |
53e72406 MZ |
61 | void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu); |
62 | void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu); | |
63 | void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu); | |
d9e13977 AG |
64 | bool kvm_timer_should_notify_user(struct kvm_vcpu *vcpu); |
65 | void kvm_timer_update_run(struct kvm_vcpu *vcpu); | |
53e72406 | 66 | void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu); |
1df08ba0 AB |
67 | |
68 | u64 kvm_arm_timer_get_reg(struct kvm_vcpu *, u64 regid); | |
69 | int kvm_arm_timer_set_reg(struct kvm_vcpu *, u64 regid, u64 value); | |
70 | ||
99a1db7a CD |
71 | int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); |
72 | int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); | |
73 | int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); | |
74 | ||
9171fa2e | 75 | bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx); |
d35268da CD |
76 | void kvm_timer_schedule(struct kvm_vcpu *vcpu); |
77 | void kvm_timer_unschedule(struct kvm_vcpu *vcpu); | |
1a748478 | 78 | |
7b6b4631 JL |
79 | u64 kvm_phys_timer_read(void); |
80 | ||
9b4a3004 MZ |
81 | void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu); |
82 | ||
488f94d7 | 83 | void kvm_timer_init_vhe(void); |
fbb4aeec JL |
84 | |
85 | #define vcpu_vtimer(v) (&(v)->arch.timer_cpu.vtimer) | |
009a5701 | 86 | #define vcpu_ptimer(v) (&(v)->arch.timer_cpu.ptimer) |
53e72406 | 87 | #endif |