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3b20eb23 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
88ef16d8 TN |
2 | /* |
3 | * Copyright (C) 2016, Semihalf | |
4 | * Author: Tomasz Nowicki <tn@semihalf.com> | |
88ef16d8 TN |
5 | */ |
6 | ||
7 | #ifndef __ACPI_IORT_H__ | |
8 | #define __ACPI_IORT_H__ | |
9 | ||
10 | #include <linux/acpi.h> | |
4bf2efd2 TN |
11 | #include <linux/fwnode.h> |
12 | #include <linux/irqdomain.h> | |
88ef16d8 | 13 | |
d6fcd3b1 LP |
14 | #define IORT_IRQ_MASK(irq) (irq & 0xffffffffULL) |
15 | #define IORT_IRQ_TRIGGER_MASK(irq) ((irq >> 32) & 0xffffffffULL) | |
16 | ||
24e51604 NL |
17 | /* |
18 | * PMCG model identifiers for use in smmu pmu driver. Please note | |
19 | * that this is purely for the use of software and has nothing to | |
20 | * do with hardware or with IORT specification. | |
21 | */ | |
22 | #define IORT_SMMU_V3_PMCG_GENERIC 0x00000000 /* Generic SMMUv3 PMCG */ | |
24062fe8 | 23 | #define IORT_SMMU_V3_PMCG_HISI_HIP08 0x00000001 /* HiSilicon HIP08 PMCG */ |
24e51604 | 24 | |
8b4282e6 SK |
25 | int iort_register_domain_token(int trans_id, phys_addr_t base, |
26 | struct fwnode_handle *fw_node); | |
4bf2efd2 TN |
27 | void iort_deregister_domain_token(int trans_id); |
28 | struct fwnode_handle *iort_find_domain_token(int trans_id); | |
88ef16d8 TN |
29 | #ifdef CONFIG_ACPI_IORT |
30 | void acpi_iort_init(void); | |
39c3cf56 | 31 | u32 iort_msi_map_id(struct device *dev, u32 id); |
d1718a1b LP |
32 | struct irq_domain *iort_get_device_domain(struct device *dev, u32 id, |
33 | enum irq_domain_bus_token bus_token); | |
d4f54a18 | 34 | void acpi_configure_pmsi_domain(struct device *dev); |
ae7c1838 | 35 | int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id); |
643b8e4d | 36 | /* IOMMU interface */ |
7ad42639 | 37 | void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *size); |
b8e069a2 LP |
38 | const struct iommu_ops *iort_iommu_configure_id(struct device *dev, |
39 | const u32 *id_in); | |
8b4282e6 | 40 | int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head); |
2b865293 | 41 | phys_addr_t acpi_iort_dma_get_max_cpu_address(void); |
88ef16d8 TN |
42 | #else |
43 | static inline void acpi_iort_init(void) { } | |
39c3cf56 LP |
44 | static inline u32 iort_msi_map_id(struct device *dev, u32 id) |
45 | { return id; } | |
d1718a1b LP |
46 | static inline struct irq_domain *iort_get_device_domain( |
47 | struct device *dev, u32 id, enum irq_domain_bus_token bus_token) | |
4bf2efd2 | 48 | { return NULL; } |
d4f54a18 | 49 | static inline void acpi_configure_pmsi_domain(struct device *dev) { } |
643b8e4d | 50 | /* IOMMU interface */ |
7ad42639 LP |
51 | static inline void iort_dma_setup(struct device *dev, u64 *dma_addr, |
52 | u64 *size) { } | |
b8e069a2 LP |
53 | static inline const struct iommu_ops *iort_iommu_configure_id( |
54 | struct device *dev, const u32 *id_in) | |
643b8e4d | 55 | { return NULL; } |
8b4282e6 SK |
56 | static inline |
57 | int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) | |
58 | { return 0; } | |
2b865293 AB |
59 | |
60 | static inline phys_addr_t acpi_iort_dma_get_max_cpu_address(void) | |
61 | { return PHYS_ADDR_MAX; } | |
88ef16d8 TN |
62 | #endif |
63 | ||
64 | #endif /* __ACPI_IORT_H__ */ |