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2fc7b156 RC |
1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* | |
3 | * Copyright (C) 2020 Google, Inc | |
4 | */ | |
5 | ||
6 | #ifndef __ADRENO_SMMU_PRIV_H | |
7 | #define __ADRENO_SMMU_PRIV_H | |
8 | ||
9 | #include <linux/io-pgtable.h> | |
10 | ||
11 | /** | |
12 | * struct adreno_smmu_priv - private interface between adreno-smmu and GPU | |
13 | * | |
14 | * @cookie: An opque token provided by adreno-smmu and passed | |
15 | * back into the callbacks | |
16 | * @get_ttbr1_cfg: Get the TTBR1 config for the GPUs context-bank | |
17 | * @set_ttbr0_cfg: Set the TTBR0 config for the GPUs context bank. A | |
18 | * NULL config disables TTBR0 translation, otherwise | |
19 | * TTBR0 translation is enabled with the specified cfg | |
20 | * | |
21 | * The GPU driver (drm/msm) and adreno-smmu work together for controlling | |
22 | * the GPU's SMMU instance. This is by necessity, as the GPU is directly | |
23 | * updating the SMMU for context switches, while on the other hand we do | |
24 | * not want to duplicate all of the initial setup logic from arm-smmu. | |
25 | * | |
26 | * This private interface is used for the two drivers to coordinate. The | |
27 | * cookie and callback functions are populated when the GPU driver attaches | |
28 | * it's domain. | |
29 | */ | |
30 | struct adreno_smmu_priv { | |
31 | const void *cookie; | |
32 | const struct io_pgtable_cfg *(*get_ttbr1_cfg)(const void *cookie); | |
33 | int (*set_ttbr0_cfg)(const void *cookie, const struct io_pgtable_cfg *cfg); | |
34 | }; | |
35 | ||
36 | #endif /* __ADRENO_SMMU_PRIV_H */ |