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1 | |
2 | /* | |
3 | Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
4 | Copyright 2003-2004 Jeff Garzik | |
5 | ||
6 | The contents of this file are subject to the Open | |
7 | Software License version 1.1 that can be found at | |
8 | http://www.opensource.org/licenses/osl-1.1.txt and is included herein | |
9 | by reference. | |
10 | ||
11 | Alternatively, the contents of this file may be used under the terms | |
12 | of the GNU General Public License version 2 (the "GPL") as distributed | |
13 | in the kernel source COPYING file, in which case the provisions of | |
14 | the GPL are applicable instead of the above. If you wish to allow | |
15 | the use of your version of this file only under the terms of the | |
16 | GPL and not to allow others to use your version of this file under | |
17 | the OSL, indicate your decision by deleting the provisions above and | |
18 | replace them with the notice and other provisions required by the GPL. | |
19 | If you do not delete the provisions above, a recipient may use your | |
20 | version of this file under either the OSL or the GPL. | |
21 | ||
22 | */ | |
23 | ||
24 | #ifndef __LINUX_ATA_H__ | |
25 | #define __LINUX_ATA_H__ | |
26 | ||
27 | #include <linux/types.h> | |
28 | ||
29 | /* defines only for the constants which don't work well as enums */ | |
30 | #define ATA_DMA_BOUNDARY 0xffffUL | |
31 | #define ATA_DMA_MASK 0xffffffffULL | |
32 | ||
33 | enum { | |
34 | /* various global constants */ | |
35 | ATA_MAX_DEVICES = 2, /* per bus/port */ | |
36 | ATA_MAX_PRD = 256, /* we could make these 256/256 */ | |
37 | ATA_SECT_SIZE = 512, | |
38 | ||
39 | ATA_ID_WORDS = 256, | |
40 | ATA_ID_PROD_OFS = 27, | |
41 | ATA_ID_FW_REV_OFS = 23, | |
42 | ATA_ID_SERNO_OFS = 10, | |
43 | ATA_ID_MAJOR_VER = 80, | |
44 | ATA_ID_PIO_MODES = 64, | |
45 | ATA_ID_MWDMA_MODES = 63, | |
46 | ATA_ID_UDMA_MODES = 88, | |
47 | ATA_ID_PIO4 = (1 << 1), | |
48 | ||
49 | ATA_PCI_CTL_OFS = 2, | |
50 | ATA_SERNO_LEN = 20, | |
51 | ATA_UDMA0 = (1 << 0), | |
52 | ATA_UDMA1 = ATA_UDMA0 | (1 << 1), | |
53 | ATA_UDMA2 = ATA_UDMA1 | (1 << 2), | |
54 | ATA_UDMA3 = ATA_UDMA2 | (1 << 3), | |
55 | ATA_UDMA4 = ATA_UDMA3 | (1 << 4), | |
56 | ATA_UDMA5 = ATA_UDMA4 | (1 << 5), | |
57 | ATA_UDMA6 = ATA_UDMA5 | (1 << 6), | |
58 | ATA_UDMA7 = ATA_UDMA6 | (1 << 7), | |
59 | /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */ | |
60 | ||
61 | ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */ | |
62 | ||
63 | /* DMA-related */ | |
64 | ATA_PRD_SZ = 8, | |
65 | ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ), | |
66 | ATA_PRD_EOT = (1 << 31), /* end-of-table flag */ | |
67 | ||
68 | ATA_DMA_TABLE_OFS = 4, | |
69 | ATA_DMA_STATUS = 2, | |
70 | ATA_DMA_CMD = 0, | |
71 | ATA_DMA_WR = (1 << 3), | |
72 | ATA_DMA_START = (1 << 0), | |
73 | ATA_DMA_INTR = (1 << 2), | |
74 | ATA_DMA_ERR = (1 << 1), | |
75 | ATA_DMA_ACTIVE = (1 << 0), | |
76 | ||
77 | /* bits in ATA command block registers */ | |
78 | ATA_HOB = (1 << 7), /* LBA48 selector */ | |
79 | ATA_NIEN = (1 << 1), /* disable-irq flag */ | |
80 | ATA_LBA = (1 << 6), /* LBA28 selector */ | |
81 | ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ | |
82 | ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ | |
83 | ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */ | |
84 | ATA_BUSY = (1 << 7), /* BSY status bit */ | |
85 | ATA_DRDY = (1 << 6), /* device ready */ | |
86 | ATA_DF = (1 << 5), /* device fault */ | |
87 | ATA_DRQ = (1 << 3), /* data request i/o */ | |
88 | ATA_ERR = (1 << 0), /* have an error */ | |
89 | ATA_SRST = (1 << 2), /* software reset */ | |
90 | ATA_ABORTED = (1 << 2), /* command aborted */ | |
91 | ||
92 | /* ATA command block registers */ | |
93 | ATA_REG_DATA = 0x00, | |
94 | ATA_REG_ERR = 0x01, | |
95 | ATA_REG_NSECT = 0x02, | |
96 | ATA_REG_LBAL = 0x03, | |
97 | ATA_REG_LBAM = 0x04, | |
98 | ATA_REG_LBAH = 0x05, | |
99 | ATA_REG_DEVICE = 0x06, | |
100 | ATA_REG_STATUS = 0x07, | |
101 | ||
102 | ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */ | |
103 | ATA_REG_CMD = ATA_REG_STATUS, | |
104 | ATA_REG_BYTEL = ATA_REG_LBAM, | |
105 | ATA_REG_BYTEH = ATA_REG_LBAH, | |
106 | ATA_REG_DEVSEL = ATA_REG_DEVICE, | |
107 | ATA_REG_IRQ = ATA_REG_NSECT, | |
108 | ||
109 | /* ATA device commands */ | |
110 | ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ | |
111 | ATA_CMD_EDD = 0x90, /* execute device diagnostic */ | |
112 | ATA_CMD_FLUSH = 0xE7, | |
113 | ATA_CMD_FLUSH_EXT = 0xEA, | |
114 | ATA_CMD_ID_ATA = 0xEC, | |
115 | ATA_CMD_ID_ATAPI = 0xA1, | |
116 | ATA_CMD_READ = 0xC8, | |
117 | ATA_CMD_READ_EXT = 0x25, | |
118 | ATA_CMD_WRITE = 0xCA, | |
119 | ATA_CMD_WRITE_EXT = 0x35, | |
120 | ATA_CMD_PIO_READ = 0x20, | |
121 | ATA_CMD_PIO_READ_EXT = 0x24, | |
122 | ATA_CMD_PIO_WRITE = 0x30, | |
123 | ATA_CMD_PIO_WRITE_EXT = 0x34, | |
124 | ATA_CMD_SET_FEATURES = 0xEF, | |
125 | ATA_CMD_PACKET = 0xA0, | |
126 | ATA_CMD_VERIFY = 0x40, | |
127 | ATA_CMD_VERIFY_EXT = 0x42, | |
128 | ||
129 | /* SETFEATURES stuff */ | |
130 | SETFEATURES_XFER = 0x03, | |
131 | XFER_UDMA_7 = 0x47, | |
132 | XFER_UDMA_6 = 0x46, | |
133 | XFER_UDMA_5 = 0x45, | |
134 | XFER_UDMA_4 = 0x44, | |
135 | XFER_UDMA_3 = 0x43, | |
136 | XFER_UDMA_2 = 0x42, | |
137 | XFER_UDMA_1 = 0x41, | |
138 | XFER_UDMA_0 = 0x40, | |
139 | XFER_MW_DMA_2 = 0x22, | |
140 | XFER_MW_DMA_1 = 0x21, | |
141 | XFER_MW_DMA_0 = 0x20, | |
142 | XFER_PIO_4 = 0x0C, | |
143 | XFER_PIO_3 = 0x0B, | |
144 | XFER_PIO_2 = 0x0A, | |
145 | XFER_PIO_1 = 0x09, | |
146 | XFER_PIO_0 = 0x08, | |
147 | XFER_SW_DMA_2 = 0x12, | |
148 | XFER_SW_DMA_1 = 0x11, | |
149 | XFER_SW_DMA_0 = 0x10, | |
150 | XFER_PIO_SLOW = 0x00, | |
151 | ||
152 | /* ATAPI stuff */ | |
153 | ATAPI_PKT_DMA = (1 << 0), | |
154 | ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: | |
155 | 0=to device, 1=to host */ | |
156 | ATAPI_CDB_LEN = 16, | |
157 | ||
158 | /* cable types */ | |
159 | ATA_CBL_NONE = 0, | |
160 | ATA_CBL_PATA40 = 1, | |
161 | ATA_CBL_PATA80 = 2, | |
162 | ATA_CBL_PATA_UNK = 3, | |
163 | ATA_CBL_SATA = 4, | |
164 | ||
165 | /* SATA Status and Control Registers */ | |
166 | SCR_STATUS = 0, | |
167 | SCR_ERROR = 1, | |
168 | SCR_CONTROL = 2, | |
169 | SCR_ACTIVE = 3, | |
170 | SCR_NOTIFICATION = 4, | |
171 | ||
172 | /* struct ata_taskfile flags */ | |
173 | ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */ | |
174 | ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ | |
175 | ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ | |
176 | ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ | |
177 | }; | |
178 | ||
179 | enum ata_tf_protocols { | |
180 | /* ATA taskfile protocols */ | |
181 | ATA_PROT_UNKNOWN, /* unknown/invalid */ | |
182 | ATA_PROT_NODATA, /* no data */ | |
183 | ATA_PROT_PIO, /* PIO single sector */ | |
184 | ATA_PROT_PIO_MULT, /* PIO multiple sector */ | |
185 | ATA_PROT_DMA, /* DMA */ | |
186 | ATA_PROT_ATAPI, /* packet command, PIO data xfer*/ | |
187 | ATA_PROT_ATAPI_NODATA, /* packet command, no data */ | |
188 | ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */ | |
189 | }; | |
190 | ||
191 | enum ata_ioctls { | |
192 | ATA_IOC_GET_IO32 = 0x309, | |
193 | ATA_IOC_SET_IO32 = 0x324, | |
194 | }; | |
195 | ||
196 | /* core structures */ | |
197 | ||
198 | struct ata_prd { | |
199 | u32 addr; | |
200 | u32 flags_len; | |
201 | }; | |
202 | ||
203 | struct ata_taskfile { | |
204 | unsigned long flags; /* ATA_TFLAG_xxx */ | |
205 | u8 protocol; /* ATA_PROT_xxx */ | |
206 | ||
207 | u8 ctl; /* control reg */ | |
208 | ||
209 | u8 hob_feature; /* additional data */ | |
210 | u8 hob_nsect; /* to support LBA48 */ | |
211 | u8 hob_lbal; | |
212 | u8 hob_lbam; | |
213 | u8 hob_lbah; | |
214 | ||
215 | u8 feature; | |
216 | u8 nsect; | |
217 | u8 lbal; | |
218 | u8 lbam; | |
219 | u8 lbah; | |
220 | ||
221 | u8 device; | |
222 | ||
223 | u8 command; /* IO operation */ | |
224 | }; | |
225 | ||
226 | #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) | |
6f2f3812 | 227 | #define ata_id_is_sata(id) ((id)[93] == 0) |
1da177e4 LT |
228 | #define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6)) |
229 | #define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5)) | |
230 | #define ata_id_has_flush(id) ((id)[83] & (1 << 12)) | |
231 | #define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13)) | |
232 | #define ata_id_has_lba48(id) ((id)[83] & (1 << 10)) | |
233 | #define ata_id_has_wcache(id) ((id)[82] & (1 << 5)) | |
234 | #define ata_id_has_pm(id) ((id)[82] & (1 << 3)) | |
235 | #define ata_id_has_lba(id) ((id)[49] & (1 << 9)) | |
236 | #define ata_id_has_dma(id) ((id)[49] & (1 << 8)) | |
237 | #define ata_id_removeable(id) ((id)[0] & (1 << 7)) | |
238 | #define ata_id_u32(id,n) \ | |
239 | (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)])) | |
240 | #define ata_id_u64(id,n) \ | |
241 | ( ((u64) (id)[(n) + 3] << 48) | \ | |
242 | ((u64) (id)[(n) + 2] << 32) | \ | |
243 | ((u64) (id)[(n) + 1] << 16) | \ | |
244 | ((u64) (id)[(n) + 0]) ) | |
245 | ||
246 | static inline int atapi_cdb_len(u16 *dev_id) | |
247 | { | |
248 | u16 tmp = dev_id[0] & 0x3; | |
249 | switch (tmp) { | |
250 | case 0: return 12; | |
251 | case 1: return 16; | |
252 | default: return -1; | |
253 | } | |
254 | } | |
255 | ||
256 | static inline int is_atapi_taskfile(struct ata_taskfile *tf) | |
257 | { | |
258 | return (tf->protocol == ATA_PROT_ATAPI) || | |
259 | (tf->protocol == ATA_PROT_ATAPI_NODATA) || | |
260 | (tf->protocol == ATA_PROT_ATAPI_DMA); | |
261 | } | |
262 | ||
263 | static inline int ata_ok(u8 status) | |
264 | { | |
265 | return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR)) | |
266 | == ATA_DRDY); | |
267 | } | |
268 | ||
269 | #endif /* __LINUX_ATA_H__ */ |