[mirror_ubuntu-artful-kernel.git] / include / linux / ata.h


/*
 *  Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
 *  Copyright 2003-2004 Jeff Garzik
 *
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; see the file COPYING.  If not, write to
 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *
 *  libata documentation is available via 'make {ps|pdf}docs',
 *  as Documentation/DocBook/libata.*
 *
 *  Hardware documentation available from http://www.t13.org/
 *
 */

#ifndef __LINUX_ATA_H__
#define __LINUX_ATA_H__

#include <linux/types.h>

/* defines only for the constants which don't work well as enums */
#define ATA_DMA_BOUNDARY	0xffffUL
#define ATA_DMA_MASK		0xffffffffULL

enum {
	/* various global constants */
	ATA_MAX_DEVICES		= 2,	/* per bus/port */
	ATA_MAX_PRD		= 256,	/* we could make these 256/256 */
	ATA_SECT_SIZE		= 512,
	ATA_MAX_SECTORS		= 256,
	ATA_MAX_SECTORS_LBA48	= 65535,/* TODO: 65536? */

	ATA_ID_WORDS		= 256,
	ATA_ID_SERNO_OFS	= 10,
	ATA_ID_FW_REV_OFS	= 23,
	ATA_ID_PROD_OFS		= 27,
	ATA_ID_OLD_PIO_MODES	= 51,
	ATA_ID_FIELD_VALID	= 53,
	ATA_ID_MWDMA_MODES	= 63,
	ATA_ID_PIO_MODES	= 64,
	ATA_ID_EIDE_DMA_MIN	= 65,
	ATA_ID_EIDE_PIO		= 67,
	ATA_ID_EIDE_PIO_IORDY	= 68,
	ATA_ID_UDMA_MODES	= 88,
	ATA_ID_MAJOR_VER	= 80,
	ATA_ID_PIO4		= (1 << 1),

	ATA_PCI_CTL_OFS		= 2,
	ATA_SERNO_LEN		= 20,
	ATA_UDMA0		= (1 << 0),
	ATA_UDMA1		= ATA_UDMA0 | (1 << 1),
	ATA_UDMA2		= ATA_UDMA1 | (1 << 2),
	ATA_UDMA3		= ATA_UDMA2 | (1 << 3),
	ATA_UDMA4		= ATA_UDMA3 | (1 << 4),
	ATA_UDMA5		= ATA_UDMA4 | (1 << 5),
	ATA_UDMA6		= ATA_UDMA5 | (1 << 6),
	ATA_UDMA7		= ATA_UDMA6 | (1 << 7),
	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?).  */

	ATA_UDMA_MASK_40C	= ATA_UDMA2,	/* udma0-2 */

	/* DMA-related */
	ATA_PRD_SZ		= 8,
	ATA_PRD_TBL_SZ		= (ATA_MAX_PRD * ATA_PRD_SZ),
	ATA_PRD_EOT		= (1 << 31),	/* end-of-table flag */

	ATA_DMA_TABLE_OFS	= 4,
	ATA_DMA_STATUS		= 2,
	ATA_DMA_CMD		= 0,
	ATA_DMA_WR		= (1 << 3),
	ATA_DMA_START		= (1 << 0),
	ATA_DMA_INTR		= (1 << 2),
	ATA_DMA_ERR		= (1 << 1),
	ATA_DMA_ACTIVE		= (1 << 0),

	/* bits in ATA command block registers */
	ATA_HOB			= (1 << 7),	/* LBA48 selector */
	ATA_NIEN		= (1 << 1),	/* disable-irq flag */
	ATA_LBA			= (1 << 6),	/* LBA28 selector */
	ATA_DEV1		= (1 << 4),	/* Select Device 1 (slave) */
	ATA_DEVICE_OBS		= (1 << 7) | (1 << 5), /* obs bits in dev reg */
	ATA_DEVCTL_OBS		= (1 << 3),	/* obsolete bit in devctl reg */
	ATA_BUSY		= (1 << 7),	/* BSY status bit */
	ATA_DRDY		= (1 << 6),	/* device ready */
	ATA_DF			= (1 << 5),	/* device fault */
	ATA_DRQ			= (1 << 3),	/* data request i/o */
	ATA_ERR			= (1 << 0),	/* have an error */
	ATA_SRST		= (1 << 2),	/* software reset */
	ATA_ICRC		= (1 << 7),	/* interface CRC error */
	ATA_UNC			= (1 << 6),	/* uncorrectable media error */
	ATA_IDNF		= (1 << 4),	/* ID not found */
	ATA_ABORTED		= (1 << 2),	/* command aborted */

	/* ATA command block registers */
	ATA_REG_DATA		= 0x00,
	ATA_REG_ERR		= 0x01,
	ATA_REG_NSECT		= 0x02,
	ATA_REG_LBAL		= 0x03,
	ATA_REG_LBAM		= 0x04,
	ATA_REG_LBAH		= 0x05,
	ATA_REG_DEVICE		= 0x06,
	ATA_REG_STATUS		= 0x07,

	ATA_REG_FEATURE		= ATA_REG_ERR, /* and their aliases */
	ATA_REG_CMD		= ATA_REG_STATUS,
	ATA_REG_BYTEL		= ATA_REG_LBAM,
	ATA_REG_BYTEH		= ATA_REG_LBAH,
	ATA_REG_DEVSEL		= ATA_REG_DEVICE,
	ATA_REG_IRQ		= ATA_REG_NSECT,

	/* ATA device commands */
	ATA_CMD_CHK_POWER	= 0xE5, /* check power mode */
	ATA_CMD_STANDBY		= 0xE2, /* place in standby power mode */
	ATA_CMD_IDLE		= 0xE3, /* place in idle power mode */
	ATA_CMD_EDD		= 0x90,	/* execute device diagnostic */
	ATA_CMD_FLUSH		= 0xE7,
	ATA_CMD_FLUSH_EXT	= 0xEA,
	ATA_CMD_ID_ATA		= 0xEC,
	ATA_CMD_ID_ATAPI	= 0xA1,
	ATA_CMD_READ		= 0xC8,
	ATA_CMD_READ_EXT	= 0x25,
	ATA_CMD_WRITE		= 0xCA,
	ATA_CMD_WRITE_EXT	= 0x35,
	ATA_CMD_WRITE_FUA_EXT	= 0x3D,
	ATA_CMD_FPDMA_READ	= 0x60,
	ATA_CMD_FPDMA_WRITE	= 0x61,
	ATA_CMD_PIO_READ	= 0x20,
	ATA_CMD_PIO_READ_EXT	= 0x24,
	ATA_CMD_PIO_WRITE	= 0x30,
	ATA_CMD_PIO_WRITE_EXT	= 0x34,
	ATA_CMD_READ_MULTI	= 0xC4,
	ATA_CMD_READ_MULTI_EXT	= 0x29,
	ATA_CMD_WRITE_MULTI	= 0xC5,
	ATA_CMD_WRITE_MULTI_EXT	= 0x39,
	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
	ATA_CMD_SET_FEATURES	= 0xEF,
	ATA_CMD_PACKET		= 0xA0,
	ATA_CMD_VERIFY		= 0x40,
	ATA_CMD_VERIFY_EXT	= 0x42,
 	ATA_CMD_STANDBYNOW1	= 0xE0,
 	ATA_CMD_IDLEIMMEDIATE	= 0xE1,
	ATA_CMD_INIT_DEV_PARAMS	= 0x91,
	ATA_CMD_READ_NATIVE_MAX	= 0xF8,
	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
	ATA_CMD_READ_LOG_EXT	= 0x2f,

	/* READ_LOG_EXT pages */
	ATA_LOG_SATA_NCQ	= 0x10,

	/* SETFEATURES stuff */
	SETFEATURES_XFER	= 0x03,
	XFER_UDMA_7		= 0x47,
	XFER_UDMA_6		= 0x46,
	XFER_UDMA_5		= 0x45,
	XFER_UDMA_4		= 0x44,
	XFER_UDMA_3		= 0x43,
	XFER_UDMA_2		= 0x42,
	XFER_UDMA_1		= 0x41,
	XFER_UDMA_0		= 0x40,
	XFER_MW_DMA_2		= 0x22,
	XFER_MW_DMA_1		= 0x21,
	XFER_MW_DMA_0		= 0x20,
	XFER_SW_DMA_2		= 0x12,
	XFER_SW_DMA_1		= 0x11,
	XFER_SW_DMA_0		= 0x10,
	XFER_PIO_4		= 0x0C,
	XFER_PIO_3		= 0x0B,
	XFER_PIO_2		= 0x0A,
	XFER_PIO_1		= 0x09,
	XFER_PIO_0		= 0x08,
	XFER_PIO_SLOW		= 0x00,

	SETFEATURES_WC_ON	= 0x02, /* Enable write cache */
	SETFEATURES_WC_OFF	= 0x82, /* Disable write cache */

	/* ATAPI stuff */
	ATAPI_PKT_DMA		= (1 << 0),
	ATAPI_DMADIR		= (1 << 2),	/* ATAPI data dir:
						   0=to device, 1=to host */
	ATAPI_CDB_LEN		= 16,

	/* cable types */
	ATA_CBL_NONE		= 0,
	ATA_CBL_PATA40		= 1,
	ATA_CBL_PATA80		= 2,
	ATA_CBL_PATA_UNK	= 3,
	ATA_CBL_SATA		= 4,

	/* SATA Status and Control Registers */
	SCR_STATUS		= 0,
	SCR_ERROR		= 1,
	SCR_CONTROL		= 2,
	SCR_ACTIVE		= 3,
	SCR_NOTIFICATION	= 4,

	/* SError bits */
	SERR_DATA_RECOVERED	= (1 << 0), /* recovered data error */
	SERR_COMM_RECOVERED	= (1 << 1), /* recovered comm failure */
	SERR_DATA		= (1 << 8), /* unrecovered data error */
	SERR_PERSISTENT		= (1 << 9), /* persistent data/comm error */
	SERR_PROTOCOL		= (1 << 10), /* protocol violation */
	SERR_INTERNAL		= (1 << 11), /* host internal error */
	SERR_PHYRDY_CHG		= (1 << 16), /* PHY RDY changed */
	SERR_DEV_XCHG		= (1 << 26), /* device exchanged */

	/* struct ata_taskfile flags */
	ATA_TFLAG_LBA48		= (1 << 0), /* enable 48-bit LBA and "HOB" */
	ATA_TFLAG_ISADDR	= (1 << 1), /* enable r/w to nsect/lba regs */
	ATA_TFLAG_DEVICE	= (1 << 2), /* enable r/w to device reg */
	ATA_TFLAG_WRITE		= (1 << 3), /* data dir: host->dev==1 (write) */
	ATA_TFLAG_LBA		= (1 << 4), /* enable LBA */
	ATA_TFLAG_FUA		= (1 << 5), /* enable FUA */
	ATA_TFLAG_POLLING	= (1 << 6), /* set nIEN to 1 and use polling */
};

enum ata_tf_protocols {
	/* ATA taskfile protocols */
	ATA_PROT_UNKNOWN,	/* unknown/invalid */
	ATA_PROT_NODATA,	/* no data */
	ATA_PROT_PIO,		/* PIO single sector */
	ATA_PROT_DMA,		/* DMA */
	ATA_PROT_NCQ,		/* NCQ */
	ATA_PROT_ATAPI,		/* packet command, PIO data xfer*/
	ATA_PROT_ATAPI_NODATA,	/* packet command, no data */
	ATA_PROT_ATAPI_DMA,	/* packet command with special DMA sauce */
};

enum ata_ioctls {
	ATA_IOC_GET_IO32	= 0x309,
	ATA_IOC_SET_IO32	= 0x324,
};

/* core structures */

struct ata_prd {
	u32			addr;
	u32			flags_len;
};

struct ata_taskfile {
	unsigned long		flags;		/* ATA_TFLAG_xxx */
	u8			protocol;	/* ATA_PROT_xxx */

	u8			ctl;		/* control reg */

	u8			hob_feature;	/* additional data */
	u8			hob_nsect;	/* to support LBA48 */
	u8			hob_lbal;
	u8			hob_lbam;
	u8			hob_lbah;

	u8			feature;
	u8			nsect;
	u8			lbal;
	u8			lbam;
	u8			lbah;

	u8			device;

	u8			command;	/* IO operation */
};

#define ata_id_is_ata(id)	(((id)[0] & (1 << 15)) == 0)
#define ata_id_is_cfa(id)	((id)[0] == 0x848A)
#define ata_id_is_sata(id)	((id)[93] == 0)
#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
#define ata_id_hpa_enabled(id)	((id)[85] & (1 << 10))
#define ata_id_has_fua(id)	((id)[84] & (1 << 6))
#define ata_id_has_flush(id)	((id)[83] & (1 << 12))
#define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13))
#define ata_id_has_lba48(id)	((id)[83] & (1 << 10))
#define ata_id_has_hpa(id)	((id)[82] & (1 << 10))
#define ata_id_has_wcache(id)	((id)[82] & (1 << 5))
#define ata_id_has_pm(id)	((id)[82] & (1 << 3))
#define ata_id_has_lba(id)	((id)[49] & (1 << 9))
#define ata_id_has_dma(id)	((id)[49] & (1 << 8))
#define ata_id_has_ncq(id)	((id)[76] & (1 << 8))
#define ata_id_queue_depth(id)	(((id)[75] & 0x1f) + 1)
#define ata_id_removeable(id)	((id)[0] & (1 << 7))
#define ata_id_has_dword_io(id)	((id)[50] & (1 << 0))
#define ata_id_u32(id,n)	\
	(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
#define ata_id_u64(id,n)	\
	( ((u64) (id)[(n) + 3] << 48) |	\
	  ((u64) (id)[(n) + 2] << 32) |	\
	  ((u64) (id)[(n) + 1] << 16) |	\
	  ((u64) (id)[(n) + 0]) )

#define ata_id_cdb_intr(id)	(((id)[0] & 0x60) == 0x20)

static inline unsigned int ata_id_major_version(const u16 *id)
{
	unsigned int mver;

	for (mver = 14; mver >= 1; mver--)
		if (id[ATA_ID_MAJOR_VER] & (1 << mver))
			break;
	return mver;
}

static inline int ata_id_current_chs_valid(const u16 *id)
{
	/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command 
	   has not been issued to the device then the values of 
	   id[54] to id[56] are vendor specific. */
	return (id[53] & 0x01) && /* Current translation valid */
		id[54] &&  /* cylinders in current translation */
		id[55] &&  /* heads in current translation */
		id[55] <= 16 &&
		id[56];    /* sectors in current translation */
}

static inline int atapi_cdb_len(const u16 *dev_id)
{
	u16 tmp = dev_id[0] & 0x3;
	switch (tmp) {
	case 0:		return 12;
	case 1:		return 16;
	default:	return -1;
	}
}

static inline int is_atapi_taskfile(const struct ata_taskfile *tf)
{
	return (tf->protocol == ATA_PROT_ATAPI) ||
	       (tf->protocol == ATA_PROT_ATAPI_NODATA) ||
	       (tf->protocol == ATA_PROT_ATAPI_DMA);
}

static inline int is_multi_taskfile(struct ata_taskfile *tf)
{
	return (tf->command == ATA_CMD_READ_MULTI) ||
	       (tf->command == ATA_CMD_WRITE_MULTI) ||
	       (tf->command == ATA_CMD_READ_MULTI_EXT) ||
	       (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
	       (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
}

static inline int ata_ok(u8 status)
{
	return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
			== ATA_DRDY);
}

static inline int lba_28_ok(u64 block, u32 n_block)
{
	/* check the ending block number */
	return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
}

static inline int lba_48_ok(u64 block, u32 n_block)
{
	/* check the ending block number */
	return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
}

#endif /* __LINUX_ATA_H__ */
Commit	Line	Data
1da177e4 LT	1
1da177e4 LT	2	/*
af36d7f0 JG	3	* Copyright 2003-2004 Red Hat, Inc. All rights reserved.
	4	* Copyright 2003-2004 Jeff Garzik
	5	*
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2, or (at your option)
	10	* any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; see the file COPYING. If not, write to
	19	* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*
	21	*
	22	* libata documentation is available via 'make {ps\|pdf}docs',
	23	* as Documentation/DocBook/libata.*
	24	*
	25	* Hardware documentation available from http://www.t13.org/
	26	*
1da177e4 LT	27	*/
	28
	29	#ifndef __LINUX_ATA_H__
	30	#define __LINUX_ATA_H__
	31
	32	#include <linux/types.h>
	33
	34	/* defines only for the constants which don't work well as enums */
	35	#define ATA_DMA_BOUNDARY 0xffffUL
	36	#define ATA_DMA_MASK 0xffffffffULL
	37
	38	enum {
	39	/* various global constants */
	40	ATA_MAX_DEVICES = 2, /* per bus/port */
	41	ATA_MAX_PRD = 256, /* we could make these 256/256 */
	42	ATA_SECT_SIZE = 512,
8b881b04 JG	43	ATA_MAX_SECTORS = 256,
8b881b04 JG	44	ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */
1da177e4 LT	45
1da177e4 LT	46	ATA_ID_WORDS = 256,
1da177e4	47	ATA_ID_SERNO_OFS = 10,
11e29e21 AC	48	ATA_ID_FW_REV_OFS = 23,
	49	ATA_ID_PROD_OFS = 27,
	50	ATA_ID_OLD_PIO_MODES = 51,
	51	ATA_ID_FIELD_VALID = 53,
1da177e4	52	ATA_ID_MWDMA_MODES = 63,
11e29e21 AC	53	ATA_ID_PIO_MODES = 64,
	54	ATA_ID_EIDE_DMA_MIN = 65,
	55	ATA_ID_EIDE_PIO = 67,
	56	ATA_ID_EIDE_PIO_IORDY = 68,
1da177e4	57	ATA_ID_UDMA_MODES = 88,
11e29e21	58	ATA_ID_MAJOR_VER = 80,
1da177e4 LT	59	ATA_ID_PIO4 = (1 << 1),
	60
	61	ATA_PCI_CTL_OFS = 2,
	62	ATA_SERNO_LEN = 20,
	63	ATA_UDMA0 = (1 << 0),
	64	ATA_UDMA1 = ATA_UDMA0 \| (1 << 1),
	65	ATA_UDMA2 = ATA_UDMA1 \| (1 << 2),
	66	ATA_UDMA3 = ATA_UDMA2 \| (1 << 3),
	67	ATA_UDMA4 = ATA_UDMA3 \| (1 << 4),
	68	ATA_UDMA5 = ATA_UDMA4 \| (1 << 5),
	69	ATA_UDMA6 = ATA_UDMA5 \| (1 << 6),
	70	ATA_UDMA7 = ATA_UDMA6 \| (1 << 7),
	71	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
	72
	73	ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
	74
	75	/* DMA-related */
	76	ATA_PRD_SZ = 8,
	77	ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
	78	ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
	79
	80	ATA_DMA_TABLE_OFS = 4,
	81	ATA_DMA_STATUS = 2,
	82	ATA_DMA_CMD = 0,
	83	ATA_DMA_WR = (1 << 3),
	84	ATA_DMA_START = (1 << 0),
	85	ATA_DMA_INTR = (1 << 2),
	86	ATA_DMA_ERR = (1 << 1),
	87	ATA_DMA_ACTIVE = (1 << 0),
	88
	89	/* bits in ATA command block registers */
	90	ATA_HOB = (1 << 7), /* LBA48 selector */
	91	ATA_NIEN = (1 << 1), /* disable-irq flag */
	92	ATA_LBA = (1 << 6), /* LBA28 selector */
	93	ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
	94	ATA_DEVICE_OBS = (1 << 7) \| (1 << 5), /* obs bits in dev reg */
	95	ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
	96	ATA_BUSY = (1 << 7), /* BSY status bit */
	97	ATA_DRDY = (1 << 6), /* device ready */
	98	ATA_DF = (1 << 5), /* device fault */
	99	ATA_DRQ = (1 << 3), /* data request i/o */
	100	ATA_ERR = (1 << 0), /* have an error */
	101	ATA_SRST = (1 << 2), /* software reset */
9be1e979 TH	102	ATA_ICRC = (1 << 7), /* interface CRC error */
	103	ATA_UNC = (1 << 6), /* uncorrectable media error */
	104	ATA_IDNF = (1 << 4), /* ID not found */
1da177e4 LT	105	ATA_ABORTED = (1 << 2), /* command aborted */
	106
	107	/* ATA command block registers */
	108	ATA_REG_DATA = 0x00,
	109	ATA_REG_ERR = 0x01,
	110	ATA_REG_NSECT = 0x02,
	111	ATA_REG_LBAL = 0x03,
	112	ATA_REG_LBAM = 0x04,
	113	ATA_REG_LBAH = 0x05,
	114	ATA_REG_DEVICE = 0x06,
	115	ATA_REG_STATUS = 0x07,
	116
	117	ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
	118	ATA_REG_CMD = ATA_REG_STATUS,
	119	ATA_REG_BYTEL = ATA_REG_LBAM,
	120	ATA_REG_BYTEH = ATA_REG_LBAH,
	121	ATA_REG_DEVSEL = ATA_REG_DEVICE,
	122	ATA_REG_IRQ = ATA_REG_NSECT,
	123
	124	/* ATA device commands */
	125	ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
972dcafb DG	126	ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
972dcafb DG	127	ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
1da177e4 LT	128	ATA_CMD_EDD = 0x90, /* execute device diagnostic */
	129	ATA_CMD_FLUSH = 0xE7,
	130	ATA_CMD_FLUSH_EXT = 0xEA,
	131	ATA_CMD_ID_ATA = 0xEC,
	132	ATA_CMD_ID_ATAPI = 0xA1,
	133	ATA_CMD_READ = 0xC8,
	134	ATA_CMD_READ_EXT = 0x25,
	135	ATA_CMD_WRITE = 0xCA,
	136	ATA_CMD_WRITE_EXT = 0x35,
9a3dccc4	137	ATA_CMD_WRITE_FUA_EXT = 0x3D,
88e49034 TH	138	ATA_CMD_FPDMA_READ = 0x60,
88e49034 TH	139	ATA_CMD_FPDMA_WRITE = 0x61,
1da177e4 LT	140	ATA_CMD_PIO_READ = 0x20,
	141	ATA_CMD_PIO_READ_EXT = 0x24,
	142	ATA_CMD_PIO_WRITE = 0x30,
	143	ATA_CMD_PIO_WRITE_EXT = 0x34,
8cbd6df1 AL	144	ATA_CMD_READ_MULTI = 0xC4,
	145	ATA_CMD_READ_MULTI_EXT = 0x29,
	146	ATA_CMD_WRITE_MULTI = 0xC5,
	147	ATA_CMD_WRITE_MULTI_EXT = 0x39,
9a3dccc4	148	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
1da177e4 LT	149	ATA_CMD_SET_FEATURES = 0xEF,
	150	ATA_CMD_PACKET = 0xA0,
	151	ATA_CMD_VERIFY = 0x40,
	152	ATA_CMD_VERIFY_EXT = 0x42,
9b847548 JA	153	ATA_CMD_STANDBYNOW1 = 0xE0,
9b847548 JA	154	ATA_CMD_IDLEIMMEDIATE = 0xE1,
8bf62ece	155	ATA_CMD_INIT_DEV_PARAMS = 0x91,
b6782728 AC	156	ATA_CMD_READ_NATIVE_MAX = 0xF8,
b6782728 AC	157	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
88e49034 TH	158	ATA_CMD_READ_LOG_EXT = 0x2f,
	159
	160	/* READ_LOG_EXT pages */
	161	ATA_LOG_SATA_NCQ = 0x10,
1da177e4 LT	162
	163	/* SETFEATURES stuff */
	164	SETFEATURES_XFER = 0x03,
	165	XFER_UDMA_7 = 0x47,
	166	XFER_UDMA_6 = 0x46,
	167	XFER_UDMA_5 = 0x45,
	168	XFER_UDMA_4 = 0x44,
	169	XFER_UDMA_3 = 0x43,
	170	XFER_UDMA_2 = 0x42,
	171	XFER_UDMA_1 = 0x41,
	172	XFER_UDMA_0 = 0x40,
	173	XFER_MW_DMA_2 = 0x22,
	174	XFER_MW_DMA_1 = 0x21,
	175	XFER_MW_DMA_0 = 0x20,
b4b52db7 AC	176	XFER_SW_DMA_2 = 0x12,
	177	XFER_SW_DMA_1 = 0x11,
	178	XFER_SW_DMA_0 = 0x10,
1da177e4 LT	179	XFER_PIO_4 = 0x0C,
	180	XFER_PIO_3 = 0x0B,
	181	XFER_PIO_2 = 0x0A,
	182	XFER_PIO_1 = 0x09,
	183	XFER_PIO_0 = 0x08,
1da177e4 LT	184	XFER_PIO_SLOW = 0x00,
1da177e4 LT	185
3057ac3c	186	SETFEATURES_WC_ON = 0x02, /* Enable write cache */
	187	SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
	188
1da177e4 LT	189	/* ATAPI stuff */
	190	ATAPI_PKT_DMA = (1 << 0),
	191	ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
	192	0=to device, 1=to host */
	193	ATAPI_CDB_LEN = 16,
	194
	195	/* cable types */
	196	ATA_CBL_NONE = 0,
	197	ATA_CBL_PATA40 = 1,
	198	ATA_CBL_PATA80 = 2,
	199	ATA_CBL_PATA_UNK = 3,
	200	ATA_CBL_SATA = 4,
	201
	202	/* SATA Status and Control Registers */
	203	SCR_STATUS = 0,
	204	SCR_ERROR = 1,
	205	SCR_CONTROL = 2,
	206	SCR_ACTIVE = 3,
	207	SCR_NOTIFICATION = 4,
	208
9be1e979 TH	209	/* SError bits */
	210	SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
	211	SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
	212	SERR_DATA = (1 << 8), /* unrecovered data error */
	213	SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
	214	SERR_PROTOCOL = (1 << 10), /* protocol violation */
	215	SERR_INTERNAL = (1 << 11), /* host internal error */
	216	SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
	217	SERR_DEV_XCHG = (1 << 26), /* device exchanged */
	218
1da177e4 LT	219	/* struct ata_taskfile flags */
	220	ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
	221	ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
	222	ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
	223	ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
8bf62ece	224	ATA_TFLAG_LBA = (1 << 4), /* enable LBA */
9a3dccc4	225	ATA_TFLAG_FUA = (1 << 5), /* enable FUA */
ea9b395f	226	ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */
1da177e4 LT	227	};
	228
	229	enum ata_tf_protocols {
	230	/* ATA taskfile protocols */
	231	ATA_PROT_UNKNOWN, /* unknown/invalid */
	232	ATA_PROT_NODATA, /* no data */
	233	ATA_PROT_PIO, /* PIO single sector */
1da177e4	234	ATA_PROT_DMA, /* DMA */
88e49034	235	ATA_PROT_NCQ, /* NCQ */
1da177e4 LT	236	ATA_PROT_ATAPI, /* packet command, PIO data xfer*/
	237	ATA_PROT_ATAPI_NODATA, /* packet command, no data */
	238	ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */
	239	};
	240
	241	enum ata_ioctls {
	242	ATA_IOC_GET_IO32 = 0x309,
	243	ATA_IOC_SET_IO32 = 0x324,
	244	};
	245
	246	/* core structures */
	247
	248	struct ata_prd {
	249	u32 addr;
	250	u32 flags_len;
	251	};
	252
	253	struct ata_taskfile {
	254	unsigned long flags; /* ATA_TFLAG_xxx */
	255	u8 protocol; /* ATA_PROT_xxx */
	256
	257	u8 ctl; /* control reg */
	258
	259	u8 hob_feature; /* additional data */
	260	u8 hob_nsect; /* to support LBA48 */
	261	u8 hob_lbal;
	262	u8 hob_lbam;
	263	u8 hob_lbah;
	264
	265	u8 feature;
	266	u8 nsect;
	267	u8 lbal;
	268	u8 lbam;
	269	u8 lbah;
	270
	271	u8 device;
	272
	273	u8 command; /* IO operation */
	274	};
	275
	276	#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
b6782728	277	#define ata_id_is_cfa(id) ((id)[0] == 0x848A)
6f2f3812	278	#define ata_id_is_sata(id) ((id)[93] == 0)
1da177e4 LT	279	#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
1da177e4 LT	280	#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
b6782728	281	#define ata_id_hpa_enabled(id) ((id)[85] & (1 << 10))
9a3dccc4 TH	282	#define ata_id_has_fua(id) ((id)[84] & (1 << 6))
9a3dccc4 TH	283	#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
1da177e4 LT	284	#define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13))
1da177e4 LT	285	#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
b6782728	286	#define ata_id_has_hpa(id) ((id)[82] & (1 << 10))
1da177e4 LT	287	#define ata_id_has_wcache(id) ((id)[82] & (1 << 5))
	288	#define ata_id_has_pm(id) ((id)[82] & (1 << 3))
	289	#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
	290	#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
88e49034 TH	291	#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
88e49034 TH	292	#define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
1da177e4	293	#define ata_id_removeable(id) ((id)[0] & (1 << 7))
b6782728	294	#define ata_id_has_dword_io(id) ((id)[50] & (1 << 0))
1da177e4 LT	295	#define ata_id_u32(id,n) \
	296	(((u32) (id)[(n) + 1] << 16) \| ((u32) (id)[(n)]))
	297	#define ata_id_u64(id,n) \
	298	( ((u64) (id)[(n) + 3] << 48) \| \
	299	((u64) (id)[(n) + 2] << 32) \| \
	300	((u64) (id)[(n) + 1] << 16) \| \
	301	((u64) (id)[(n) + 0]) )
	302
312f7da2 AL	303	#define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
312f7da2 AL	304
3d2ca910 TH	305	static inline unsigned int ata_id_major_version(const u16 *id)
	306	{
	307	unsigned int mver;
	308
	309	for (mver = 14; mver >= 1; mver--)
	310	if (id[ATA_ID_MAJOR_VER] & (1 << mver))
	311	break;
	312	return mver;
	313	}
	314
057ace5e	315	static inline int ata_id_current_chs_valid(const u16 *id)
8bf62ece AL	316	{
	317	/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
	318	has not been issued to the device then the values of
	319	id[54] to id[56] are vendor specific. */
	320	return (id[53] & 0x01) && /* Current translation valid */
	321	id[54] && /* cylinders in current translation */
	322	id[55] && /* heads in current translation */
	323	id[55] <= 16 &&
	324	id[56]; /* sectors in current translation */
	325	}
	326
057ace5e	327	static inline int atapi_cdb_len(const u16 *dev_id)
1da177e4 LT	328	{
	329	u16 tmp = dev_id[0] & 0x3;
	330	switch (tmp) {
	331	case 0: return 12;
	332	case 1: return 16;
	333	default: return -1;
	334	}
	335	}
	336
057ace5e	337	static inline int is_atapi_taskfile(const struct ata_taskfile *tf)
1da177e4 LT	338	{
	339	return (tf->protocol == ATA_PROT_ATAPI) \|\|
	340	(tf->protocol == ATA_PROT_ATAPI_NODATA) \|\|
	341	(tf->protocol == ATA_PROT_ATAPI_DMA);
	342	}
	343
07f6f7d0 AL	344	static inline int is_multi_taskfile(struct ata_taskfile *tf)
	345	{
	346	return (tf->command == ATA_CMD_READ_MULTI) \|\|
	347	(tf->command == ATA_CMD_WRITE_MULTI) \|\|
	348	(tf->command == ATA_CMD_READ_MULTI_EXT) \|\|
c2956a3b AL	349	(tf->command == ATA_CMD_WRITE_MULTI_EXT) \|\|
c2956a3b AL	350	(tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
07f6f7d0 AL	351	}
07f6f7d0 AL	352
1da177e4 LT	353	static inline int ata_ok(u8 status)
	354	{
	355	return ((status & (ATA_BUSY \| ATA_DRDY \| ATA_DF \| ATA_DRQ \| ATA_ERR))
	356	== ATA_DRDY);
	357	}
	358
c6a33e24 AL	359	static inline int lba_28_ok(u64 block, u32 n_block)
	360	{
	361	/* check the ending block number */
	362	return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
	363	}
	364
	365	static inline int lba_48_ok(u64 block, u32 n_block)
	366	{
	367	/* check the ending block number */
	368	return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
	369	}
	370
1da177e4	371	#endif /* __LINUX_ATA_H__ */