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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | #ifndef _LINUX_BITOPS_H |
3 | #define _LINUX_BITOPS_H | |
4 | #include <asm/types.h> | |
cd913db1 | 5 | #include <linux/bits.h> |
1da177e4 | 6 | |
ede9c697 | 7 | #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) |
10ef6b0d | 8 | |
4677d4a5 BP |
9 | extern unsigned int __sw_hweight8(unsigned int w); |
10 | extern unsigned int __sw_hweight16(unsigned int w); | |
11 | extern unsigned int __sw_hweight32(unsigned int w); | |
12 | extern unsigned long __sw_hweight64(__u64 w); | |
13 | ||
1da177e4 LT |
14 | /* |
15 | * Include this here because some architectures need generic_ffs/fls in | |
16 | * scope | |
17 | */ | |
18 | #include <asm/bitops.h> | |
19 | ||
984b3f57 | 20 | #define for_each_set_bit(bit, addr, size) \ |
1e2ad28f RR |
21 | for ((bit) = find_first_bit((addr), (size)); \ |
22 | (bit) < (size); \ | |
23 | (bit) = find_next_bit((addr), (size), (bit) + 1)) | |
24 | ||
25 | /* same as for_each_set_bit() but use bit as value to start with */ | |
307b1cd7 | 26 | #define for_each_set_bit_from(bit, addr, size) \ |
1e2ad28f RR |
27 | for ((bit) = find_next_bit((addr), (size), (bit)); \ |
28 | (bit) < (size); \ | |
3e037454 SN |
29 | (bit) = find_next_bit((addr), (size), (bit) + 1)) |
30 | ||
03f4a822 AM |
31 | #define for_each_clear_bit(bit, addr, size) \ |
32 | for ((bit) = find_first_zero_bit((addr), (size)); \ | |
33 | (bit) < (size); \ | |
34 | (bit) = find_next_zero_bit((addr), (size), (bit) + 1)) | |
35 | ||
36 | /* same as for_each_clear_bit() but use bit as value to start with */ | |
37 | #define for_each_clear_bit_from(bit, addr, size) \ | |
38 | for ((bit) = find_next_zero_bit((addr), (size), (bit)); \ | |
39 | (bit) < (size); \ | |
40 | (bit) = find_next_zero_bit((addr), (size), (bit) + 1)) | |
41 | ||
1a1d48a4 | 42 | static inline int get_bitmask_order(unsigned int count) |
1da177e4 LT |
43 | { |
44 | int order; | |
9f41699e | 45 | |
1da177e4 LT |
46 | order = fls(count); |
47 | return order; /* We could be slightly more clever with -1 here... */ | |
48 | } | |
49 | ||
1a1d48a4 | 50 | static __always_inline unsigned long hweight_long(unsigned long w) |
1da177e4 | 51 | { |
e9bebd6f | 52 | return sizeof(w) == 4 ? hweight32(w) : hweight64(w); |
1da177e4 LT |
53 | } |
54 | ||
f2ea0f5f AD |
55 | /** |
56 | * rol64 - rotate a 64-bit value left | |
57 | * @word: value to rotate | |
58 | * @shift: bits to roll | |
59 | */ | |
60 | static inline __u64 rol64(__u64 word, unsigned int shift) | |
61 | { | |
cdf16eac | 62 | return (word << (shift & 63)) | (word >> ((-shift) & 63)); |
f2ea0f5f AD |
63 | } |
64 | ||
65 | /** | |
66 | * ror64 - rotate a 64-bit value right | |
67 | * @word: value to rotate | |
68 | * @shift: bits to roll | |
69 | */ | |
70 | static inline __u64 ror64(__u64 word, unsigned int shift) | |
71 | { | |
cdf16eac | 72 | return (word >> (shift & 63)) | (word << ((-shift) & 63)); |
f2ea0f5f AD |
73 | } |
74 | ||
45f8bde0 | 75 | /** |
1da177e4 | 76 | * rol32 - rotate a 32-bit value left |
1da177e4 LT |
77 | * @word: value to rotate |
78 | * @shift: bits to roll | |
79 | */ | |
80 | static inline __u32 rol32(__u32 word, unsigned int shift) | |
81 | { | |
cdf16eac | 82 | return (word << (shift & 31)) | (word >> ((-shift) & 31)); |
1da177e4 LT |
83 | } |
84 | ||
45f8bde0 | 85 | /** |
1da177e4 | 86 | * ror32 - rotate a 32-bit value right |
1da177e4 LT |
87 | * @word: value to rotate |
88 | * @shift: bits to roll | |
89 | */ | |
90 | static inline __u32 ror32(__u32 word, unsigned int shift) | |
91 | { | |
cdf16eac | 92 | return (word >> (shift & 31)) | (word << ((-shift) & 31)); |
1da177e4 LT |
93 | } |
94 | ||
3afe3925 HH |
95 | /** |
96 | * rol16 - rotate a 16-bit value left | |
97 | * @word: value to rotate | |
98 | * @shift: bits to roll | |
99 | */ | |
100 | static inline __u16 rol16(__u16 word, unsigned int shift) | |
101 | { | |
cdf16eac | 102 | return (word << (shift & 15)) | (word >> ((-shift) & 15)); |
3afe3925 HH |
103 | } |
104 | ||
105 | /** | |
106 | * ror16 - rotate a 16-bit value right | |
107 | * @word: value to rotate | |
108 | * @shift: bits to roll | |
109 | */ | |
110 | static inline __u16 ror16(__u16 word, unsigned int shift) | |
111 | { | |
cdf16eac | 112 | return (word >> (shift & 15)) | (word << ((-shift) & 15)); |
3afe3925 HH |
113 | } |
114 | ||
115 | /** | |
116 | * rol8 - rotate an 8-bit value left | |
117 | * @word: value to rotate | |
118 | * @shift: bits to roll | |
119 | */ | |
120 | static inline __u8 rol8(__u8 word, unsigned int shift) | |
121 | { | |
cdf16eac | 122 | return (word << (shift & 7)) | (word >> ((-shift) & 7)); |
3afe3925 HH |
123 | } |
124 | ||
125 | /** | |
126 | * ror8 - rotate an 8-bit value right | |
127 | * @word: value to rotate | |
128 | * @shift: bits to roll | |
129 | */ | |
130 | static inline __u8 ror8(__u8 word, unsigned int shift) | |
131 | { | |
cdf16eac | 132 | return (word >> (shift & 7)) | (word << ((-shift) & 7)); |
3afe3925 | 133 | } |
7919a57b AH |
134 | |
135 | /** | |
136 | * sign_extend32 - sign extend a 32-bit value using specified bit as sign-bit | |
137 | * @value: value to sign extend | |
138 | * @index: 0 based bit index (0<=index<32) to sign bit | |
e2eb53aa MK |
139 | * |
140 | * This is safe to use for 16- and 8-bit types as well. | |
7919a57b AH |
141 | */ |
142 | static inline __s32 sign_extend32(__u32 value, int index) | |
143 | { | |
144 | __u8 shift = 31 - index; | |
145 | return (__s32)(value << shift) >> shift; | |
146 | } | |
3afe3925 | 147 | |
48e203e2 MK |
148 | /** |
149 | * sign_extend64 - sign extend a 64-bit value using specified bit as sign-bit | |
150 | * @value: value to sign extend | |
151 | * @index: 0 based bit index (0<=index<64) to sign bit | |
152 | */ | |
153 | static inline __s64 sign_extend64(__u64 value, int index) | |
154 | { | |
155 | __u8 shift = 63 - index; | |
156 | return (__s64)(value << shift) >> shift; | |
157 | } | |
158 | ||
962749af AM |
159 | static inline unsigned fls_long(unsigned long l) |
160 | { | |
161 | if (sizeof(l) == 4) | |
162 | return fls(l); | |
163 | return fls64(l); | |
164 | } | |
165 | ||
252e5c6e | 166 | static inline int get_count_order(unsigned int count) |
167 | { | |
168 | int order; | |
169 | ||
170 | order = fls(count) - 1; | |
171 | if (count & (count - 1)) | |
172 | order++; | |
173 | return order; | |
174 | } | |
175 | ||
176 | /** | |
177 | * get_count_order_long - get order after rounding @l up to power of 2 | |
178 | * @l: parameter | |
179 | * | |
180 | * it is same as get_count_order() but with long type parameter | |
181 | */ | |
182 | static inline int get_count_order_long(unsigned long l) | |
183 | { | |
184 | if (l == 0UL) | |
185 | return -1; | |
186 | else if (l & (l - 1UL)) | |
187 | return (int)fls_long(l); | |
188 | else | |
189 | return (int)fls_long(l) - 1; | |
190 | } | |
191 | ||
952043ac SW |
192 | /** |
193 | * __ffs64 - find first set bit in a 64 bit word | |
194 | * @word: The 64 bit word | |
195 | * | |
196 | * On 64 bit arches this is a synomyn for __ffs | |
197 | * The result is not defined if no bits are set, so check that @word | |
198 | * is non-zero before calling this. | |
199 | */ | |
200 | static inline unsigned long __ffs64(u64 word) | |
201 | { | |
202 | #if BITS_PER_LONG == 32 | |
203 | if (((u32)word) == 0UL) | |
204 | return __ffs((u32)(word >> 32)) + 32; | |
205 | #elif BITS_PER_LONG != 64 | |
206 | #error BITS_PER_LONG not 32 or 64 | |
207 | #endif | |
208 | return __ffs((unsigned long)word); | |
209 | } | |
210 | ||
5307e2ad LW |
211 | /** |
212 | * assign_bit - Assign value to a bit in memory | |
213 | * @nr: the bit to set | |
214 | * @addr: the address to start counting from | |
215 | * @value: the value to assign | |
216 | */ | |
217 | static __always_inline void assign_bit(long nr, volatile unsigned long *addr, | |
218 | bool value) | |
219 | { | |
220 | if (value) | |
221 | set_bit(nr, addr); | |
222 | else | |
223 | clear_bit(nr, addr); | |
224 | } | |
225 | ||
226 | static __always_inline void __assign_bit(long nr, volatile unsigned long *addr, | |
227 | bool value) | |
228 | { | |
229 | if (value) | |
230 | __set_bit(nr, addr); | |
231 | else | |
232 | __clear_bit(nr, addr); | |
233 | } | |
234 | ||
64970b68 | 235 | #ifdef __KERNEL__ |
77b9bd9c | 236 | |
00a1a053 TT |
237 | #ifndef set_mask_bits |
238 | #define set_mask_bits(ptr, _mask, _bits) \ | |
239 | ({ \ | |
240 | const typeof(*ptr) mask = (_mask), bits = (_bits); \ | |
241 | typeof(*ptr) old, new; \ | |
242 | \ | |
243 | do { \ | |
6aa7de05 | 244 | old = READ_ONCE(*ptr); \ |
00a1a053 TT |
245 | new = (old & ~mask) | bits; \ |
246 | } while (cmpxchg(ptr, old, new) != old); \ | |
247 | \ | |
248 | new; \ | |
249 | }) | |
250 | #endif | |
251 | ||
85ad1d13 GJ |
252 | #ifndef bit_clear_unless |
253 | #define bit_clear_unless(ptr, _clear, _test) \ | |
254 | ({ \ | |
255 | const typeof(*ptr) clear = (_clear), test = (_test); \ | |
256 | typeof(*ptr) old, new; \ | |
257 | \ | |
258 | do { \ | |
6aa7de05 | 259 | old = READ_ONCE(*ptr); \ |
85ad1d13 GJ |
260 | new = old & ~clear; \ |
261 | } while (!(old & test) && \ | |
262 | cmpxchg(ptr, old, new) != old); \ | |
263 | \ | |
264 | !(old & test); \ | |
265 | }) | |
266 | #endif | |
267 | ||
19de85ef | 268 | #ifndef find_last_bit |
ab53d472 RR |
269 | /** |
270 | * find_last_bit - find the last set bit in a memory region | |
271 | * @addr: The address to start the search at | |
2c57a0e2 | 272 | * @size: The number of bits to search |
ab53d472 | 273 | * |
2c57a0e2 | 274 | * Returns the bit number of the last set bit, or size. |
ab53d472 RR |
275 | */ |
276 | extern unsigned long find_last_bit(const unsigned long *addr, | |
277 | unsigned long size); | |
19de85ef | 278 | #endif |
ab53d472 | 279 | |
64970b68 | 280 | #endif /* __KERNEL__ */ |
1da177e4 | 281 | #endif |