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ea8c64ac CH |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef _LINUX_DMA_DIRECT_H | |
3 | #define _LINUX_DMA_DIRECT_H 1 | |
4 | ||
5 | #include <linux/dma-mapping.h> | |
b6e05477 | 6 | #include <linux/mem_encrypt.h> |
ea8c64ac CH |
7 | |
8 | #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA | |
9 | #include <asm/dma-direct.h> | |
10 | #else | |
b6e05477 | 11 | static inline dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr) |
ea8c64ac CH |
12 | { |
13 | dma_addr_t dev_addr = (dma_addr_t)paddr; | |
14 | ||
15 | return dev_addr - ((dma_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); | |
16 | } | |
17 | ||
b6e05477 | 18 | static inline phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dev_addr) |
ea8c64ac CH |
19 | { |
20 | phys_addr_t paddr = (phys_addr_t)dev_addr; | |
21 | ||
22 | return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); | |
23 | } | |
24 | ||
25 | static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) | |
26 | { | |
27 | if (!dev->dma_mask) | |
28 | return false; | |
29 | ||
b4ebe606 CH |
30 | return addr + size - 1 <= |
31 | min_not_zero(*dev->dma_mask, dev->bus_dma_mask); | |
ea8c64ac CH |
32 | } |
33 | #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ | |
b49efd76 | 34 | |
9087c375 TL |
35 | #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED |
36 | bool force_dma_unencrypted(struct device *dev); | |
37 | #else | |
38 | static inline bool force_dma_unencrypted(struct device *dev) | |
39 | { | |
40 | return false; | |
41 | } | |
42 | #endif /* CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED */ | |
43 | ||
b6e05477 CH |
44 | /* |
45 | * If memory encryption is supported, phys_to_dma will set the memory encryption | |
46 | * bit in the DMA address, and dma_to_phys will clear it. The raw __phys_to_dma | |
47 | * and __dma_to_phys versions should only be used on non-encrypted memory for | |
48 | * special occasions like DMA coherent buffers. | |
49 | */ | |
50 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) | |
51 | { | |
52 | return __sme_set(__phys_to_dma(dev, paddr)); | |
53 | } | |
54 | ||
55 | static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) | |
56 | { | |
57 | return __sme_clr(__dma_to_phys(dev, daddr)); | |
58 | } | |
59 | ||
a20bb058 | 60 | u64 dma_direct_get_required_mask(struct device *dev); |
19dca8c0 CH |
61 | void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, |
62 | gfp_t gfp, unsigned long attrs); | |
63 | void dma_direct_free(struct device *dev, size_t size, void *cpu_addr, | |
64 | dma_addr_t dma_addr, unsigned long attrs); | |
bc3ec75d CH |
65 | void *dma_direct_alloc_pages(struct device *dev, size_t size, |
66 | dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); | |
67 | void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr, | |
68 | dma_addr_t dma_addr, unsigned long attrs); | |
b18814e7 CH |
69 | struct page *__dma_direct_alloc_pages(struct device *dev, size_t size, |
70 | dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); | |
71 | void __dma_direct_free_pages(struct device *dev, size_t size, struct page *page); | |
1a9777a8 | 72 | int dma_direct_supported(struct device *dev, u64 mask); |
ea8c64ac | 73 | #endif /* _LINUX_DMA_DIRECT_H */ |