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1802d0be | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
e941759c ML |
2 | /* |
3 | * Fence mechanism for dma-buf to allow for asynchronous dma access | |
4 | * | |
5 | * Copyright (C) 2012 Canonical Ltd | |
6 | * Copyright (C) 2012 Texas Instruments | |
7 | * | |
8 | * Authors: | |
9 | * Rob Clark <robdclark@gmail.com> | |
10 | * Maarten Lankhorst <maarten.lankhorst@canonical.com> | |
e941759c ML |
11 | */ |
12 | ||
f54d1867 CW |
13 | #ifndef __LINUX_DMA_FENCE_H |
14 | #define __LINUX_DMA_FENCE_H | |
e941759c ML |
15 | |
16 | #include <linux/err.h> | |
17 | #include <linux/wait.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/bitops.h> | |
20 | #include <linux/kref.h> | |
21 | #include <linux/sched.h> | |
22 | #include <linux/printk.h> | |
3c3b177a | 23 | #include <linux/rcupdate.h> |
e941759c | 24 | |
f54d1867 CW |
25 | struct dma_fence; |
26 | struct dma_fence_ops; | |
27 | struct dma_fence_cb; | |
e941759c ML |
28 | |
29 | /** | |
f54d1867 | 30 | * struct dma_fence - software synchronization primitive |
e941759c | 31 | * @refcount: refcount for this fence |
f54d1867 | 32 | * @ops: dma_fence_ops associated with this fence |
3c3b177a | 33 | * @rcu: used for releasing fence with kfree_rcu |
e941759c ML |
34 | * @cb_list: list of all callbacks to call |
35 | * @lock: spin_lock_irqsave used for locking | |
36 | * @context: execution context this fence belongs to, returned by | |
f54d1867 | 37 | * dma_fence_context_alloc() |
e941759c ML |
38 | * @seqno: the sequence number of this fence inside the execution context, |
39 | * can be compared to decide which fence would be signaled later. | |
f54d1867 | 40 | * @flags: A mask of DMA_FENCE_FLAG_* defined below |
e941759c | 41 | * @timestamp: Timestamp when the fence was signaled. |
a009e975 | 42 | * @error: Optional, only valid if < 0, must be set before calling |
f54d1867 | 43 | * dma_fence_signal, indicates that the fence has completed with an error. |
e941759c ML |
44 | * |
45 | * the flags member must be manipulated and read using the appropriate | |
46 | * atomic ops (bit_*), so taking the spinlock will not be needed most | |
47 | * of the time. | |
48 | * | |
f54d1867 | 49 | * DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled |
76250f2b | 50 | * DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling |
f54d1867 CW |
51 | * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called |
52 | * DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the | |
e941759c ML |
53 | * implementer of the fence for its own purposes. Can be used in different |
54 | * ways by different fence implementers, so do not rely on this. | |
55 | * | |
3590d50e | 56 | * Since atomic bitops are used, this is not guaranteed to be the case. |
f54d1867 | 57 | * Particularly, if the bit was set, but dma_fence_signal was called right |
e941759c | 58 | * before this bit was set, it would have been able to set the |
f54d1867 CW |
59 | * DMA_FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called. |
60 | * Adding a check for DMA_FENCE_FLAG_SIGNALED_BIT after setting | |
61 | * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT closes this race, and makes sure that | |
62 | * after dma_fence_signal was called, any enable_signaling call will have either | |
e941759c ML |
63 | * been completed, or never called at all. |
64 | */ | |
f54d1867 | 65 | struct dma_fence { |
4fe3997a | 66 | spinlock_t *lock; |
f54d1867 | 67 | const struct dma_fence_ops *ops; |
f2cb60e9 CW |
68 | /* |
69 | * We clear the callback list on kref_put so that by the time we | |
70 | * release the fence it is unused. No one should be adding to the | |
71 | * cb_list that they don't themselves hold a reference for. | |
72 | * | |
73 | * The lifetime of the timestamp is similarly tied to both the | |
74 | * rcu freelist and the cb_list. The timestamp is only set upon | |
75 | * signaling while simultaneously notifying the cb_list. Ergo, we | |
76 | * only use either the cb_list of timestamp. Upon destruction, | |
77 | * neither are accessible, and so we can use the rcu. This means | |
78 | * that the cb_list is *only* valid until the signal bit is set, | |
79 | * and to read either you *must* hold a reference to the fence, | |
80 | * and not just the rcu_read_lock. | |
81 | * | |
82 | * Listed in chronological order. | |
0e2f733a CK |
83 | */ |
84 | union { | |
0e2f733a | 85 | struct list_head cb_list; |
f2cb60e9 CW |
86 | /* @cb_list replaced by @timestamp on dma_fence_signal() */ |
87 | ktime_t timestamp; | |
88 | /* @timestamp replaced by @rcu on dma_fence_release() */ | |
89 | struct rcu_head rcu; | |
0e2f733a | 90 | }; |
76bf0db5 | 91 | u64 context; |
b312d8ca | 92 | u64 seqno; |
4fe3997a CW |
93 | unsigned long flags; |
94 | struct kref refcount; | |
a009e975 | 95 | int error; |
e941759c ML |
96 | }; |
97 | ||
f54d1867 CW |
98 | enum dma_fence_flag_bits { |
99 | DMA_FENCE_FLAG_SIGNALED_BIT, | |
76250f2b | 100 | DMA_FENCE_FLAG_TIMESTAMP_BIT, |
f54d1867 CW |
101 | DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
102 | DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ | |
e941759c ML |
103 | }; |
104 | ||
f54d1867 CW |
105 | typedef void (*dma_fence_func_t)(struct dma_fence *fence, |
106 | struct dma_fence_cb *cb); | |
e941759c ML |
107 | |
108 | /** | |
2c269b09 DV |
109 | * struct dma_fence_cb - callback for dma_fence_add_callback() |
110 | * @node: used by dma_fence_add_callback() to append this struct to fence::cb_list | |
f54d1867 | 111 | * @func: dma_fence_func_t to call |
e941759c | 112 | * |
2c269b09 | 113 | * This struct will be initialized by dma_fence_add_callback(), additional |
f54d1867 | 114 | * data can be passed along by embedding dma_fence_cb in another struct. |
e941759c | 115 | */ |
f54d1867 | 116 | struct dma_fence_cb { |
e941759c | 117 | struct list_head node; |
f54d1867 | 118 | dma_fence_func_t func; |
e941759c ML |
119 | }; |
120 | ||
121 | /** | |
f54d1867 | 122 | * struct dma_fence_ops - operations implemented for fence |
e941759c | 123 | * |
e941759c | 124 | */ |
f54d1867 | 125 | struct dma_fence_ops { |
5e498abf CK |
126 | /** |
127 | * @use_64bit_seqno: | |
128 | * | |
129 | * True if this dma_fence implementation uses 64bit seqno, false | |
130 | * otherwise. | |
131 | */ | |
132 | bool use_64bit_seqno; | |
133 | ||
2c269b09 DV |
134 | /** |
135 | * @get_driver_name: | |
136 | * | |
137 | * Returns the driver name. This is a callback to allow drivers to | |
138 | * compute the name at runtime, without having it to store permanently | |
139 | * for each fence, or build a cache of some sort. | |
140 | * | |
141 | * This callback is mandatory. | |
142 | */ | |
f54d1867 | 143 | const char * (*get_driver_name)(struct dma_fence *fence); |
2c269b09 DV |
144 | |
145 | /** | |
146 | * @get_timeline_name: | |
147 | * | |
148 | * Return the name of the context this fence belongs to. This is a | |
149 | * callback to allow drivers to compute the name at runtime, without | |
150 | * having it to store permanently for each fence, or build a cache of | |
151 | * some sort. | |
152 | * | |
153 | * This callback is mandatory. | |
154 | */ | |
f54d1867 | 155 | const char * (*get_timeline_name)(struct dma_fence *fence); |
2c269b09 DV |
156 | |
157 | /** | |
158 | * @enable_signaling: | |
159 | * | |
160 | * Enable software signaling of fence. | |
161 | * | |
162 | * For fence implementations that have the capability for hw->hw | |
163 | * signaling, they can implement this op to enable the necessary | |
164 | * interrupts, or insert commands into cmdstream, etc, to avoid these | |
165 | * costly operations for the common case where only hw->hw | |
166 | * synchronization is required. This is called in the first | |
167 | * dma_fence_wait() or dma_fence_add_callback() path to let the fence | |
168 | * implementation know that there is another driver waiting on the | |
169 | * signal (ie. hw->sw case). | |
170 | * | |
171 | * This function can be called from atomic context, but not | |
172 | * from irq context, so normal spinlocks can be used. | |
173 | * | |
174 | * A return value of false indicates the fence already passed, | |
175 | * or some failure occurred that made it impossible to enable | |
176 | * signaling. True indicates successful enabling. | |
177 | * | |
178 | * &dma_fence.error may be set in enable_signaling, but only when false | |
179 | * is returned. | |
180 | * | |
181 | * Since many implementations can call dma_fence_signal() even when before | |
182 | * @enable_signaling has been called there's a race window, where the | |
183 | * dma_fence_signal() might result in the final fence reference being | |
184 | * released and its memory freed. To avoid this, implementations of this | |
185 | * callback should grab their own reference using dma_fence_get(), to be | |
186 | * released when the fence is signalled (through e.g. the interrupt | |
187 | * handler). | |
188 | * | |
c701317a DV |
189 | * This callback is optional. If this callback is not present, then the |
190 | * driver must always have signaling enabled. | |
2c269b09 | 191 | */ |
f54d1867 | 192 | bool (*enable_signaling)(struct dma_fence *fence); |
2c269b09 DV |
193 | |
194 | /** | |
195 | * @signaled: | |
196 | * | |
197 | * Peek whether the fence is signaled, as a fastpath optimization for | |
198 | * e.g. dma_fence_wait() or dma_fence_add_callback(). Note that this | |
199 | * callback does not need to make any guarantees beyond that a fence | |
200 | * once indicates as signalled must always return true from this | |
201 | * callback. This callback may return false even if the fence has | |
202 | * completed already, in this case information hasn't propogated throug | |
203 | * the system yet. See also dma_fence_is_signaled(). | |
204 | * | |
205 | * May set &dma_fence.error if returning true. | |
206 | * | |
207 | * This callback is optional. | |
208 | */ | |
f54d1867 | 209 | bool (*signaled)(struct dma_fence *fence); |
2c269b09 DV |
210 | |
211 | /** | |
212 | * @wait: | |
213 | * | |
418cc6ca DV |
214 | * Custom wait implementation, defaults to dma_fence_default_wait() if |
215 | * not set. | |
2c269b09 | 216 | * |
418cc6ca DV |
217 | * The dma_fence_default_wait implementation should work for any fence, as long |
218 | * as @enable_signaling works correctly. This hook allows drivers to | |
219 | * have an optimized version for the case where a process context is | |
220 | * already available, e.g. if @enable_signaling for the general case | |
221 | * needs to set up a worker thread. | |
2c269b09 DV |
222 | * |
223 | * Must return -ERESTARTSYS if the wait is intr = true and the wait was | |
224 | * interrupted, and remaining jiffies if fence has signaled, or 0 if wait | |
225 | * timed out. Can also return other error values on custom implementations, | |
226 | * which should be treated as if the fence is signaled. For example a hardware | |
227 | * lockup could be reported like that. | |
228 | * | |
418cc6ca | 229 | * This callback is optional. |
2c269b09 | 230 | */ |
f54d1867 CW |
231 | signed long (*wait)(struct dma_fence *fence, |
232 | bool intr, signed long timeout); | |
2c269b09 DV |
233 | |
234 | /** | |
235 | * @release: | |
236 | * | |
237 | * Called on destruction of fence to release additional resources. | |
238 | * Can be called from irq context. This callback is optional. If it is | |
239 | * NULL, then dma_fence_free() is instead called as the default | |
240 | * implementation. | |
241 | */ | |
f54d1867 CW |
242 | void (*release)(struct dma_fence *fence); |
243 | ||
2c269b09 DV |
244 | /** |
245 | * @fence_value_str: | |
246 | * | |
247 | * Callback to fill in free-form debug info specific to this fence, like | |
248 | * the sequence number. | |
249 | * | |
250 | * This callback is optional. | |
251 | */ | |
f54d1867 | 252 | void (*fence_value_str)(struct dma_fence *fence, char *str, int size); |
2c269b09 DV |
253 | |
254 | /** | |
255 | * @timeline_value_str: | |
256 | * | |
257 | * Fills in the current value of the timeline as a string, like the | |
1b48b720 DV |
258 | * sequence number. Note that the specific fence passed to this function |
259 | * should not matter, drivers should only use it to look up the | |
260 | * corresponding timeline structures. | |
2c269b09 | 261 | */ |
f54d1867 CW |
262 | void (*timeline_value_str)(struct dma_fence *fence, |
263 | char *str, int size); | |
e941759c ML |
264 | }; |
265 | ||
f54d1867 | 266 | void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, |
b312d8ca | 267 | spinlock_t *lock, u64 context, u64 seqno); |
e941759c | 268 | |
f54d1867 CW |
269 | void dma_fence_release(struct kref *kref); |
270 | void dma_fence_free(struct dma_fence *fence); | |
e941759c | 271 | |
4be05420 | 272 | /** |
f54d1867 | 273 | * dma_fence_put - decreases refcount of the fence |
2c269b09 | 274 | * @fence: fence to reduce refcount of |
4be05420 | 275 | */ |
f54d1867 | 276 | static inline void dma_fence_put(struct dma_fence *fence) |
4be05420 CW |
277 | { |
278 | if (fence) | |
f54d1867 | 279 | kref_put(&fence->refcount, dma_fence_release); |
4be05420 CW |
280 | } |
281 | ||
e941759c | 282 | /** |
f54d1867 | 283 | * dma_fence_get - increases refcount of the fence |
2c269b09 | 284 | * @fence: fence to increase refcount of |
e941759c ML |
285 | * |
286 | * Returns the same fence, with refcount increased by 1. | |
287 | */ | |
f54d1867 | 288 | static inline struct dma_fence *dma_fence_get(struct dma_fence *fence) |
e941759c ML |
289 | { |
290 | if (fence) | |
291 | kref_get(&fence->refcount); | |
292 | return fence; | |
293 | } | |
294 | ||
3c3b177a | 295 | /** |
52791eee | 296 | * dma_fence_get_rcu - get a fence from a dma_resv_list with |
f54d1867 | 297 | * rcu read lock |
2c269b09 | 298 | * @fence: fence to increase refcount of |
3c3b177a ML |
299 | * |
300 | * Function returns NULL if no refcount could be obtained, or the fence. | |
301 | */ | |
f54d1867 | 302 | static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence) |
3c3b177a ML |
303 | { |
304 | if (kref_get_unless_zero(&fence->refcount)) | |
305 | return fence; | |
306 | else | |
307 | return NULL; | |
308 | } | |
309 | ||
e941759c | 310 | /** |
f54d1867 | 311 | * dma_fence_get_rcu_safe - acquire a reference to an RCU tracked fence |
2c269b09 | 312 | * @fencep: pointer to fence to increase refcount of |
4be05420 CW |
313 | * |
314 | * Function returns NULL if no refcount could be obtained, or the fence. | |
315 | * This function handles acquiring a reference to a fence that may be | |
5f0d5a3a | 316 | * reallocated within the RCU grace period (such as with SLAB_TYPESAFE_BY_RCU), |
4be05420 CW |
317 | * so long as the caller is using RCU on the pointer to the fence. |
318 | * | |
319 | * An alternative mechanism is to employ a seqlock to protect a bunch of | |
52791eee | 320 | * fences, such as used by struct dma_resv. When using a seqlock, |
4be05420 CW |
321 | * the seqlock must be taken before and checked after a reference to the |
322 | * fence is acquired (as shown here). | |
323 | * | |
324 | * The caller is required to hold the RCU read lock. | |
e941759c | 325 | */ |
f54d1867 | 326 | static inline struct dma_fence * |
5f72db59 | 327 | dma_fence_get_rcu_safe(struct dma_fence __rcu **fencep) |
e941759c | 328 | { |
4be05420 | 329 | do { |
f54d1867 | 330 | struct dma_fence *fence; |
4be05420 CW |
331 | |
332 | fence = rcu_dereference(*fencep); | |
f8e0731d | 333 | if (!fence) |
4be05420 CW |
334 | return NULL; |
335 | ||
f8e0731d CK |
336 | if (!dma_fence_get_rcu(fence)) |
337 | continue; | |
338 | ||
f54d1867 | 339 | /* The atomic_inc_not_zero() inside dma_fence_get_rcu() |
4be05420 CW |
340 | * provides a full memory barrier upon success (such as now). |
341 | * This is paired with the write barrier from assigning | |
342 | * to the __rcu protected fence pointer so that if that | |
343 | * pointer still matches the current fence, we know we | |
344 | * have successfully acquire a reference to it. If it no | |
345 | * longer matches, we are holding a reference to some other | |
346 | * reallocated pointer. This is possible if the allocator | |
5f0d5a3a | 347 | * is using a freelist like SLAB_TYPESAFE_BY_RCU where the |
4be05420 CW |
348 | * fence remains valid for the RCU grace period, but it |
349 | * may be reallocated. When using such allocators, we are | |
350 | * responsible for ensuring the reference we get is to | |
351 | * the right fence, as below. | |
352 | */ | |
353 | if (fence == rcu_access_pointer(*fencep)) | |
354 | return rcu_pointer_handoff(fence); | |
355 | ||
f54d1867 | 356 | dma_fence_put(fence); |
4be05420 | 357 | } while (1); |
e941759c ML |
358 | } |
359 | ||
5fbff813 DV |
360 | #ifdef CONFIG_LOCKDEP |
361 | bool dma_fence_begin_signalling(void); | |
362 | void dma_fence_end_signalling(bool cookie); | |
d0b9a9ae | 363 | void __dma_fence_might_wait(void); |
5fbff813 DV |
364 | #else |
365 | static inline bool dma_fence_begin_signalling(void) | |
366 | { | |
367 | return true; | |
368 | } | |
369 | static inline void dma_fence_end_signalling(bool cookie) {} | |
370 | static inline void __dma_fence_might_wait(void) {} | |
371 | #endif | |
372 | ||
f54d1867 CW |
373 | int dma_fence_signal(struct dma_fence *fence); |
374 | int dma_fence_signal_locked(struct dma_fence *fence); | |
5a164ac4 VSS |
375 | int dma_fence_signal_timestamp(struct dma_fence *fence, ktime_t timestamp); |
376 | int dma_fence_signal_timestamp_locked(struct dma_fence *fence, | |
377 | ktime_t timestamp); | |
f54d1867 CW |
378 | signed long dma_fence_default_wait(struct dma_fence *fence, |
379 | bool intr, signed long timeout); | |
380 | int dma_fence_add_callback(struct dma_fence *fence, | |
381 | struct dma_fence_cb *cb, | |
382 | dma_fence_func_t func); | |
383 | bool dma_fence_remove_callback(struct dma_fence *fence, | |
384 | struct dma_fence_cb *cb); | |
385 | void dma_fence_enable_sw_signaling(struct dma_fence *fence); | |
e941759c ML |
386 | |
387 | /** | |
f54d1867 CW |
388 | * dma_fence_is_signaled_locked - Return an indication if the fence |
389 | * is signaled yet. | |
2c269b09 | 390 | * @fence: the fence to check |
e941759c ML |
391 | * |
392 | * Returns true if the fence was already signaled, false if not. Since this | |
393 | * function doesn't enable signaling, it is not guaranteed to ever return | |
2c269b09 DV |
394 | * true if dma_fence_add_callback(), dma_fence_wait() or |
395 | * dma_fence_enable_sw_signaling() haven't been called before. | |
e941759c | 396 | * |
2c269b09 DV |
397 | * This function requires &dma_fence.lock to be held. |
398 | * | |
399 | * See also dma_fence_is_signaled(). | |
e941759c ML |
400 | */ |
401 | static inline bool | |
f54d1867 | 402 | dma_fence_is_signaled_locked(struct dma_fence *fence) |
e941759c | 403 | { |
f54d1867 | 404 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
405 | return true; |
406 | ||
407 | if (fence->ops->signaled && fence->ops->signaled(fence)) { | |
f54d1867 | 408 | dma_fence_signal_locked(fence); |
e941759c ML |
409 | return true; |
410 | } | |
411 | ||
412 | return false; | |
413 | } | |
414 | ||
415 | /** | |
f54d1867 | 416 | * dma_fence_is_signaled - Return an indication if the fence is signaled yet. |
2c269b09 | 417 | * @fence: the fence to check |
e941759c ML |
418 | * |
419 | * Returns true if the fence was already signaled, false if not. Since this | |
420 | * function doesn't enable signaling, it is not guaranteed to ever return | |
2c269b09 DV |
421 | * true if dma_fence_add_callback(), dma_fence_wait() or |
422 | * dma_fence_enable_sw_signaling() haven't been called before. | |
e941759c | 423 | * |
f54d1867 | 424 | * It's recommended for seqno fences to call dma_fence_signal when the |
e941759c ML |
425 | * operation is complete, it makes it possible to prevent issues from |
426 | * wraparound between time of issue and time of use by checking the return | |
427 | * value of this function before calling hardware-specific wait instructions. | |
2c269b09 DV |
428 | * |
429 | * See also dma_fence_is_signaled_locked(). | |
e941759c ML |
430 | */ |
431 | static inline bool | |
f54d1867 | 432 | dma_fence_is_signaled(struct dma_fence *fence) |
e941759c | 433 | { |
f54d1867 | 434 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
435 | return true; |
436 | ||
437 | if (fence->ops->signaled && fence->ops->signaled(fence)) { | |
f54d1867 | 438 | dma_fence_signal(fence); |
e941759c ML |
439 | return true; |
440 | } | |
441 | ||
442 | return false; | |
443 | } | |
444 | ||
81114776 CW |
445 | /** |
446 | * __dma_fence_is_later - return if f1 is chronologically later than f2 | |
2c269b09 DV |
447 | * @f1: the first fence's seqno |
448 | * @f2: the second fence's seqno from the same context | |
5e498abf | 449 | * @ops: dma_fence_ops associated with the seqno |
81114776 CW |
450 | * |
451 | * Returns true if f1 is chronologically later than f2. Both fences must be | |
452 | * from the same context, since a seqno is not common across contexts. | |
453 | */ | |
5e498abf CK |
454 | static inline bool __dma_fence_is_later(u64 f1, u64 f2, |
455 | const struct dma_fence_ops *ops) | |
81114776 | 456 | { |
b312d8ca | 457 | /* This is for backward compatibility with drivers which can only handle |
5e498abf CK |
458 | * 32bit sequence numbers. Use a 64bit compare when the driver says to |
459 | * do so. | |
b312d8ca | 460 | */ |
5e498abf | 461 | if (ops->use_64bit_seqno) |
b312d8ca CK |
462 | return f1 > f2; |
463 | ||
464 | return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0; | |
81114776 CW |
465 | } |
466 | ||
6c455ac1 | 467 | /** |
f54d1867 | 468 | * dma_fence_is_later - return if f1 is chronologically later than f2 |
2c269b09 DV |
469 | * @f1: the first fence from the same context |
470 | * @f2: the second fence from the same context | |
6c455ac1 CK |
471 | * |
472 | * Returns true if f1 is chronologically later than f2. Both fences must be | |
473 | * from the same context, since a seqno is not re-used across contexts. | |
474 | */ | |
f54d1867 CW |
475 | static inline bool dma_fence_is_later(struct dma_fence *f1, |
476 | struct dma_fence *f2) | |
6c455ac1 CK |
477 | { |
478 | if (WARN_ON(f1->context != f2->context)) | |
479 | return false; | |
480 | ||
5e498abf | 481 | return __dma_fence_is_later(f1->seqno, f2->seqno, f1->ops); |
6c455ac1 CK |
482 | } |
483 | ||
e941759c | 484 | /** |
f54d1867 | 485 | * dma_fence_later - return the chronologically later fence |
2c269b09 DV |
486 | * @f1: the first fence from the same context |
487 | * @f2: the second fence from the same context | |
e941759c ML |
488 | * |
489 | * Returns NULL if both fences are signaled, otherwise the fence that would be | |
490 | * signaled last. Both fences must be from the same context, since a seqno is | |
491 | * not re-used across contexts. | |
492 | */ | |
f54d1867 CW |
493 | static inline struct dma_fence *dma_fence_later(struct dma_fence *f1, |
494 | struct dma_fence *f2) | |
e941759c ML |
495 | { |
496 | if (WARN_ON(f1->context != f2->context)) | |
497 | return NULL; | |
498 | ||
499 | /* | |
f54d1867 CW |
500 | * Can't check just DMA_FENCE_FLAG_SIGNALED_BIT here, it may never |
501 | * have been set if enable_signaling wasn't called, and enabling that | |
502 | * here is overkill. | |
e941759c | 503 | */ |
f54d1867 CW |
504 | if (dma_fence_is_later(f1, f2)) |
505 | return dma_fence_is_signaled(f1) ? NULL : f1; | |
6c455ac1 | 506 | else |
f54d1867 | 507 | return dma_fence_is_signaled(f2) ? NULL : f2; |
e941759c ML |
508 | } |
509 | ||
d6c99f4b CW |
510 | /** |
511 | * dma_fence_get_status_locked - returns the status upon completion | |
2c269b09 | 512 | * @fence: the dma_fence to query |
d6c99f4b CW |
513 | * |
514 | * Drivers can supply an optional error status condition before they signal | |
515 | * the fence (to indicate whether the fence was completed due to an error | |
516 | * rather than success). The value of the status condition is only valid | |
517 | * if the fence has been signaled, dma_fence_get_status_locked() first checks | |
518 | * the signal state before reporting the error status. | |
519 | * | |
520 | * Returns 0 if the fence has not yet been signaled, 1 if the fence has | |
521 | * been signaled without an error condition, or a negative error code | |
522 | * if the fence has been completed in err. | |
523 | */ | |
524 | static inline int dma_fence_get_status_locked(struct dma_fence *fence) | |
525 | { | |
526 | if (dma_fence_is_signaled_locked(fence)) | |
a009e975 | 527 | return fence->error ?: 1; |
d6c99f4b CW |
528 | else |
529 | return 0; | |
530 | } | |
531 | ||
532 | int dma_fence_get_status(struct dma_fence *fence); | |
533 | ||
a009e975 CW |
534 | /** |
535 | * dma_fence_set_error - flag an error condition on the fence | |
2c269b09 DV |
536 | * @fence: the dma_fence |
537 | * @error: the error to store | |
a009e975 CW |
538 | * |
539 | * Drivers can supply an optional error status condition before they signal | |
540 | * the fence, to indicate that the fence was completed due to an error | |
541 | * rather than success. This must be set before signaling (so that the value | |
542 | * is visible before any waiters on the signal callback are woken). This | |
543 | * helper exists to help catching erroneous setting of #dma_fence.error. | |
544 | */ | |
545 | static inline void dma_fence_set_error(struct dma_fence *fence, | |
546 | int error) | |
547 | { | |
6ce31263 DV |
548 | WARN_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)); |
549 | WARN_ON(error >= 0 || error < -MAX_ERRNO); | |
a009e975 CW |
550 | |
551 | fence->error = error; | |
552 | } | |
553 | ||
f54d1867 | 554 | signed long dma_fence_wait_timeout(struct dma_fence *, |
a519435a | 555 | bool intr, signed long timeout); |
f54d1867 CW |
556 | signed long dma_fence_wait_any_timeout(struct dma_fence **fences, |
557 | uint32_t count, | |
7392b4bb | 558 | bool intr, signed long timeout, |
559 | uint32_t *idx); | |
e941759c ML |
560 | |
561 | /** | |
f54d1867 | 562 | * dma_fence_wait - sleep until the fence gets signaled |
2c269b09 DV |
563 | * @fence: the fence to wait on |
564 | * @intr: if true, do an interruptible wait | |
e941759c ML |
565 | * |
566 | * This function will return -ERESTARTSYS if interrupted by a signal, | |
567 | * or 0 if the fence was signaled. Other error values may be | |
568 | * returned on custom implementations. | |
569 | * | |
570 | * Performs a synchronous wait on this fence. It is assumed the caller | |
571 | * directly or indirectly holds a reference to the fence, otherwise the | |
572 | * fence might be freed before return, resulting in undefined behavior. | |
2c269b09 DV |
573 | * |
574 | * See also dma_fence_wait_timeout() and dma_fence_wait_any_timeout(). | |
e941759c | 575 | */ |
f54d1867 | 576 | static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) |
e941759c ML |
577 | { |
578 | signed long ret; | |
579 | ||
f54d1867 | 580 | /* Since dma_fence_wait_timeout cannot timeout with |
e941759c ML |
581 | * MAX_SCHEDULE_TIMEOUT, only valid return values are |
582 | * -ERESTARTSYS and MAX_SCHEDULE_TIMEOUT. | |
583 | */ | |
f54d1867 | 584 | ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT); |
e941759c ML |
585 | |
586 | return ret < 0 ? ret : 0; | |
587 | } | |
588 | ||
078dec33 | 589 | struct dma_fence *dma_fence_get_stub(void); |
fd921693 | 590 | struct dma_fence *dma_fence_allocate_private_stub(void); |
f54d1867 | 591 | u64 dma_fence_context_alloc(unsigned num); |
e941759c | 592 | |
f54d1867 | 593 | #define DMA_FENCE_TRACE(f, fmt, args...) \ |
e941759c | 594 | do { \ |
f54d1867 CW |
595 | struct dma_fence *__ff = (f); \ |
596 | if (IS_ENABLED(CONFIG_DMA_FENCE_TRACE)) \ | |
b312d8ca | 597 | pr_info("f %llu#%llu: " fmt, \ |
e941759c ML |
598 | __ff->context, __ff->seqno, ##args); \ |
599 | } while (0) | |
600 | ||
f54d1867 | 601 | #define DMA_FENCE_WARN(f, fmt, args...) \ |
e941759c | 602 | do { \ |
f54d1867 | 603 | struct dma_fence *__ff = (f); \ |
b312d8ca | 604 | pr_warn("f %llu#%llu: " fmt, __ff->context, __ff->seqno,\ |
e941759c ML |
605 | ##args); \ |
606 | } while (0) | |
607 | ||
f54d1867 | 608 | #define DMA_FENCE_ERR(f, fmt, args...) \ |
e941759c | 609 | do { \ |
f54d1867 | 610 | struct dma_fence *__ff = (f); \ |
b312d8ca | 611 | pr_err("f %llu#%llu: " fmt, __ff->context, __ff->seqno, \ |
e941759c ML |
612 | ##args); \ |
613 | } while (0) | |
614 | ||
f54d1867 | 615 | #endif /* __LINUX_DMA_FENCE_H */ |