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Revert "swiotlb: rework "fix info leak with DMA_FROM_DEVICE""
[mirror_ubuntu-jammy-kernel.git] / include / linux / dma-mapping.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
96532bab
RD		 2#ifndef _LINUX_DMA_MAPPING_H
3#define _LINUX_DMA_MAPPING_H
1da177e4 4
002edb6f 5#include <linux/sizes.h>
842fa69f 6#include <linux/string.h>
1da177e4
LT		 7#include <linux/device.h>
8#include <linux/err.h>
b7f080cf 9#include <linux/dma-direction.h>
f0402a26 10#include <linux/scatterlist.h>
e1c7e324 11#include <linux/bug.h>
648babb7 12#include <linux/mem_encrypt.h>
1da177e4 13
00085f1e
KK		 14/**
15 * List of possible attributes associated with a DMA mapping. The semantics
985098a0 16 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst.
00085f1e 17 */
7283fff8 18
00085f1e
KK		 19/*
20 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
21 * may be weakly ordered, that is that reads and writes may pass each other.
22 */
23#define DMA_ATTR_WEAK_ORDERING (1UL << 1)
24/*
25 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
26 * buffered to improve performance.
27 */
28#define DMA_ATTR_WRITE_COMBINE (1UL << 2)
00085f1e
KK		 29/*
30 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
31 * virtual mapping for the allocated buffer.
32 */
33#define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
34/*
35 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
36 * the CPU cache for the given buffer assuming that it has been already
37 * transferred to 'device' domain.
38 */
39#define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
40/*
41 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
42 * in physical memory.
43 */
44#define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
45/*
46 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
47 * that it's probably not worth the time to try to allocate memory to in a way
48 * that gives better TLB efficiency.
49 */
50#define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
a9a62c93
MFO		 51/*
52 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
53 * allocation failure reports (similarly to __GFP_NOWARN).
54 */
55#define DMA_ATTR_NO_WARN (1UL << 8)
00085f1e 56
b2fb3664
MH		 57/*
58 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
59 * accessible at an elevated privilege level (and ideally inaccessible or
60 * at least read-only at lesser-privileged levels).
61 */
62#define DMA_ATTR_PRIVILEGED (1UL << 9)
63
6a63c57a
LT		 64/*
65 * This is a hint to the DMA-mapping subsystem that the device is expected
66 * to overwrite the entire mapped size, thus the caller does not require any
67 * of the previous buffer contents to be preserved. This allows
68 * bounce-buffering implementations to optimise DMA_FROM_DEVICE transfers.
69 */
70#define DMA_ATTR_OVERWRITE (1UL << 10)
71
eba304c6
CH		 72/*
73 * A dma_addr_t can hold any valid DMA or bus address for the platform. It can
74 * be given to a device to use as a DMA source or target. It is specific to a
75 * given device and there may be a translation between the CPU physical address
76 * space and the bus address space.
77 *
78 * DMA_MAPPING_ERROR is the magic error code if a mapping failed. It should not
79 * be used directly in drivers, but checked for using dma_mapping_error()
80 * instead.
81 */
42ee3cae
CH		 82#define DMA_MAPPING_ERROR (~(dma_addr_t)0)
83
8f286c33 84#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
34c65384 85
a1fd09e8
CH		 86#ifdef CONFIG_DMA_API_DEBUG
87void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
88void debug_dma_map_single(struct device *dev, const void *addr,
89 unsigned long len);
90#else
91static inline void debug_dma_mapping_error(struct device *dev,
92 dma_addr_t dma_addr)
93{
94}
95static inline void debug_dma_map_single(struct device *dev, const void *addr,
96 unsigned long len)
97{
98}
99#endif /* CONFIG_DMA_API_DEBUG */
100
ed6ccf10 101#ifdef CONFIG_HAS_DMA
ed6ccf10
CH		 102static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
103{
104 debug_dma_mapping_error(dev, dma_addr);
105
a7f3d3d3 106 if (unlikely(dma_addr == DMA_MAPPING_ERROR))
ed6ccf10
CH		 107 return -ENOMEM;
108 return 0;
109}
110
d3fa60d7
CH		 111dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page,
112 size_t offset, size_t size, enum dma_data_direction dir,
113 unsigned long attrs);
114void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size,
115 enum dma_data_direction dir, unsigned long attrs);
2a047e06
CH		 116unsigned int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
117 int nents, enum dma_data_direction dir, unsigned long attrs);
d3fa60d7
CH		 118void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
119 int nents, enum dma_data_direction dir,
120 unsigned long attrs);
fffe3cc8
LG		 121int dma_map_sgtable(struct device *dev, struct sg_table *sgt,
122 enum dma_data_direction dir, unsigned long attrs);
d3fa60d7
CH		 123dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr,
124 size_t size, enum dma_data_direction dir, unsigned long attrs);
125void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size,
126 enum dma_data_direction dir, unsigned long attrs);
127void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size,
128 enum dma_data_direction dir);
129void dma_sync_single_for_device(struct device *dev, dma_addr_t addr,
130 size_t size, enum dma_data_direction dir);
131void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
132 int nelems, enum dma_data_direction dir);
133void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
134 int nelems, enum dma_data_direction dir);
ed6ccf10
CH		 135void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
136 gfp_t flag, unsigned long attrs);
137void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
138 dma_addr_t dma_handle, unsigned long attrs);
139void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
140 gfp_t gfp, unsigned long attrs);
141void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
142 dma_addr_t dma_handle);
ed6ccf10
CH		 143int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
144 void *cpu_addr, dma_addr_t dma_addr, size_t size,
145 unsigned long attrs);
146int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
147 void *cpu_addr, dma_addr_t dma_addr, size_t size,
148 unsigned long attrs);
e29ccc18 149bool dma_can_mmap(struct device *dev);
ed6ccf10
CH		 150int dma_supported(struct device *dev, u64 mask);
151int dma_set_mask(struct device *dev, u64 mask);
152int dma_set_coherent_mask(struct device *dev, u64 mask);
153u64 dma_get_required_mask(struct device *dev);
133d624b 154size_t dma_max_mapping_size(struct device *dev);
3aa91625 155bool dma_need_sync(struct device *dev, dma_addr_t dma_addr);
6ba99411 156unsigned long dma_get_merge_boundary(struct device *dev);
7d5b5738
CH		 157struct sg_table *dma_alloc_noncontiguous(struct device *dev, size_t size,
158 enum dma_data_direction dir, gfp_t gfp, unsigned long attrs);
159void dma_free_noncontiguous(struct device *dev, size_t size,
160 struct sg_table *sgt, enum dma_data_direction dir);
161void *dma_vmap_noncontiguous(struct device *dev, size_t size,
162 struct sg_table *sgt);
163void dma_vunmap_noncontiguous(struct device *dev, void *vaddr);
164int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma,
165 size_t size, struct sg_table *sgt);
ed6ccf10
CH		 166#else /* CONFIG_HAS_DMA */
167static inline dma_addr_t dma_map_page_attrs(struct device *dev,
168 struct page *page, size_t offset, size_t size,
169 enum dma_data_direction dir, unsigned long attrs)
170{
171 return DMA_MAPPING_ERROR;
172}
173static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
174 size_t size, enum dma_data_direction dir, unsigned long attrs)
175{
176}
2a047e06
CH		 177static inline unsigned int dma_map_sg_attrs(struct device *dev,
178 struct scatterlist *sg, int nents, enum dma_data_direction dir,
179 unsigned long attrs)
ed6ccf10
CH		 180{
181 return 0;
182}
183static inline void dma_unmap_sg_attrs(struct device *dev,
184 struct scatterlist *sg, int nents, enum dma_data_direction dir,
185 unsigned long attrs)
186{
187}
fffe3cc8
LG		 188static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt,
189 enum dma_data_direction dir, unsigned long attrs)
190{
191 return -EOPNOTSUPP;
192}
ed6ccf10
CH		 193static inline dma_addr_t dma_map_resource(struct device *dev,
194 phys_addr_t phys_addr, size_t size, enum dma_data_direction dir,
195 unsigned long attrs)
196{
197 return DMA_MAPPING_ERROR;
198}
199static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
200 size_t size, enum dma_data_direction dir, unsigned long attrs)
201{
202}
203static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
204 size_t size, enum dma_data_direction dir)
205{
206}
207static inline void dma_sync_single_for_device(struct device *dev,
208 dma_addr_t addr, size_t size, enum dma_data_direction dir)
209{
210}
211static inline void dma_sync_sg_for_cpu(struct device *dev,
212 struct scatterlist *sg, int nelems, enum dma_data_direction dir)
213{
214}
215static inline void dma_sync_sg_for_device(struct device *dev,
216 struct scatterlist *sg, int nelems, enum dma_data_direction dir)
217{
218}
219static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
220{
221 return -ENOMEM;
222}
223static inline void *dma_alloc_attrs(struct device *dev, size_t size,
224 dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
225{
226 return NULL;
227}
228static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
229 dma_addr_t dma_handle, unsigned long attrs)
230{
231}
232static inline void *dmam_alloc_attrs(struct device *dev, size_t size,
233 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
234{
235 return NULL;
236}
237static inline void dmam_free_coherent(struct device *dev, size_t size,
238 void *vaddr, dma_addr_t dma_handle)
239{
240}
ed6ccf10
CH		 241static inline int dma_get_sgtable_attrs(struct device *dev,
242 struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr,
243 size_t size, unsigned long attrs)
244{
245 return -ENXIO;
246}
247static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
248 void *cpu_addr, dma_addr_t dma_addr, size_t size,
249 unsigned long attrs)
250{
251 return -ENXIO;
252}
e29ccc18
CH		 253static inline bool dma_can_mmap(struct device *dev)
254{
255 return false;
256}
ed6ccf10
CH		 257static inline int dma_supported(struct device *dev, u64 mask)
258{
259 return 0;
260}
261static inline int dma_set_mask(struct device *dev, u64 mask)
262{
263 return -EIO;
264}
265static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
266{
267 return -EIO;
268}
269static inline u64 dma_get_required_mask(struct device *dev)
270{
271 return 0;
272}
133d624b
JR		 273static inline size_t dma_max_mapping_size(struct device *dev)
274{
275 return 0;
276}
3aa91625
CH		 277static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr)
278{
279 return false;
280}
6ba99411
YS		 281static inline unsigned long dma_get_merge_boundary(struct device *dev)
282{
283 return 0;
284}
7d5b5738
CH		 285static inline struct sg_table *dma_alloc_noncontiguous(struct device *dev,
286 size_t size, enum dma_data_direction dir, gfp_t gfp,
287 unsigned long attrs)
288{
289 return NULL;
290}
291static inline void dma_free_noncontiguous(struct device *dev, size_t size,
292 struct sg_table *sgt, enum dma_data_direction dir)
293{
294}
295static inline void *dma_vmap_noncontiguous(struct device *dev, size_t size,
296 struct sg_table *sgt)
297{
298 return NULL;
299}
300static inline void dma_vunmap_noncontiguous(struct device *dev, void *vaddr)
301{
302}
303static inline int dma_mmap_noncontiguous(struct device *dev,
304 struct vm_area_struct *vma, size_t size, struct sg_table *sgt)
305{
306 return -EINVAL;
307}
ed6ccf10
CH		 308#endif /* CONFIG_HAS_DMA */
309
efa70f2f
CH		 310struct page *dma_alloc_pages(struct device *dev, size_t size,
311 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
312void dma_free_pages(struct device *dev, size_t size, struct page *page,
313 dma_addr_t dma_handle, enum dma_data_direction dir);
eedb0b12
CH		 314int dma_mmap_pages(struct device *dev, struct vm_area_struct *vma,
315 size_t size, struct page *page);
81d88ce5
CH		 316
317static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
318 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
319{
320 struct page *page = dma_alloc_pages(dev, size, dma_handle, dir, gfp);
321 return page ? page_address(page) : NULL;
322}
323
324static inline void dma_free_noncoherent(struct device *dev, size_t size,
325 void *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir)
326{
327 dma_free_pages(dev, size, virt_to_page(vaddr), dma_handle, dir);
328}
0d71675f 329
2e05ea5c
CH		 330static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
331 size_t size, enum dma_data_direction dir, unsigned long attrs)
332{
4544b9f2
KC		 333 /* DMA must never operate on areas that might be remapped. */
334 if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr),
335 "rejecting DMA map of vmalloc memory\n"))
336 return DMA_MAPPING_ERROR;
2e05ea5c
CH		 337 debug_dma_map_single(dev, ptr, size);
338 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr),
339 size, dir, attrs);
340}
341
342static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
343 size_t size, enum dma_data_direction dir, unsigned long attrs)
344{
345 return dma_unmap_page_attrs(dev, addr, size, dir, attrs);
346}
347
ed6ccf10
CH		 348static inline void dma_sync_single_range_for_cpu(struct device *dev,
349 dma_addr_t addr, unsigned long offset, size_t size,
350 enum dma_data_direction dir)
351{
352 return dma_sync_single_for_cpu(dev, addr + offset, size, dir);
353}
354
355static inline void dma_sync_single_range_for_device(struct device *dev,
356 dma_addr_t addr, unsigned long offset, size_t size,
357 enum dma_data_direction dir)
358{
359 return dma_sync_single_for_device(dev, addr + offset, size, dir);
360}
361
d9d200bc
MS		 362/**
363 * dma_unmap_sgtable - Unmap the given buffer for DMA
364 * @dev: The device for which to perform the DMA operation
365 * @sgt: The sg_table object describing the buffer
366 * @dir: DMA direction
367 * @attrs: Optional DMA attributes for the unmap operation
368 *
369 * Unmaps a buffer described by a scatterlist stored in the given sg_table
370 * object for the @dir DMA operation by the @dev device. After this function
371 * the ownership of the buffer is transferred back to the CPU domain.
372 */
373static inline void dma_unmap_sgtable(struct device *dev, struct sg_table *sgt,
374 enum dma_data_direction dir, unsigned long attrs)
375{
376 dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs);
377}
378
379/**
380 * dma_sync_sgtable_for_cpu - Synchronize the given buffer for CPU access
381 * @dev: The device for which to perform the DMA operation
382 * @sgt: The sg_table object describing the buffer
383 * @dir: DMA direction
384 *
385 * Performs the needed cache synchronization and moves the ownership of the
386 * buffer back to the CPU domain, so it is safe to perform any access to it
387 * by the CPU. Before doing any further DMA operations, one has to transfer
388 * the ownership of the buffer back to the DMA domain by calling the
389 * dma_sync_sgtable_for_device().
390 */
391static inline void dma_sync_sgtable_for_cpu(struct device *dev,
392 struct sg_table *sgt, enum dma_data_direction dir)
393{
394 dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir);
395}
396
397/**
398 * dma_sync_sgtable_for_device - Synchronize the given buffer for DMA
399 * @dev: The device for which to perform the DMA operation
400 * @sgt: The sg_table object describing the buffer
401 * @dir: DMA direction
402 *
403 * Performs the needed cache synchronization and moves the ownership of the
404 * buffer back to the DMA domain, so it is safe to perform the DMA operation.
405 * Once finished, one has to call dma_sync_sgtable_for_cpu() or
406 * dma_unmap_sgtable().
407 */
408static inline void dma_sync_sgtable_for_device(struct device *dev,
409 struct sg_table *sgt, enum dma_data_direction dir)
410{
411 dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir);
412}
413
00085f1e
KK		 414#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
415#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
416#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
417#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
0495c3d3
AD		 418#define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
419#define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
ed6ccf10
CH		 420#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
421#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
c9eb6172 422
e1c7e324 423static inline void *dma_alloc_coherent(struct device *dev, size_t size,
7ed1d91a 424 dma_addr_t *dma_handle, gfp_t gfp)
e1c7e324 425{
7ed1d91a
CH		 426 return dma_alloc_attrs(dev, size, dma_handle, gfp,
427 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
e1c7e324
CH		 428}
429
430static inline void dma_free_coherent(struct device *dev, size_t size,
431 void *cpu_addr, dma_addr_t dma_handle)
432{
00085f1e 433 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
e1c7e324
CH		 434}
435
1da177e4 436
589fc9a6
FT		 437static inline u64 dma_get_mask(struct device *dev)
438{
d7e02a93 439 if (dev->dma_mask && *dev->dma_mask)
589fc9a6 440 return *dev->dma_mask;
284901a9 441 return DMA_BIT_MASK(32);
589fc9a6
FT		 442}
443
4aa806b7
RK		 444/*
445 * Set both the DMA mask and the coherent DMA mask to the same thing.
446 * Note that we don't check the return value from dma_set_coherent_mask()
447 * as the DMA API guarantees that the coherent DMA mask can be set to
448 * the same or smaller than the streaming DMA mask.
449 */
450static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
451{
452 int rc = dma_set_mask(dev, mask);
453 if (rc == 0)
454 dma_set_coherent_mask(dev, mask);
455 return rc;
456}
457
fa6a8d6d
RK		 458/*
459 * Similar to the above, except it deals with the case where the device
460 * does not have dev->dma_mask appropriately setup.
461 */
462static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
463{
464 dev->dma_mask = &dev->coherent_dma_mask;
465 return dma_set_mask_and_coherent(dev, mask);
466}
467
b8664554
CH		 468/**
469 * dma_addressing_limited - return if the device is addressing limited
470 * @dev: device to check
471 *
472 * Return %true if the devices DMA mask is too small to address all memory in
473 * the system, else %false. Lack of addressing bits is the prime reason for
474 * bounce buffering, but might not be the only one.
475 */
476static inline bool dma_addressing_limited(struct device *dev)
477{
a7ba70f1 478 return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) <
06532750 479 dma_get_required_mask(dev);
b8664554
CH		 480}
481
6b7b6510
FT		 482static inline unsigned int dma_get_max_seg_size(struct device *dev)
483{
002edb6f
RM		 484 if (dev->dma_parms && dev->dma_parms->max_segment_size)
485 return dev->dma_parms->max_segment_size;
486 return SZ_64K;
6b7b6510
FT		 487}
488
c9d76d06 489static inline int dma_set_max_seg_size(struct device *dev, unsigned int size)
6b7b6510
FT		 490{
491 if (dev->dma_parms) {
492 dev->dma_parms->max_segment_size = size;
493 return 0;
002edb6f
RM		 494 }
495 return -EIO;
6b7b6510
FT		 496}
497
d22a6966
FT		 498static inline unsigned long dma_get_seg_boundary(struct device *dev)
499{
002edb6f
RM		 500 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
501 return dev->dma_parms->segment_boundary_mask;
135ba11a 502 return ULONG_MAX;
d22a6966
FT		 503}
504
1e9d90db
NC		 505/**
506 * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units
507 * @dev: device to guery the boundary for
508 * @page_shift: ilog() of the IOMMU page size
509 *
510 * Return the segment boundary in IOMMU page units (which may be different from
511 * the CPU page size) for the passed in device.
512 *
513 * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for
514 * non-DMA API callers.
515 */
516static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev,
517 unsigned int page_shift)
518{
519 if (!dev)
520 return (U32_MAX >> page_shift) + 1;
521 return (dma_get_seg_boundary(dev) >> page_shift) + 1;
522}
523
d22a6966
FT		 524static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
525{
526 if (dev->dma_parms) {
527 dev->dma_parms->segment_boundary_mask = mask;
528 return 0;
002edb6f
RM		 529 }
530 return -EIO;
d22a6966
FT		 531}
532
36950f2d
JG		 533static inline unsigned int dma_get_min_align_mask(struct device *dev)
534{
535 if (dev->dma_parms)
536 return dev->dma_parms->min_align_mask;
537 return 0;
538}
539
540static inline int dma_set_min_align_mask(struct device *dev,
541 unsigned int min_align_mask)
542{
543 if (WARN_ON_ONCE(!dev->dma_parms))
544 return -EIO;
545 dev->dma_parms->min_align_mask = min_align_mask;
546 return 0;
547}
548
4565f017
FT		 549static inline int dma_get_cache_alignment(void)
550{
551#ifdef ARCH_DMA_MINALIGN
552 return ARCH_DMA_MINALIGN;
553#endif
554 return 1;
555}
556
d7076f07
CH		 557static inline void *dmam_alloc_coherent(struct device *dev, size_t size,
558 dma_addr_t *dma_handle, gfp_t gfp)
559{
560 return dmam_alloc_attrs(dev, size, dma_handle, gfp,
561 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
562}
563
f6e45661
LR		 564static inline void *dma_alloc_wc(struct device *dev, size_t size,
565 dma_addr_t *dma_addr, gfp_t gfp)
b4bbb107 566{
0cd60eb1 567 unsigned long attrs = DMA_ATTR_WRITE_COMBINE;
7ed1d91a
CH		 568
569 if (gfp & __GFP_NOWARN)
570 attrs |= DMA_ATTR_NO_WARN;
571
572 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs);
b4bbb107
TR		 573}
574
f6e45661
LR		 575static inline void dma_free_wc(struct device *dev, size_t size,
576 void *cpu_addr, dma_addr_t dma_addr)
b4bbb107 577{
00085f1e
KK		 578 return dma_free_attrs(dev, size, cpu_addr, dma_addr,
579 DMA_ATTR_WRITE_COMBINE);
b4bbb107
TR		 580}
581
f6e45661
LR		 582static inline int dma_mmap_wc(struct device *dev,
583 struct vm_area_struct *vma,
584 void *cpu_addr, dma_addr_t dma_addr,
585 size_t size)
b4bbb107 586{
00085f1e
KK		 587 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
588 DMA_ATTR_WRITE_COMBINE);
b4bbb107 589}
74bc7cee 590
f616ab59 591#ifdef CONFIG_NEED_DMA_MAP_STATE
0acedc12
FT		 592#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
593#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
594#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
595#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
596#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
597#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
598#else
599#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
600#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
601#define dma_unmap_addr(PTR, ADDR_NAME) (0)
602#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
603#define dma_unmap_len(PTR, LEN_NAME) (0)
604#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
605#endif
606
e0d07278 607#endif /* _LINUX_DMA_MAPPING_H */
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