projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 9b53a9e2 YS |
1 | /* |
| 2 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. | |
| 3 | * | |
| 4 | * Freescale DIU Frame Buffer device driver | |
| 5 | * | |
| 6 | * Authors: Hongjun Chen <hong-jun.chen@freescale.com> | |
| 7 | * Paul Widmer <paul.widmer@freescale.com> | |
| 8 | * Srikanth Srinivasan <srikanth.srinivasan@freescale.com> | |
| 9 | * York Sun <yorksun@freescale.com> | |
| 10 | * | |
| 11 | * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix | |
| 12 | * | |
| 13 | * This program is free software; you can redistribute it and/or modify it | |
| 14 | * under the terms of the GNU General Public License as published by the | |
| 15 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 16 | * option) any later version. | |
| 17 | * | |
| 18 | */ | |
| 19 | ||
| 20 | #ifndef __FSL_DIU_FB_H__ | |
| 21 | #define __FSL_DIU_FB_H__ | |
| 22 | ||
| 9b53a9e2 YS |
23 | #include <linux/types.h> |
| 24 | ||
| 9b53a9e2 YS |
25 | struct mfb_chroma_key { |
| 26 | int enable; | |
| 27 | __u8 red_max; | |
| 28 | __u8 green_max; | |
| 29 | __u8 blue_max; | |
| 30 | __u8 red_min; | |
| 31 | __u8 green_min; | |
| 32 | __u8 blue_min; | |
| 33 | }; | |
| 34 | ||
| 35 | struct aoi_display_offset { | |
| 36b0b1d4 TT |
36 | __s32 x_aoi_d; |
| 37 | __s32 y_aoi_d; | |
| 9b53a9e2 YS |
38 | }; |
| 39 | ||
| 40 | #define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key) | |
| 9b53a9e2 | 41 | #define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8) |
| 36b0b1d4 TT |
42 | #define MFB_SET_ALPHA _IOW('M', 0, __u8) |
| 43 | #define MFB_GET_ALPHA _IOR('M', 0, __u8) | |
| 44 | #define MFB_SET_AOID _IOW('M', 4, struct aoi_display_offset) | |
| 45 | #define MFB_GET_AOID _IOR('M', 4, struct aoi_display_offset) | |
| 46 | #define MFB_SET_PIXFMT _IOW('M', 8, __u32) | |
| 47 | #define MFB_GET_PIXFMT _IOR('M', 8, __u32) | |
| 9b53a9e2 | 48 | |
| 36b0b1d4 TT |
49 | /* |
| 50 | * The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the | |
| 51 | * wrong value for 'size' field of the ioctl. The current macros above use the | |
| 52 | * right size, but we still need to provide backwards compatibility, at least | |
| 53 | * for a while. | |
| 54 | */ | |
| 55 | #define MFB_SET_PIXFMT_OLD 0x80014d08 | |
| 56 | #define MFB_GET_PIXFMT_OLD 0x40014d08 | |
| 9b53a9e2 YS |
57 | |
| 58 | #ifdef __KERNEL__ | |
| 9b53a9e2 YS |
59 | |
| 60 | /* | |
| 61 | * These are the fields of area descriptor(in DDR memory) for every plane | |
| 62 | */ | |
| 63 | struct diu_ad { | |
| 64 | /* Word 0(32-bit) in DDR memory */ | |
| 65 | /* __u16 comp; */ | |
| 66 | /* __u16 pixel_s:2; */ | |
| 67 | /* __u16 pallete:1; */ | |
| 68 | /* __u16 red_c:2; */ | |
| 69 | /* __u16 green_c:2; */ | |
| 70 | /* __u16 blue_c:2; */ | |
| 71 | /* __u16 alpha_c:3; */ | |
| 72 | /* __u16 byte_f:1; */ | |
| 73 | /* __u16 res0:3; */ | |
| 74 | ||
| 75 | __be32 pix_fmt; /* hard coding pixel format */ | |
| 76 | ||
| 77 | /* Word 1(32-bit) in DDR memory */ | |
| 78 | __le32 addr; | |
| 79 | ||
| 80 | /* Word 2(32-bit) in DDR memory */ | |
| 81 | /* __u32 delta_xs:11; */ | |
| 82 | /* __u32 res1:1; */ | |
| 83 | /* __u32 delta_ys:11; */ | |
| 84 | /* __u32 res2:1; */ | |
| 85 | /* __u32 g_alpha:8; */ | |
| 86 | __le32 src_size_g_alpha; | |
| 87 | ||
| 88 | /* Word 3(32-bit) in DDR memory */ | |
| 89 | /* __u32 delta_xi:11; */ | |
| 90 | /* __u32 res3:5; */ | |
| 91 | /* __u32 delta_yi:11; */ | |
| 92 | /* __u32 res4:3; */ | |
| 93 | /* __u32 flip:2; */ | |
| 94 | __le32 aoi_size; | |
| 95 | ||
| 96 | /* Word 4(32-bit) in DDR memory */ | |
| 97 | /*__u32 offset_xi:11; | |
| 98 | __u32 res5:5; | |
| 99 | __u32 offset_yi:11; | |
| 100 | __u32 res6:5; | |
| 101 | */ | |
| 102 | __le32 offset_xyi; | |
| 103 | ||
| 104 | /* Word 5(32-bit) in DDR memory */ | |
| 105 | /*__u32 offset_xd:11; | |
| 106 | __u32 res7:5; | |
| 107 | __u32 offset_yd:11; | |
| 108 | __u32 res8:5; */ | |
| 109 | __le32 offset_xyd; | |
| 110 | ||
| 111 | ||
| 112 | /* Word 6(32-bit) in DDR memory */ | |
| 113 | __u8 ckmax_r; | |
| 114 | __u8 ckmax_g; | |
| 115 | __u8 ckmax_b; | |
| 116 | __u8 res9; | |
| 117 | ||
| 118 | /* Word 7(32-bit) in DDR memory */ | |
| 119 | __u8 ckmin_r; | |
| 120 | __u8 ckmin_g; | |
| 121 | __u8 ckmin_b; | |
| 122 | __u8 res10; | |
| 123 | /* __u32 res10:8; */ | |
| 124 | ||
| 125 | /* Word 8(32-bit) in DDR memory */ | |
| 126 | __le32 next_ad; | |
| 127 | ||
| 128 | /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ | |
| 129 | __u32 paddr; | |
| 130 | } __attribute__ ((packed)); | |
| 131 | ||
| 132 | /* DIU register map */ | |
| 133 | struct diu { | |
| 134 | __be32 desc[3]; | |
| 135 | __be32 gamma; | |
| 136 | __be32 pallete; | |
| 137 | __be32 cursor; | |
| 138 | __be32 curs_pos; | |
| 139 | __be32 diu_mode; | |
| 140 | __be32 bgnd; | |
| 141 | __be32 bgnd_wb; | |
| 142 | __be32 disp_size; | |
| 143 | __be32 wb_size; | |
| 144 | __be32 wb_mem_addr; | |
| 145 | __be32 hsyn_para; | |
| 146 | __be32 vsyn_para; | |
| 147 | __be32 syn_pol; | |
| 148 | __be32 thresholds; | |
| 149 | __be32 int_status; | |
| 150 | __be32 int_mask; | |
| 151 | __be32 colorbar[8]; | |
| 152 | __be32 filling; | |
| 153 | __be32 plut; | |
| 154 | } __attribute__ ((packed)); | |
| 155 | ||
| c4e5a023 TT |
156 | /* |
| 157 | * Modes of operation of DIU. The DIU supports five different modes, but | |
| 158 | * the driver only supports modes 0 and 1. | |
| 159 | */ | |
| 9b53a9e2 YS |
160 | #define MFB_MODE0 0 /* DIU off */ |
| 161 | #define MFB_MODE1 1 /* All three planes output to display */ | |
| 9b53a9e2 | 162 | |
| 9b53a9e2 YS |
163 | #endif /* __KERNEL__ */ |
| 164 | #endif /* __FSL_DIU_FB_H__ */ |