[mirror_ubuntu-artful-kernel.git] / include / linux / gpio / driver.h

#ifndef __LINUX_GPIO_DRIVER_H
#define __LINUX_GPIO_DRIVER_H

#include <linux/types.h>
#include <linux/module.h>
#include <linux/irq.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/lockdep.h>
#include <linux/pinctrl/pinctrl.h>

struct device;
struct gpio_desc;
struct of_phandle_args;
struct device_node;
struct seq_file;

#ifdef CONFIG_GPIOLIB

/**
 * struct gpio_chip - abstract a GPIO controller
 * @label: for diagnostics
 * @dev: optional device providing the GPIOs
 * @cdev: class device used by sysfs interface (may be NULL)
 * @owner: helps prevent removal of modules exporting active GPIOs
 * @list: links gpio_chips together for traversal
 * @request: optional hook for chip-specific activation, such as
 *	enabling module power and clock; may sleep
 * @free: optional hook for chip-specific deactivation, such as
 *	disabling module power and clock; may sleep
 * @get_direction: returns direction for signal "offset", 0=out, 1=in,
 *	(same as GPIOF_DIR_XXX), or negative error
 * @direction_input: configures signal "offset" as input, or returns error
 * @direction_output: configures signal "offset" as output, or returns error
 * @get: returns value for signal "offset"; for output signals this
 *	returns either the value actually sensed, or zero
 * @set: assigns output value for signal "offset"
 * @set_multiple: assigns output values for multiple signals defined by "mask"
 * @set_debounce: optional hook for setting debounce time for specified gpio in
 *      interrupt triggered gpio chips
 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
 *	implementation may not sleep
 * @dbg_show: optional routine to show contents in debugfs; default code
 *	will be used when this is omitted, but custom code can show extra
 *	state (such as pullup/pulldown configuration).
 * @base: identifies the first GPIO number handled by this chip;
 *	or, if negative during registration, requests dynamic ID allocation.
 *	DEPRECATION: providing anything non-negative and nailing the base
 *	offset of GPIO chips is deprecated. Please pass -1 as base to
 *	let gpiolib select the chip base in all possible cases. We want to
 *	get rid of the static GPIO number space in the long run.
 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
 *	handled is (base + ngpio - 1).
 * @desc: array of ngpio descriptors. Private.
 * @names: if set, must be an array of strings to use as alternative
 *      names for the GPIOs in this chip. Any entry in the array
 *      may be NULL if there is no alias for the GPIO, however the
 *      array must be @ngpio entries long.  A name can include a single printk
 *      format specifier for an unsigned int.  It is substituted by the actual
 *      number of the gpio.
 * @can_sleep: flag must be set iff get()/set() methods sleep, as they
 *	must while accessing GPIO expander chips over I2C or SPI. This
 *	implies that if the chip supports IRQs, these IRQs need to be threaded
 *	as the chip access may sleep when e.g. reading out the IRQ status
 *	registers.
 * @irq_not_threaded: flag must be set if @can_sleep is set but the
 *	IRQs don't need to be threaded
 *
 * A gpio_chip can help platforms abstract various sources of GPIOs so
 * they can all be accessed through a common programing interface.
 * Example sources would be SOC controllers, FPGAs, multifunction
 * chips, dedicated GPIO expanders, and so on.
 *
 * Each chip controls a number of signals, identified in method calls
 * by "offset" values in the range 0..(@ngpio - 1).  When those signals
 * are referenced through calls like gpio_get_value(gpio), the offset
 * is calculated by subtracting @base from the gpio number.
 */
struct gpio_chip {
	const char		*label;
	struct device		*dev;
	struct device		*cdev;
	struct module		*owner;
	struct list_head        list;

	int			(*request)(struct gpio_chip *chip,
						unsigned offset);
	void			(*free)(struct gpio_chip *chip,
						unsigned offset);
	int			(*get_direction)(struct gpio_chip *chip,
						unsigned offset);
	int			(*direction_input)(struct gpio_chip *chip,
						unsigned offset);
	int			(*direction_output)(struct gpio_chip *chip,
						unsigned offset, int value);
	int			(*get)(struct gpio_chip *chip,
						unsigned offset);
	void			(*set)(struct gpio_chip *chip,
						unsigned offset, int value);
	void			(*set_multiple)(struct gpio_chip *chip,
						unsigned long *mask,
						unsigned long *bits);
	int			(*set_debounce)(struct gpio_chip *chip,
						unsigned offset,
						unsigned debounce);

	int			(*to_irq)(struct gpio_chip *chip,
						unsigned offset);

	void			(*dbg_show)(struct seq_file *s,
						struct gpio_chip *chip);
	int			base;
	u16			ngpio;
	struct gpio_desc	*desc;
	const char		*const *names;
	bool			can_sleep;
	bool			irq_not_threaded;

#ifdef CONFIG_GPIOLIB_IRQCHIP
	/*
	 * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
	 * to handle IRQs for most practical cases.
	 */
	struct irq_chip		*irqchip;
	struct irq_domain	*irqdomain;
	unsigned int		irq_base;
	irq_flow_handler_t	irq_handler;
	unsigned int		irq_default_type;
	int			irq_parent;
	struct lock_class_key	*lock_key;
#endif

#if defined(CONFIG_OF_GPIO)
	/*
	 * If CONFIG_OF is enabled, then all GPIO controllers described in the
	 * device tree automatically may have an OF translation
	 */
	struct device_node *of_node;
	int of_gpio_n_cells;
	int (*of_xlate)(struct gpio_chip *gc,
			const struct of_phandle_args *gpiospec, u32 *flags);
#endif
#ifdef CONFIG_PINCTRL
	/*
	 * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
	 * describe the actual pin range which they serve in an SoC. This
	 * information would be used by pinctrl subsystem to configure
	 * corresponding pins for gpio usage.
	 */
	struct list_head pin_ranges;
#endif
};

extern const char *gpiochip_is_requested(struct gpio_chip *chip,
			unsigned offset);

/* add/remove chips */
extern int gpiochip_add(struct gpio_chip *chip);
extern void gpiochip_remove(struct gpio_chip *chip);
extern struct gpio_chip *gpiochip_find(void *data,
			      int (*match)(struct gpio_chip *chip, void *data));

/* lock/unlock as IRQ */
int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);

struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);

#ifdef CONFIG_GPIOLIB_IRQCHIP

void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
		struct irq_chip *irqchip,
		int parent_irq,
		irq_flow_handler_t parent_handler);

int _gpiochip_irqchip_add(struct gpio_chip *gpiochip,
			  struct irq_chip *irqchip,
			  unsigned int first_irq,
			  irq_flow_handler_t handler,
			  unsigned int type,
			  struct lock_class_key *lock_key);

#ifdef CONFIG_LOCKDEP
#define gpiochip_irqchip_add(...)				\
(								\
	({							\
		static struct lock_class_key _key;		\
		_gpiochip_irqchip_add(__VA_ARGS__, &_key);	\
	})							\
)
#else
#define gpiochip_irqchip_add(...)				\
	_gpiochip_irqchip_add(__VA_ARGS__, NULL)
#endif

#endif /* CONFIG_GPIOLIB_IRQCHIP */

#ifdef CONFIG_PINCTRL

/**
 * struct gpio_pin_range - pin range controlled by a gpio chip
 * @head: list for maintaining set of pin ranges, used internally
 * @pctldev: pinctrl device which handles corresponding pins
 * @range: actual range of pins controlled by a gpio controller
 */

struct gpio_pin_range {
	struct list_head node;
	struct pinctrl_dev *pctldev;
	struct pinctrl_gpio_range range;
};

int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
			   unsigned int gpio_offset, unsigned int pin_offset,
			   unsigned int npins);
int gpiochip_add_pingroup_range(struct gpio_chip *chip,
			struct pinctrl_dev *pctldev,
			unsigned int gpio_offset, const char *pin_group);
void gpiochip_remove_pin_ranges(struct gpio_chip *chip);

#else

static inline int
gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
		       unsigned int gpio_offset, unsigned int pin_offset,
		       unsigned int npins)
{
	return 0;
}
static inline int
gpiochip_add_pingroup_range(struct gpio_chip *chip,
			struct pinctrl_dev *pctldev,
			unsigned int gpio_offset, const char *pin_group)
{
	return 0;
}

static inline void
gpiochip_remove_pin_ranges(struct gpio_chip *chip)
{
}

#endif /* CONFIG_PINCTRL */

struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
					    const char *label);
void gpiochip_free_own_desc(struct gpio_desc *desc);

#else /* CONFIG_GPIOLIB */

static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
{
	/* GPIO can never have been requested */
	WARN_ON(1);
	return ERR_PTR(-ENODEV);
}

#endif /* CONFIG_GPIOLIB */

#endif
Commit	Line	Data
79a9becd AC	1	#ifndef __LINUX_GPIO_DRIVER_H
	2	#define __LINUX_GPIO_DRIVER_H
	3
	4	#include <linux/types.h>
c9a9972b	5	#include <linux/module.h>
14250520 LW	6	#include <linux/irq.h>
	7	#include <linux/irqchip/chained_irq.h>
	8	#include <linux/irqdomain.h>
a0a8bcf4	9	#include <linux/lockdep.h>
964cb341	10	#include <linux/pinctrl/pinctrl.h>
79a9becd AC	11
	12	struct device;
	13	struct gpio_desc;
c9a9972b AC	14	struct of_phandle_args;
c9a9972b AC	15	struct device_node;
f3ed0b66	16	struct seq_file;
79a9becd	17
bb1e88cc AC	18	#ifdef CONFIG_GPIOLIB
bb1e88cc AC	19
79a9becd AC	20	/**
	21	* struct gpio_chip - abstract a GPIO controller
	22	* @label: for diagnostics
	23	* @dev: optional device providing the GPIOs
6a4b6b0a	24	* @cdev: class device used by sysfs interface (may be NULL)
79a9becd AC	25	* @owner: helps prevent removal of modules exporting active GPIOs
	26	* @list: links gpio_chips together for traversal
	27	* @request: optional hook for chip-specific activation, such as
	28	* enabling module power and clock; may sleep
	29	* @free: optional hook for chip-specific deactivation, such as
	30	* disabling module power and clock; may sleep
	31	* @get_direction: returns direction for signal "offset", 0=out, 1=in,
	32	* (same as GPIOF_DIR_XXX), or negative error
	33	* @direction_input: configures signal "offset" as input, or returns error
	34	* @direction_output: configures signal "offset" as output, or returns error
	35	* @get: returns value for signal "offset"; for output signals this
	36	* returns either the value actually sensed, or zero
	37	* @set: assigns output value for signal "offset"
5f424243	38	* @set_multiple: assigns output values for multiple signals defined by "mask"
79a9becd AC	39	* @set_debounce: optional hook for setting debounce time for specified gpio in
	40	* interrupt triggered gpio chips
	41	* @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
	42	* implementation may not sleep
	43	* @dbg_show: optional routine to show contents in debugfs; default code
	44	* will be used when this is omitted, but custom code can show extra
	45	* state (such as pullup/pulldown configuration).
af6c235d LW	46	* @base: identifies the first GPIO number handled by this chip;
	47	* or, if negative during registration, requests dynamic ID allocation.
	48	* DEPRECATION: providing anything non-negative and nailing the base
30bb6fb3	49	* offset of GPIO chips is deprecated. Please pass -1 as base to
af6c235d LW	50	* let gpiolib select the chip base in all possible cases. We want to
af6c235d LW	51	* get rid of the static GPIO number space in the long run.
79a9becd AC	52	* @ngpio: the number of GPIOs handled by this controller; the last GPIO
	53	* handled is (base + ngpio - 1).
	54	* @desc: array of ngpio descriptors. Private.
79a9becd AC	55	* @names: if set, must be an array of strings to use as alternative
	56	* names for the GPIOs in this chip. Any entry in the array
	57	* may be NULL if there is no alias for the GPIO, however the
	58	* array must be @ngpio entries long. A name can include a single printk
	59	* format specifier for an unsigned int. It is substituted by the actual
	60	* number of the gpio.
9fb1f39e	61	* @can_sleep: flag must be set iff get()/set() methods sleep, as they
1c8732bb LW	62	* must while accessing GPIO expander chips over I2C or SPI. This
	63	* implies that if the chip supports IRQs, these IRQs need to be threaded
	64	* as the chip access may sleep when e.g. reading out the IRQ status
	65	* registers.
295494af OP	66	* @irq_not_threaded: flag must be set if @can_sleep is set but the
295494af OP	67	* IRQs don't need to be threaded
79a9becd AC	68	*
	69	* A gpio_chip can help platforms abstract various sources of GPIOs so
	70	* they can all be accessed through a common programing interface.
	71	* Example sources would be SOC controllers, FPGAs, multifunction
	72	* chips, dedicated GPIO expanders, and so on.
	73	*
	74	* Each chip controls a number of signals, identified in method calls
	75	* by "offset" values in the range 0..(@ngpio - 1). When those signals
	76	* are referenced through calls like gpio_get_value(gpio), the offset
	77	* is calculated by subtracting @base from the gpio number.
	78	*/
	79	struct gpio_chip {
	80	const char *label;
	81	struct device *dev;
6a4b6b0a	82	struct device *cdev;
79a9becd AC	83	struct module *owner;
	84	struct list_head list;
	85
	86	int (request)(struct gpio_chip chip,
	87	unsigned offset);
	88	void (free)(struct gpio_chip chip,
	89	unsigned offset);
	90	int (get_direction)(struct gpio_chip chip,
	91	unsigned offset);
	92	int (direction_input)(struct gpio_chip chip,
	93	unsigned offset);
	94	int (direction_output)(struct gpio_chip chip,
	95	unsigned offset, int value);
	96	int (get)(struct gpio_chip chip,
	97	unsigned offset);
	98	void (set)(struct gpio_chip chip,
	99	unsigned offset, int value);
5f424243 RI	100	void (set_multiple)(struct gpio_chip chip,
	101	unsigned long *mask,
	102	unsigned long *bits);
79a9becd AC	103	int (set_debounce)(struct gpio_chip chip,
	104	unsigned offset,
	105	unsigned debounce);
	106
	107	int (to_irq)(struct gpio_chip chip,
	108	unsigned offset);
	109
	110	void (dbg_show)(struct seq_file s,
	111	struct gpio_chip *chip);
	112	int base;
	113	u16 ngpio;
	114	struct gpio_desc *desc;
	115	const char const names;
9fb1f39e	116	bool can_sleep;
295494af	117	bool irq_not_threaded;
79a9becd	118
14250520 LW	119	#ifdef CONFIG_GPIOLIB_IRQCHIP
14250520 LW	120	/*
7d75a871	121	* With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
14250520 LW	122	* to handle IRQs for most practical cases.
	123	*/
	124	struct irq_chip *irqchip;
	125	struct irq_domain *irqdomain;
c3626fde	126	unsigned int irq_base;
14250520 LW	127	irq_flow_handler_t irq_handler;
14250520 LW	128	unsigned int irq_default_type;
25e4fe92	129	int irq_parent;
a0a8bcf4	130	struct lock_class_key *lock_key;
14250520 LW	131	#endif
14250520 LW	132
79a9becd AC	133	#if defined(CONFIG_OF_GPIO)
	134	/*
	135	* If CONFIG_OF is enabled, then all GPIO controllers described in the
	136	* device tree automatically may have an OF translation
	137	*/
	138	struct device_node *of_node;
	139	int of_gpio_n_cells;
	140	int (of_xlate)(struct gpio_chip gc,
	141	const struct of_phandle_args gpiospec, u32 flags);
	142	#endif
	143	#ifdef CONFIG_PINCTRL
	144	/*
	145	* If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
	146	* describe the actual pin range which they serve in an SoC. This
	147	* information would be used by pinctrl subsystem to configure
	148	* corresponding pins for gpio usage.
	149	*/
	150	struct list_head pin_ranges;
	151	#endif
	152	};
	153
	154	extern const char gpiochip_is_requested(struct gpio_chip chip,
	155	unsigned offset);
	156
	157	/* add/remove chips */
	158	extern int gpiochip_add(struct gpio_chip *chip);
e1db1706	159	extern void gpiochip_remove(struct gpio_chip *chip);
79a9becd AC	160	extern struct gpio_chip gpiochip_find(void data,
	161	int (match)(struct gpio_chip chip, void *data));
	162
	163	/* lock/unlock as IRQ */
e3a2e878 AC	164	int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
e3a2e878 AC	165	void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
79a9becd	166
bb1e88cc AC	167	struct gpio_chip gpiod_to_chip(const struct gpio_desc desc);
bb1e88cc AC	168
14250520 LW	169	#ifdef CONFIG_GPIOLIB_IRQCHIP
	170
	171	void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
	172	struct irq_chip *irqchip,
	173	int parent_irq,
	174	irq_flow_handler_t parent_handler);
	175
a0a8bcf4 GS	176	int _gpiochip_irqchip_add(struct gpio_chip *gpiochip,
	177	struct irq_chip *irqchip,
	178	unsigned int first_irq,
	179	irq_flow_handler_t handler,
	180	unsigned int type,
	181	struct lock_class_key *lock_key);
	182
	183	#ifdef CONFIG_LOCKDEP
	184	#define gpiochip_irqchip_add(...) \
	185	( \
	186	({ \
	187	static struct lock_class_key _key; \
	188	_gpiochip_irqchip_add(__VA_ARGS__, &_key); \
	189	}) \
	190	)
	191	#else
	192	#define gpiochip_irqchip_add(...) \
	193	_gpiochip_irqchip_add(__VA_ARGS__, NULL)
	194	#endif
14250520	195
7d75a871	196	#endif /* CONFIG_GPIOLIB_IRQCHIP */
14250520	197
964cb341 LW	198	#ifdef CONFIG_PINCTRL
	199
	200	/**
	201	* struct gpio_pin_range - pin range controlled by a gpio chip
	202	* @head: list for maintaining set of pin ranges, used internally
	203	* @pctldev: pinctrl device which handles corresponding pins
	204	* @range: actual range of pins controlled by a gpio controller
	205	*/
	206
	207	struct gpio_pin_range {
	208	struct list_head node;
	209	struct pinctrl_dev *pctldev;
	210	struct pinctrl_gpio_range range;
	211	};
	212
	213	int gpiochip_add_pin_range(struct gpio_chip chip, const char pinctl_name,
	214	unsigned int gpio_offset, unsigned int pin_offset,
	215	unsigned int npins);
	216	int gpiochip_add_pingroup_range(struct gpio_chip *chip,
	217	struct pinctrl_dev *pctldev,
	218	unsigned int gpio_offset, const char *pin_group);
	219	void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
	220
	221	#else
	222
	223	static inline int
	224	gpiochip_add_pin_range(struct gpio_chip chip, const char pinctl_name,
	225	unsigned int gpio_offset, unsigned int pin_offset,
	226	unsigned int npins)
	227	{
	228	return 0;
	229	}
	230	static inline int
	231	gpiochip_add_pingroup_range(struct gpio_chip *chip,
	232	struct pinctrl_dev *pctldev,
	233	unsigned int gpio_offset, const char *pin_group)
	234	{
	235	return 0;
	236	}
	237
	238	static inline void
	239	gpiochip_remove_pin_ranges(struct gpio_chip *chip)
	240	{
	241	}
	242
	243	#endif /* CONFIG_PINCTRL */
	244
abdc08a3 AC	245	struct gpio_desc gpiochip_request_own_desc(struct gpio_chip chip, u16 hwnum,
abdc08a3 AC	246	const char *label);
f7d4ad98 GR	247	void gpiochip_free_own_desc(struct gpio_desc *desc);
f7d4ad98 GR	248
bb1e88cc AC	249	#else /* CONFIG_GPIOLIB */
	250
	251	static inline struct gpio_chip gpiod_to_chip(const struct gpio_desc desc)
	252	{
	253	/* GPIO can never have been requested */
	254	WARN_ON(1);
	255	return ERR_PTR(-ENODEV);
	256	}
	257
	258	#endif /* CONFIG_GPIOLIB */
	259
79a9becd	260	#endif