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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
1da177e4
LT
2#ifndef _IDE_H
3#define _IDE_H
4/*
5 * linux/include/linux/ide.h
6 *
7 * Copyright (C) 1994-2002 Linus Torvalds & authors
8 */
9
1da177e4
LT
10#include <linux/init.h>
11#include <linux/ioport.h>
3ceca727 12#include <linux/ata.h>
60033520 13#include <linux/blk-mq.h>
1da177e4
LT
14#include <linux/proc_fs.h>
15#include <linux/interrupt.h>
16#include <linux/bitops.h>
17#include <linux/bio.h>
1da177e4 18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
feb22b7f 20#include <linux/pm.h>
245e3718 21#include <linux/mutex.h>
a1df5169
BP
22/* for request_sense */
23#include <linux/cdrom.h>
82ed4db4 24#include <scsi/scsi_cmnd.h>
8b48463f
LZ
25#include <asm/byteorder.h>
26#include <asm/io.h>
a1df5169 27
1da177e4
LT
28/*
29 * Probably not wise to fiddle with these
30 */
a687a533 31#define SUPPORT_VLB_SYNC 1
b40d1b88 32#define IDE_DEFAULT_MAX_FAILURES 1
1da177e4
LT
33#define ERROR_MAX 8 /* Max read/write errors per sector */
34#define ERROR_RESET 3 /* Reset controller every 4th retry */
35#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
36
313162d0
PG
37struct device;
38
2f5a8e80
CH
39/* values for ide_request.type */
40enum ata_priv_type {
41 ATA_PRIV_MISC,
42 ATA_PRIV_TASKFILE,
43 ATA_PRIV_PC,
44 ATA_PRIV_SENSE, /* sense request */
45 ATA_PRIV_PM_SUSPEND, /* suspend request */
46 ATA_PRIV_PM_RESUME, /* resume request */
b42171ef
CH
47};
48
82ed4db4
CH
49struct ide_request {
50 struct scsi_request sreq;
51 u8 sense[SCSI_SENSE_BUFFERSIZE];
2f5a8e80 52 u8 type;
22ce0a7c 53 void *special;
82ed4db4
CH
54};
55
2f5a8e80
CH
56static inline struct ide_request *ide_req(struct request *rq)
57{
58 return blk_mq_rq_to_pdu(rq);
59}
60
61static inline bool ata_misc_request(struct request *rq)
62{
aebf526b 63 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_MISC;
2f5a8e80
CH
64}
65
66static inline bool ata_taskfile_request(struct request *rq)
67{
aebf526b 68 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_TASKFILE;
2f5a8e80
CH
69}
70
71static inline bool ata_pc_request(struct request *rq)
72{
aebf526b 73 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_PC;
2f5a8e80
CH
74}
75
76static inline bool ata_sense_request(struct request *rq)
77{
aebf526b 78 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_SENSE;
2f5a8e80
CH
79}
80
81static inline bool ata_pm_request(struct request *rq)
82{
aebf526b 83 return blk_rq_is_private(rq) &&
2f5a8e80
CH
84 (ide_req(rq)->type == ATA_PRIV_PM_SUSPEND ||
85 ide_req(rq)->type == ATA_PRIV_PM_RESUME);
86}
87
17d5363b 88/* Error codes returned in result to the higher part of the driver. */
c152cc1a
BZ
89enum {
90 IDE_DRV_ERROR_GENERAL = 101,
91 IDE_DRV_ERROR_FILEMARK = 102,
92 IDE_DRV_ERROR_EOD = 103,
93};
94
1da177e4
LT
95/*
96 * Definitions for accessing IDE controller registers
97 */
98#define IDE_NR_PORTS (10)
99
4c3032d8
BZ
100struct ide_io_ports {
101 unsigned long data_addr;
102
103 union {
104 unsigned long error_addr; /* read: error */
105 unsigned long feature_addr; /* write: feature */
106 };
107
108 unsigned long nsect_addr;
109 unsigned long lbal_addr;
110 unsigned long lbam_addr;
111 unsigned long lbah_addr;
112
113 unsigned long device_addr;
114
115 union {
116 unsigned long status_addr; /*  read: status  */
117 unsigned long command_addr; /* write: command */
118 };
119
120 unsigned long ctl_addr;
121
122 unsigned long irq_addr;
123};
1da177e4
LT
124
125#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 126
3a7d2484
BZ
127#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
128#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
129#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
130#define DRIVE_READY (ATA_DRDY | ATA_DSC)
131
132#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
133
134#define SATA_NR_PORTS (3) /* 16 possible ?? */
135
136#define SATA_STATUS_OFFSET (0)
1da177e4 137#define SATA_ERROR_OFFSET (1)
1da177e4 138#define SATA_CONTROL_OFFSET (2)
1da177e4 139
1da177e4
LT
140/*
141 * Our Physical Region Descriptor (PRD) table should be large enough
142 * to handle the biggest I/O request we are likely to see. Since requests
143 * can have no more than 256 sectors, and since the typical blocksize is
144 * two or more sectors, we could get by with a limit of 128 entries here for
145 * the usual worst case. Most requests seem to include some contiguous blocks,
146 * further reducing the number of table entries required.
147 *
148 * The driver reverts to PIO mode for individual requests that exceed
149 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
150 * 100% of all crazy scenarios here is not necessary.
151 *
152 * As it turns out though, we must allocate a full 4KB page for this,
153 * so the two PRD tables (ide0 & ide1) will each get half of that,
154 * allowing each to have about 256 entries (8 bytes each) from this.
155 */
156#define PRD_BYTES 8
157#define PRD_ENTRIES 256
158
159/*
160 * Some more useful definitions
161 */
162#define PARTN_BITS 6 /* number of minor dev bits for partitions */
163#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
151a6701 164
1da177e4
LT
165/*
166 * Timeouts for various operations:
167 */
d6e2955a 168enum {
602da297
DM
169 /* spec allows up to 20ms, but CF cards and SSD drives need more */
170 WAIT_DRQ = 1 * HZ, /* 1s */
d6e2955a
BZ
171 /* some laptops are very slow */
172 WAIT_READY = 5 * HZ, /* 5s */
173 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
174 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
175 /* worst case when spinning up */
176 WAIT_WORSTCASE = 30 * HZ, /* 30s */
177 /* maximum wait for an IRQ to happen */
178 WAIT_CMD = 10 * HZ, /* 10s */
179 /* Some drives require a longer IRQ timeout. */
180 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
181 /*
182 * Some drives (for example, Seagate STT3401A Travan) require a very
183 * long timeout, because they don't return an interrupt or clear their
184 * BSY bit until after the command completes (even retension commands).
185 */
186 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
187 /* minimum sleep time */
188 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
189};
1da177e4 190
79e36a9f
EO
191/*
192 * Op codes for special requests to be handled by ide_special_rq().
193 * Values should be in the range of 0x20 to 0x3f.
194 */
195#define REQ_DRIVE_RESET 0x20
92f1f8fd 196#define REQ_DEVSET_EXEC 0x21
4abdc6ee
EO
197#define REQ_PARK_HEADS 0x22
198#define REQ_UNPARK_HEADS 0x23
79e36a9f 199
1da177e4
LT
200/*
201 * hwif_chipset_t is used to keep track of the specific hardware
202 * chipset used by each IDE interface, if known.
203 */
528a572d 204enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
205 ide_cmd640, ide_dtc2278, ide_ali14xx,
206 ide_qd65xx, ide_umc8672, ide_ht6560b,
b7876a6f 207 ide_4drives, ide_pmac, ide_acorn,
9a0e77f2 208 ide_au1xxx, ide_palm3710
528a572d
BZ
209};
210
211typedef u8 hwif_chipset_t;
1da177e4
LT
212
213/*
214 * Structure to hold all information about the location of this port
215 */
9f36d314 216struct ide_hw {
4c3032d8
BZ
217 union {
218 struct ide_io_ports io_ports;
219 unsigned long io_ports_array[IDE_NR_PORTS];
220 };
221
1da177e4 222 int irq; /* our irq number */
c56c5648 223 struct device *dev, *parent;
d6276b5f 224 unsigned long config;
9f36d314 225};
1da177e4 226
9f36d314 227static inline void ide_std_init_ports(struct ide_hw *hw,
1da177e4
LT
228 unsigned long io_addr,
229 unsigned long ctl_addr)
230{
231 unsigned int i;
232
4c3032d8
BZ
233 for (i = 0; i <= 7; i++)
234 hw->io_ports_array[i] = io_addr++;
1da177e4 235
4c3032d8 236 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
237}
238
c5bfc375 239#define MAX_HWIFS 10
83ae20c8 240
1da177e4
LT
241/*
242 * Now for the data we need to maintain per-drive: ide_drive_t
243 */
244
245#define ide_scsi 0x21
246#define ide_disk 0x20
247#define ide_optical 0x7
248#define ide_cdrom 0x5
249#define ide_tape 0x1
250#define ide_floppy 0x0
251
252/*
253 * Special Driver Flags
1da177e4 254 */
ca1b96e0 255enum {
13990cf8
AS
256 IDE_SFLAG_SET_GEOMETRY = BIT(0),
257 IDE_SFLAG_RECALIBRATE = BIT(1),
258 IDE_SFLAG_SET_MULTMODE = BIT(2),
ca1b96e0 259};
1da177e4 260
1da177e4
LT
261/*
262 * Status returned from various ide_ functions
263 */
264typedef enum {
265 ide_stopped, /* no drive operation was started */
266 ide_started, /* a drive operation was started, handler was set */
267} ide_startstop_t;
268
60f85019 269enum {
13990cf8 270 IDE_VALID_ERROR = BIT(1),
60f85019 271 IDE_VALID_FEATURE = IDE_VALID_ERROR,
13990cf8
AS
272 IDE_VALID_NSECT = BIT(2),
273 IDE_VALID_LBAL = BIT(3),
274 IDE_VALID_LBAM = BIT(4),
275 IDE_VALID_LBAH = BIT(5),
276 IDE_VALID_DEVICE = BIT(6),
60f85019
SS
277 IDE_VALID_LBA = IDE_VALID_LBAL |
278 IDE_VALID_LBAM |
279 IDE_VALID_LBAH,
280 IDE_VALID_OUT_TF = IDE_VALID_FEATURE |
281 IDE_VALID_NSECT |
282 IDE_VALID_LBA,
283 IDE_VALID_IN_TF = IDE_VALID_NSECT |
284 IDE_VALID_LBA,
285 IDE_VALID_OUT_HOB = IDE_VALID_OUT_TF,
286 IDE_VALID_IN_HOB = IDE_VALID_ERROR |
287 IDE_VALID_NSECT |
288 IDE_VALID_LBA,
289};
290
d6ff9f64 291enum {
13990cf8
AS
292 IDE_TFLAG_LBA48 = BIT(0),
293 IDE_TFLAG_WRITE = BIT(1),
294 IDE_TFLAG_CUSTOM_HANDLER = BIT(2),
295 IDE_TFLAG_DMA_PIO_FALLBACK = BIT(3),
d6ff9f64 296 /* force 16-bit I/O operations */
13990cf8 297 IDE_TFLAG_IO_16BIT = BIT(4),
22aa4b32 298 /* struct ide_cmd was allocated using kmalloc() */
13990cf8
AS
299 IDE_TFLAG_DYN = BIT(5),
300 IDE_TFLAG_FS = BIT(6),
301 IDE_TFLAG_MULTI_PIO = BIT(7),
302 IDE_TFLAG_SET_XFER = BIT(8),
19710d25
BZ
303};
304
305enum {
13990cf8
AS
306 IDE_FTFLAG_FLAGGED = BIT(0),
307 IDE_FTFLAG_SET_IN_FLAGS = BIT(1),
308 IDE_FTFLAG_OUT_DATA = BIT(2),
309 IDE_FTFLAG_IN_DATA = BIT(3),
d6ff9f64
BZ
310};
311
312struct ide_taskfile {
745483f1
SS
313 u8 data; /* 0: data byte (for TASKFILE ioctl) */
314 union { /* 1: */
315 u8 error; /* read: error */
316 u8 feature; /* write: feature */
d6ff9f64 317 };
745483f1
SS
318 u8 nsect; /* 2: number of sectors */
319 u8 lbal; /* 3: LBA low */
320 u8 lbam; /* 4: LBA mid */
321 u8 lbah; /* 5: LBA high */
322 u8 device; /* 6: device select */
323 union { /* 7: */
324 u8 status; /* read: status */
d6ff9f64
BZ
325 u8 command; /* write: command */
326 };
327};
328
22aa4b32 329struct ide_cmd {
745483f1
SS
330 struct ide_taskfile tf;
331 struct ide_taskfile hob;
60f85019
SS
332 struct {
333 struct {
334 u8 tf;
335 u8 hob;
336 } out, in;
337 } valid;
338
665d66e8 339 u16 tf_flags;
19710d25 340 u8 ftf_flags; /* for TASKFILE ioctl */
0dfb991c 341 int protocol;
b6308ee0
BZ
342
343 int sg_nents; /* number of sg entries */
344 int orig_sg_nents;
345 int sg_dma_direction; /* DMA transfer direction */
346
bf717c0a 347 unsigned int nbytes;
b6308ee0 348 unsigned int nleft;
a08915ba
BZ
349 unsigned int last_xfer_len;
350
b6308ee0
BZ
351 struct scatterlist *cursg;
352 unsigned int cursg_ofs;
353
d6ff9f64 354 struct request *rq; /* copy of request */
22aa4b32 355};
d6ff9f64 356
67c56364
BZ
357/* ATAPI packet command flags */
358enum {
359 /* set when an error is considered normal - no retry (ide-tape) */
13990cf8
AS
360 PC_FLAG_ABORT = BIT(0),
361 PC_FLAG_SUPPRESS_ERROR = BIT(1),
362 PC_FLAG_WAIT_FOR_DSC = BIT(2),
363 PC_FLAG_DMA_OK = BIT(3),
364 PC_FLAG_DMA_IN_PROGRESS = BIT(4),
365 PC_FLAG_DMA_ERROR = BIT(5),
366 PC_FLAG_WRITING = BIT(6),
67c56364
BZ
367};
368
4cad085e 369#define ATAPI_WAIT_PC (60 * HZ)
67c56364
BZ
370
371struct ide_atapi_pc {
372 /* actual packet bytes */
373 u8 c[12];
374 /* incremented on each retry */
375 int retries;
376 int error;
377
378 /* bytes to transfer */
379 int req_xfer;
67c56364
BZ
380
381 /* the corresponding request */
382 struct request *rq;
383
384 unsigned long flags;
385
386 /*
387 * those are more or less driver-specific and some of them are subject
388 * to change/removal later.
389 */
67c56364
BZ
390 unsigned long timeout;
391};
392
8185d5aa 393struct ide_devset;
7f3c868b 394struct ide_driver;
1da177e4 395
e3a59b4d
HR
396#ifdef CONFIG_BLK_DEV_IDEACPI
397struct ide_acpi_drive_link;
398struct ide_acpi_hwif_link;
399#endif
400
806f80a6
BZ
401struct ide_drive_s;
402
403struct ide_disk_ops {
404 int (*check)(struct ide_drive_s *, const char *);
405 int (*get_capacity)(struct ide_drive_s *);
c3e33e04 406 void (*unlock_native_capacity)(struct ide_drive_s *);
806f80a6
BZ
407 void (*setup)(struct ide_drive_s *);
408 void (*flush)(struct ide_drive_s *);
409 int (*init_media)(struct ide_drive_s *, struct gendisk *);
410 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
411 int);
412 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
413 sector_t);
badf8082
AV
414 int (*ioctl)(struct ide_drive_s *, struct block_device *,
415 fmode_t, unsigned int, unsigned long);
c103d6ee
AB
416 int (*compat_ioctl)(struct ide_drive_s *, struct block_device *,
417 fmode_t, unsigned int, unsigned long);
806f80a6
BZ
418};
419
3b8ac539
BP
420/* ATAPI device flags */
421enum {
13990cf8 422 IDE_AFLAG_DRQ_INTERRUPT = BIT(0),
0578042d
BZ
423
424 /* ide-cd */
3b8ac539 425 /* Drive cannot eject the disc. */
13990cf8 426 IDE_AFLAG_NO_EJECT = BIT(1),
3b8ac539 427 /* Drive is a pre ATAPI 1.2 drive. */
13990cf8 428 IDE_AFLAG_PRE_ATAPI12 = BIT(2),
3b8ac539 429 /* TOC addresses are in BCD. */
13990cf8 430 IDE_AFLAG_TOCADDR_AS_BCD = BIT(3),
3b8ac539 431 /* TOC track numbers are in BCD. */
13990cf8 432 IDE_AFLAG_TOCTRACKS_AS_BCD = BIT(4),
3b8ac539 433 /* Saved TOC information is current. */
13990cf8 434 IDE_AFLAG_TOC_VALID = BIT(6),
3b8ac539 435 /* We think that the drive door is locked. */
13990cf8 436 IDE_AFLAG_DOOR_LOCKED = BIT(7),
3b8ac539 437 /* SET_CD_SPEED command is unsupported. */
13990cf8
AS
438 IDE_AFLAG_NO_SPEED_SELECT = BIT(8),
439 IDE_AFLAG_VERTOS_300_SSD = BIT(9),
440 IDE_AFLAG_VERTOS_600_ESD = BIT(10),
441 IDE_AFLAG_SANYO_3CD = BIT(11),
442 IDE_AFLAG_FULL_CAPS_PAGE = BIT(12),
443 IDE_AFLAG_PLAY_AUDIO_OK = BIT(13),
444 IDE_AFLAG_LE_SPEED_FIELDS = BIT(14),
3b8ac539
BP
445
446 /* ide-floppy */
3b8ac539 447 /* Avoid commands not supported in Clik drive */
13990cf8 448 IDE_AFLAG_CLIK_DRIVE = BIT(15),
3b8ac539 449 /* Requires BH algorithm for packets */
13990cf8 450 IDE_AFLAG_ZIP_DRIVE = BIT(16),
49cac39e 451 /* Supports format progress report */
13990cf8 452 IDE_AFLAG_SRFP = BIT(17),
3b8ac539
BP
453
454 /* ide-tape */
13990cf8 455 IDE_AFLAG_IGNORE_DSC = BIT(18),
3b8ac539 456 /* 0 When the tape position is unknown */
13990cf8 457 IDE_AFLAG_ADDRESS_VALID = BIT(19),
3b8ac539 458 /* Device already opened */
13990cf8 459 IDE_AFLAG_BUSY = BIT(20),
3b8ac539 460 /* Attempt to auto-detect the current user block size */
13990cf8 461 IDE_AFLAG_DETECT_BS = BIT(21),
3b8ac539 462 /* Currently on a filemark */
13990cf8 463 IDE_AFLAG_FILEMARK = BIT(22),
3b8ac539 464 /* 0 = no tape is loaded, so we don't rewind after ejecting */
13990cf8 465 IDE_AFLAG_MEDIUM_PRESENT = BIT(23),
f20f2586 466
13990cf8 467 IDE_AFLAG_NO_AUTOCLOSE = BIT(24),
3b8ac539
BP
468};
469
97100fc8
BZ
470/* device flags */
471enum {
472 /* restore settings after device reset */
13990cf8 473 IDE_DFLAG_KEEP_SETTINGS = BIT(0),
97100fc8 474 /* device is using DMA for read/write */
13990cf8 475 IDE_DFLAG_USING_DMA = BIT(1),
97100fc8 476 /* okay to unmask other IRQs */
13990cf8 477 IDE_DFLAG_UNMASK = BIT(2),
97100fc8 478 /* don't attempt flushes */
13990cf8 479 IDE_DFLAG_NOFLUSH = BIT(3),
97100fc8 480 /* DSC overlap */
13990cf8 481 IDE_DFLAG_DSC_OVERLAP = BIT(4),
97100fc8 482 /* give potential excess bandwidth */
13990cf8 483 IDE_DFLAG_NICE1 = BIT(5),
97100fc8 484 /* device is physically present */
13990cf8 485 IDE_DFLAG_PRESENT = BIT(6),
075affcb 486 /* disable Host Protected Area */
13990cf8 487 IDE_DFLAG_NOHPA = BIT(7),
97100fc8 488 /* id read from device (synthetic if not set) */
13990cf8
AS
489 IDE_DFLAG_ID_READ = BIT(8),
490 IDE_DFLAG_NOPROBE = BIT(9),
97100fc8 491 /* need to do check_media_change() */
13990cf8 492 IDE_DFLAG_REMOVABLE = BIT(10),
13990cf8 493 IDE_DFLAG_FORCED_GEOM = BIT(12),
97100fc8 494 /* disallow setting unmask bit */
13990cf8 495 IDE_DFLAG_NO_UNMASK = BIT(13),
97100fc8 496 /* disallow enabling 32-bit I/O */
13990cf8 497 IDE_DFLAG_NO_IO_32BIT = BIT(14),
97100fc8 498 /* for removable only: door lock/unlock works */
13990cf8 499 IDE_DFLAG_DOORLOCKING = BIT(15),
97100fc8 500 /* disallow DMA */
13990cf8 501 IDE_DFLAG_NODMA = BIT(16),
65155b37 502 /* powermanagement told us not to do anything, so sleep nicely */
13990cf8 503 IDE_DFLAG_BLOCKED = BIT(17),
97100fc8 504 /* sleeping & sleep field valid */
13990cf8
AS
505 IDE_DFLAG_SLEEPING = BIT(18),
506 IDE_DFLAG_POST_RESET = BIT(19),
507 IDE_DFLAG_UDMA33_WARNED = BIT(20),
508 IDE_DFLAG_LBA48 = BIT(21),
97100fc8 509 /* status of write cache */
13990cf8 510 IDE_DFLAG_WCACHE = BIT(22),
97100fc8 511 /* used for ignoring ATA_DF */
13990cf8 512 IDE_DFLAG_NOWERR = BIT(23),
c3922048 513 /* retrying in PIO */
13990cf8
AS
514 IDE_DFLAG_DMA_PIO_RETRY = BIT(24),
515 IDE_DFLAG_LBA = BIT(25),
4abdc6ee 516 /* don't unload heads */
13990cf8 517 IDE_DFLAG_NO_UNLOAD = BIT(26),
4abdc6ee 518 /* heads unloaded, please don't reset port */
13990cf8
AS
519 IDE_DFLAG_PARKED = BIT(27),
520 IDE_DFLAG_MEDIA_CHANGED = BIT(28),
da167876 521 /* write protect */
13990cf8
AS
522 IDE_DFLAG_WP = BIT(29),
523 IDE_DFLAG_FORMAT_IN_PROGRESS = BIT(30),
524 IDE_DFLAG_NIEN_QUIRK = BIT(31),
97100fc8
BZ
525};
526
d7c26ebb 527struct ide_drive_s {
1da177e4
LT
528 char name[4]; /* drive name, such as "hda" */
529 char driver_req[10]; /* requests specific driver */
530
165125e1 531 struct request_queue *queue; /* request queue */
1da177e4 532
535ac5d3 533 bool (*prep_rq)(struct ide_drive_s *, struct request *);
60033520
JA
534
535 struct blk_mq_tag_set tag_set;
536
1da177e4 537 struct request *rq; /* current request */
1da177e4 538 void *driver_data; /* extra driver data */
48fb2688 539 u16 *id; /* identification info */
7662d046 540#ifdef CONFIG_IDE_PROC_FS
1da177e4 541 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 542 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 543#endif
1da177e4
LT
544 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
545
806f80a6
BZ
546 const struct ide_disk_ops *disk_ops;
547
97100fc8
BZ
548 unsigned long dev_flags;
549
1da177e4 550 unsigned long sleep; /* sleep until this time */
1da177e4
LT
551 unsigned long timeout; /* max time to wait for irq */
552
ca1b96e0 553 u8 special_flags; /* special action flags */
1da177e4 554
7f612f27 555 u8 select; /* basic drive/head select reg value */
1da177e4 556 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 557 u8 waiting_for_dma; /* dma currently in progress */
0a9b6f88 558 u8 dma; /* atapi dma flag */
1da177e4 559
1da177e4 560 u8 init_speed; /* transfer rate set at boot */
1da177e4 561 u8 current_speed; /* current transfer rate set */
513daadd 562 u8 desired_speed; /* desired transfer rate set */
d2d4e780 563 u8 pio_mode; /* for ->set_pio_mode _only_ */
54a4ec46
SS
564 u8 dma_mode; /* for ->set_dma_mode _only_ */
565 u8 dn; /* now wide spread use */
1da177e4
LT
566 u8 acoustic; /* acoustic management */
567 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
568 u8 ready_stat; /* min status value for drive ready */
569 u8 mult_count; /* current multiple sector setting */
570 u8 mult_req; /* requested multiple sector setting */
1da177e4 571 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 572 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
573 u8 head; /* "real" number of heads */
574 u8 sect; /* "real" sectors per track */
575 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
576 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
577
baf08f0b
BZ
578 /* delay this long before sending packet command */
579 u8 pc_delay;
580
1da177e4
LT
581 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
582 unsigned int cyl; /* "real" number of cyls */
5bfb151f 583 void *drive_data; /* used by set_pio_mode/dev_select() */
1da177e4
LT
584 unsigned int failures; /* current failure count */
585 unsigned int max_failures; /* maximum allowed failure count */
e957b60d 586 u64 probed_capacity;/* initial/native media capacity */
1da177e4
LT
587 u64 capacity64; /* total number of sectors */
588
589 int lun; /* logical unit */
590 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
591
592 unsigned long debug_mask; /* debugging levels switch */
593
e3a59b4d
HR
594#ifdef CONFIG_BLK_DEV_IDEACPI
595 struct ide_acpi_drive_link *acpidata;
596#endif
1da177e4
LT
597 struct list_head list;
598 struct device gendev;
f36d4024 599 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 600
2b9efba4
BZ
601 /* current packet command */
602 struct ide_atapi_pc *pc;
603
5e2040fd
BZ
604 /* last failed packet command */
605 struct ide_atapi_pc *failed_pc;
606
d7c26ebb 607 /* callback for packet commands */
03a2faae 608 int (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 609
d6251d44
BP
610 ide_startstop_t (*irq_handler)(struct ide_drive_s *);
611
3b8ac539 612 unsigned long atapi_flags;
67c56364
BZ
613
614 struct ide_atapi_pc request_sense_pc;
a1df5169
BP
615
616 /* current sense rq and buffer */
617 bool sense_rq_armed;
9a6d5488 618 bool sense_rq_active;
82ed4db4 619 struct request *sense_rq;
a1df5169 620 struct request_sense sense_data;
60033520
JA
621
622 /* async sense insertion */
623 struct work_struct rq_work;
624 struct list_head rq_list;
d7c26ebb
BP
625};
626
627typedef struct ide_drive_s ide_drive_t;
1da177e4 628
5aeddf90
BP
629#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
630
631#define to_ide_drv(obj, cont_type) \
8fed4368 632 container_of(obj, struct cont_type, dev)
5aeddf90
BP
633
634#define ide_drv_g(disk, cont_type) \
635 container_of((disk)->private_data, struct cont_type, driver)
8604affd 636
039788e1 637struct ide_port_info;
1da177e4 638
374e042c
BZ
639struct ide_tp_ops {
640 void (*exec_command)(struct hwif_s *, u8);
641 u8 (*read_status)(struct hwif_s *);
642 u8 (*read_altstatus)(struct hwif_s *);
ecf3a31d 643 void (*write_devctl)(struct hwif_s *, u8);
374e042c 644
abb596b2 645 void (*dev_select)(ide_drive_t *);
c9ff9e7b 646 void (*tf_load)(ide_drive_t *, struct ide_taskfile *, u8);
3153c26b 647 void (*tf_read)(ide_drive_t *, struct ide_taskfile *, u8);
374e042c 648
adb1af98
BZ
649 void (*input_data)(ide_drive_t *, struct ide_cmd *,
650 void *, unsigned int);
651 void (*output_data)(ide_drive_t *, struct ide_cmd *,
652 void *, unsigned int);
374e042c
BZ
653};
654
655extern const struct ide_tp_ops default_tp_ops;
656
39b986a6
BZ
657/**
658 * struct ide_port_ops - IDE port operations
659 *
660 * @init_dev: host specific initialization of a device
661 * @set_pio_mode: routine to program host for PIO mode
662 * @set_dma_mode: routine to program host for DMA mode
39b986a6
BZ
663 * @reset_poll: chipset polling based on hba specifics
664 * @pre_reset: chipset specific changes to default for device-hba resets
665 * @resetproc: routine to reset controller after a disk reset
666 * @maskproc: special host masking for drive selection
667 * @quirkproc: check host's drive quirk list
bfa7d8e5 668 * @clear_irq: clear IRQ
39b986a6
BZ
669 *
670 * @mdma_filter: filter MDMA modes
671 * @udma_filter: filter UDMA modes
672 *
673 * @cable_detect: detect cable type
674 */
ac95beed 675struct ide_port_ops {
e6d95bd1 676 void (*init_dev)(ide_drive_t *);
e085b3ca 677 void (*set_pio_mode)(struct hwif_s *, ide_drive_t *);
8776168c 678 void (*set_dma_mode)(struct hwif_s *, ide_drive_t *);
2a842aca 679 blk_status_t (*reset_poll)(ide_drive_t *);
ac95beed 680 void (*pre_reset)(ide_drive_t *);
ac95beed 681 void (*resetproc)(ide_drive_t *);
ac95beed 682 void (*maskproc)(ide_drive_t *, int);
ac95beed 683 void (*quirkproc)(ide_drive_t *);
bfa7d8e5 684 void (*clear_irq)(ide_drive_t *);
f4d3ffa5 685 int (*test_irq)(struct hwif_s *);
ac95beed
BZ
686
687 u8 (*mdma_filter)(ide_drive_t *);
688 u8 (*udma_filter)(ide_drive_t *);
689
690 u8 (*cable_detect)(struct hwif_s *);
691};
692
5e37bdc0
BZ
693struct ide_dma_ops {
694 void (*dma_host_set)(struct ide_drive_s *, int);
22981694 695 int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *);
5e37bdc0
BZ
696 void (*dma_start)(struct ide_drive_s *);
697 int (*dma_end)(struct ide_drive_s *);
698 int (*dma_test_irq)(struct ide_drive_s *);
699 void (*dma_lost_irq)(struct ide_drive_s *);
35c9b4da 700 /* below ones are optional */
8a4a5738 701 int (*dma_check)(struct ide_drive_s *, struct ide_cmd *);
22117d6e 702 int (*dma_timer_expiry)(struct ide_drive_s *);
35c9b4da 703 void (*dma_clear)(struct ide_drive_s *);
592b5315
SS
704 /*
705 * The following method is optional and only required to be
706 * implemented for the SFF-8038i compatible controllers.
707 */
708 u8 (*dma_sff_read_status)(struct hwif_s *);
5e37bdc0
BZ
709};
710
5880b5de 711enum {
13990cf8 712 IDE_PFLAG_PROBING = BIT(0),
5880b5de
BZ
713};
714
08da591e
BZ
715struct ide_host;
716
1da177e4 717typedef struct hwif_s {
1da177e4 718 struct hwif_s *mate; /* other hwif from same PCI chip */
1da177e4
LT
719 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
720
08da591e
BZ
721 struct ide_host *host;
722
1da177e4
LT
723 char name[6]; /* name of interface, eg. "ide0" */
724
4c3032d8
BZ
725 struct ide_io_ports io_ports;
726
1da177e4 727 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 728
2bd24a1c 729 ide_drive_t *devices[MAX_DRIVES + 1];
1da177e4 730
5880b5de
BZ
731 unsigned long port_flags;
732
1da177e4
LT
733 u8 major; /* our major number */
734 u8 index; /* 0 for ide0; 1 for ide1; ... */
735 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 736
e95d9c6b 737 u32 host_flags;
6a824c92 738
4099d143
BZ
739 u8 pio_mask;
740
1da177e4
LT
741 u8 ultra_mask;
742 u8 mwdma_mask;
743 u8 swdma_mask;
744
49521f97
BZ
745 u8 cbl; /* cable type */
746
1da177e4
LT
747 hwif_chipset_t chipset; /* sub-module for tuning.. */
748
36501650
BZ
749 struct device *dev;
750
1da177e4
LT
751 void (*rw_disk)(ide_drive_t *, struct request *);
752
374e042c 753 const struct ide_tp_ops *tp_ops;
ac95beed 754 const struct ide_port_ops *port_ops;
f37afdac 755 const struct ide_dma_ops *dma_ops;
bfa14b42 756
1da177e4
LT
757 /* dma physical region descriptor table (cpu view) */
758 unsigned int *dmatable_cpu;
759 /* dma physical region descriptor table (dma view) */
760 dma_addr_t dmatable_dma;
2bbd57ca
BZ
761
762 /* maximum number of PRD table entries */
763 int prd_max_nents;
764 /* PRD entry size in bytes */
765 int prd_ent_size;
766
1da177e4
LT
767 /* Scatter-gather list used to build the above */
768 struct scatterlist *sg_table;
769 int sg_max_nents; /* Maximum number of entries in it */
1da177e4 770
22aa4b32 771 struct ide_cmd cmd; /* current command */
d6ff9f64 772
1da177e4
LT
773 int rqsize; /* max sectors per request */
774 int irq; /* our irq number */
775
1da177e4 776 unsigned long dma_base; /* base addr for dma ports */
1da177e4 777
1da177e4
LT
778 unsigned long config_data; /* for use by chipset-specific code */
779 unsigned long select_data; /* for use by chipset-specific code */
780
020e322d
SS
781 unsigned long extra_base; /* extra addr for dma ports */
782 unsigned extra_ports; /* number of extra dma ports */
783
1da177e4 784 unsigned present : 1; /* this interface exists */
5b31f855 785 unsigned busy : 1; /* serializes devices on a port */
1da177e4 786
f74c9141
BZ
787 struct device gendev;
788 struct device *portdev;
789
f36d4024 790 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
791
792 void *hwif_data; /* extra hwif data */
793
e3a59b4d
HR
794#ifdef CONFIG_BLK_DEV_IDEACPI
795 struct ide_acpi_hwif_link *acpidata;
796#endif
b65fac32
BZ
797
798 /* IRQ handler, if active */
799 ide_startstop_t (*handler)(ide_drive_t *);
800
801 /* BOOL: polling active & poll_timeout field valid */
802 unsigned int polling : 1;
803
804 /* current drive */
805 ide_drive_t *cur_dev;
806
807 /* current request */
808 struct request *rq;
809
810 /* failsafe timer */
811 struct timer_list timer;
812 /* timeout value during long polls */
813 unsigned long poll_timeout;
814 /* queried upon timeouts */
815 int (*expiry)(ide_drive_t *);
816
817 int req_gen;
818 int req_gen_timer;
819
820 spinlock_t lock;
22fc6ecc 821} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 822
a36223b0
BZ
823#define MAX_HOST_PORTS 4
824
48c3c107 825struct ide_host {
2bd24a1c 826 ide_hwif_t *ports[MAX_HOST_PORTS + 1];
48c3c107 827 unsigned int n_ports;
6cdf6eb3 828 struct device *dev[2];
e354c1d8 829
2ed0ef54 830 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
831
832 void (*get_lock)(irq_handler_t, void *);
833 void (*release_lock)(void);
834
849d7130 835 irq_handler_t irq_handler;
e354c1d8 836
ef0b0427 837 unsigned long host_flags;
255115fb
BZ
838
839 int irq_flags;
840
6cdf6eb3 841 void *host_priv;
bd53cbcc 842 ide_hwif_t *cur_port; /* for hosts requiring serialization */
5b31f855
BZ
843
844 /* used for hosts requiring serialization */
e720b9e4 845 volatile unsigned long host_busy;
48c3c107
BZ
846};
847
5b31f855
BZ
848#define IDE_HOST_BUSY 0
849
1da177e4
LT
850/*
851 * internal ide interrupt handler type
852 */
1da177e4
LT
853typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
854typedef int (ide_expiry_t)(ide_drive_t *);
855
0eea6458 856/* used by ide-cd, ide-floppy, etc. */
adb1af98 857typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned);
0eea6458 858
f9383c42 859extern struct mutex ide_setting_mtx;
1da177e4 860
92f1f8fd
EO
861/*
862 * configurable drive settings
863 */
864
13990cf8 865#define DS_SYNC BIT(0)
92f1f8fd
EO
866
867struct ide_devset {
868 int (*get)(ide_drive_t *);
869 int (*set)(ide_drive_t *, int);
870 unsigned int flags;
871};
872
873#define __DEVSET(_flags, _get, _set) { \
874 .flags = _flags, \
875 .get = _get, \
876 .set = _set, \
877}
7662d046 878
8185d5aa 879#define ide_devset_get(name, field) \
92f1f8fd 880static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
881{ \
882 return drive->field; \
883}
884
885#define ide_devset_set(name, field) \
92f1f8fd 886static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
887{ \
888 drive->field = arg; \
889 return 0; \
890}
891
97100fc8
BZ
892#define ide_devset_get_flag(name, flag) \
893static int get_##name(ide_drive_t *drive) \
894{ \
895 return !!(drive->dev_flags & flag); \
896}
897
898#define ide_devset_set_flag(name, flag) \
899static int set_##name(ide_drive_t *drive, int arg) \
900{ \
901 if (arg) \
902 drive->dev_flags |= flag; \
903 else \
904 drive->dev_flags &= ~flag; \
905 return 0; \
906}
907
92f1f8fd
EO
908#define __IDE_DEVSET(_name, _flags, _get, _set) \
909const struct ide_devset ide_devset_##_name = \
910 __DEVSET(_flags, _get, _set)
911
912#define IDE_DEVSET(_name, _flags, _get, _set) \
913static __IDE_DEVSET(_name, _flags, _get, _set)
914
915#define ide_devset_rw(_name, _func) \
916IDE_DEVSET(_name, 0, get_##_func, set_##_func)
917
918#define ide_devset_w(_name, _func) \
919IDE_DEVSET(_name, 0, NULL, set_##_func)
920
f8790489
BZ
921#define ide_ext_devset_rw(_name, _func) \
922__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
923
924#define ide_ext_devset_rw_sync(_name, _func) \
925__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
92f1f8fd
EO
926
927#define ide_decl_devset(_name) \
928extern const struct ide_devset ide_devset_##_name
929
930ide_decl_devset(io_32bit);
931ide_decl_devset(keepsettings);
932ide_decl_devset(pio_mode);
933ide_decl_devset(unmaskirq);
934ide_decl_devset(using_dma);
935
7662d046 936#ifdef CONFIG_IDE_PROC_FS
1da177e4 937/*
92f1f8fd 938 * /proc/ide interface
1da177e4
LT
939 */
940
92f1f8fd
EO
941#define ide_devset_rw_field(_name, _field) \
942ide_devset_get(_name, _field); \
943ide_devset_set(_name, _field); \
944IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
945
2fd3c5c6
DC
946#define ide_devset_ro_field(_name, _field) \
947ide_devset_get(_name, _field); \
948IDE_DEVSET(_name, 0, get_##_name, NULL)
949
97100fc8
BZ
950#define ide_devset_rw_flag(_name, _field) \
951ide_devset_get_flag(_name, _field); \
952ide_devset_set_flag(_name, _field); \
953IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
954
92f1f8fd
EO
955struct ide_proc_devset {
956 const char *name;
957 const struct ide_devset *setting;
958 int min, max;
959 int (*mulf)(ide_drive_t *);
960 int (*divf)(ide_drive_t *);
8185d5aa
BZ
961};
962
92f1f8fd
EO
963#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
964 .name = __stringify(_name), \
965 .setting = &ide_devset_##_name, \
966 .min = _min, \
967 .max = _max, \
968 .mulf = _mulf, \
969 .divf = _divf, \
8185d5aa
BZ
970}
971
92f1f8fd
EO
972#define IDE_PROC_DEVSET(_name, _min, _max) \
973__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 974
1da177e4
LT
975typedef struct {
976 const char *name;
d161a13f 977 umode_t mode;
ec7d9c9c 978 int (*show)(struct seq_file *, void *);
1da177e4
LT
979} ide_proc_entry_t;
980
ecfd80e4
BZ
981void proc_ide_create(void);
982void proc_ide_destroy(void);
5cbf79cd 983void ide_proc_register_port(ide_hwif_t *);
d9270a3f 984void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 985void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 986void ide_proc_unregister_port(ide_hwif_t *);
7f3c868b
BZ
987void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
988void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
7662d046 989
ec7d9c9c
CH
990int ide_capacity_proc_show(struct seq_file *m, void *v);
991int ide_geometry_proc_show(struct seq_file *m, void *v);
1da177e4 992#else
ecfd80e4
BZ
993static inline void proc_ide_create(void) { ; }
994static inline void proc_ide_destroy(void) { ; }
5cbf79cd 995static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 996static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 997static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 998static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7f3c868b
BZ
999static inline void ide_proc_register_driver(ide_drive_t *drive,
1000 struct ide_driver *driver) { ; }
1001static inline void ide_proc_unregister_driver(ide_drive_t *drive,
1002 struct ide_driver *driver) { ; }
1da177e4
LT
1003#endif
1004
e1c7c464
BP
1005enum {
1006 /* enter/exit functions */
13990cf8 1007 IDE_DBG_FUNC = BIT(0),
e1c7c464 1008 /* sense key/asc handling */
13990cf8 1009 IDE_DBG_SENSE = BIT(1),
e1c7c464 1010 /* packet commands handling */
13990cf8 1011 IDE_DBG_PC = BIT(2),
e1c7c464 1012 /* request handling */
13990cf8 1013 IDE_DBG_RQ = BIT(3),
e1c7c464 1014 /* driver probing/setup */
13990cf8 1015 IDE_DBG_PROBE = BIT(4),
e1c7c464
BP
1016};
1017
1018/* DRV_NAME has to be defined in the driver before using the macro below */
088b1b88
BP
1019#define __ide_debug_log(lvl, fmt, args...) \
1020{ \
1021 if (unlikely(drive->debug_mask & lvl)) \
1022 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \
1023 __func__, ## args); \
e1c7c464
BP
1024}
1025
1da177e4 1026/*
0d346ba0 1027 * Power Management state machine (rq->pm->pm_step).
1da177e4 1028 *
0d346ba0 1029 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
1030 * This can return:
1031 * - ide_stopped : In this case, the core calls us back again unless
1032 * step have been set to ide_power_state_completed.
1033 * - ide_started : In this case, the channel is left busy until an
1034 * async event (interrupt) occurs.
0d346ba0 1035 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
1036 * do_rw_taskfile().
1037 *
0d346ba0 1038 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
1039 * with the error code if any. This routine should update the step value
1040 * and return. It should not start a new request. The core will call
0d346ba0
BZ
1041 * ide_start_power_step() for the new step value, unless step have been
1042 * set to IDE_PM_COMPLETED.
1da177e4 1043 */
1da177e4 1044enum {
0d346ba0
BZ
1045 IDE_PM_START_SUSPEND,
1046 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1047 IDE_PM_STANDBY,
1048
1049 IDE_PM_START_RESUME,
1050 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1051 IDE_PM_IDLE,
1052 IDE_PM_RESTORE_DMA,
1053
1054 IDE_PM_COMPLETED,
1da177e4
LT
1055};
1056
e2984c62
BZ
1057int generic_ide_suspend(struct device *, pm_message_t);
1058int generic_ide_resume(struct device *);
1059
1060void ide_complete_power_step(ide_drive_t *, struct request *);
1061ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
3616b653 1062void ide_complete_pm_rq(ide_drive_t *, struct request *);
e2984c62
BZ
1063void ide_check_pm_state(ide_drive_t *, struct request *);
1064
1da177e4
LT
1065/*
1066 * Subdrivers support.
4ef3b8f4
LR
1067 *
1068 * The gendriver.owner field should be set to the module owner of this driver.
1069 * The gendriver.name field should be set to the name of this driver
1da177e4 1070 */
7f3c868b 1071struct ide_driver {
1da177e4 1072 const char *version;
1da177e4 1073 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1da177e4 1074 struct device_driver gen_driver;
4031bbe4
RK
1075 int (*probe)(ide_drive_t *);
1076 void (*remove)(ide_drive_t *);
0d2157f7 1077 void (*resume)(ide_drive_t *);
4031bbe4 1078 void (*shutdown)(ide_drive_t *);
7662d046 1079#ifdef CONFIG_IDE_PROC_FS
79cb3803
BZ
1080 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1081 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
7662d046
BZ
1082#endif
1083};
1da177e4 1084
7f3c868b 1085#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
4031bbe4 1086
08da591e
BZ
1087int ide_device_get(ide_drive_t *);
1088void ide_device_put(ide_drive_t *);
1089
aa768773
BZ
1090struct ide_ioctl_devset {
1091 unsigned int get_ioctl;
1092 unsigned int set_ioctl;
92f1f8fd 1093 const struct ide_devset *setting;
aa768773
BZ
1094};
1095
1096int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1097 unsigned long, const struct ide_ioctl_devset *);
1098
1bddd9e6 1099int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1da177e4 1100
ebae41a5
BZ
1101extern int ide_vlb_clk;
1102extern int ide_pci_clk;
1103
2a842aca 1104int ide_end_rq(ide_drive_t *, struct request *, blk_status_t, unsigned int);
327fa1c2 1105void ide_kill_rq(ide_drive_t *, struct request *);
60033520 1106void ide_insert_request_head(ide_drive_t *, struct request *);
327fa1c2 1107
60c0cd02
BZ
1108void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1109void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1da177e4 1110
35b5d0be
BZ
1111void ide_execute_command(ide_drive_t *, struct ide_cmd *, ide_handler_t *,
1112 unsigned int);
1fc14258 1113
9f87abe8
BZ
1114void ide_pad_transfer(ide_drive_t *, int, int);
1115
9892ec54 1116ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
1da177e4 1117
4dde4492 1118void ide_fix_driveid(u16 *);
01745112 1119
1da177e4
LT
1120extern void ide_fixstring(u8 *, const int, const int);
1121
28ee9bc5 1122int ide_busy_sleep(ide_drive_t *, unsigned long, int);
b163f46d 1123
fa56d4cb 1124int __ide_wait_stat(ide_drive_t *, u8, u8, unsigned long, u8 *);
74af21cf 1125int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1126
c4e66c36 1127ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
11938c92 1128ide_startstop_t ide_do_devset(ide_drive_t *, struct request *);
c4e66c36 1129
1da177e4
LT
1130extern ide_startstop_t ide_do_reset (ide_drive_t *);
1131
92f1f8fd
EO
1132extern int ide_devset_execute(ide_drive_t *drive,
1133 const struct ide_devset *setting, int arg);
1134
22aa4b32 1135void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8);
2a842aca 1136int ide_complete_rq(ide_drive_t *, blk_status_t, unsigned int);
1da177e4 1137
3153c26b 1138void ide_tf_readback(ide_drive_t *drive, struct ide_cmd *cmd);
745483f1 1139void ide_tf_dump(const char *, struct ide_cmd *);
1da177e4 1140
374e042c
BZ
1141void ide_exec_command(ide_hwif_t *, u8);
1142u8 ide_read_status(ide_hwif_t *);
1143u8 ide_read_altstatus(ide_hwif_t *);
ecf3a31d 1144void ide_write_devctl(ide_hwif_t *, u8);
374e042c 1145
abb596b2 1146void ide_dev_select(ide_drive_t *);
c9ff9e7b 1147void ide_tf_load(ide_drive_t *, struct ide_taskfile *, u8);
3153c26b 1148void ide_tf_read(ide_drive_t *, struct ide_taskfile *, u8);
374e042c 1149
adb1af98
BZ
1150void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1151void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
374e042c 1152
ed4af48f 1153void SELECT_MASK(ide_drive_t *, int);
1da177e4 1154
92eb4380 1155u8 ide_read_error(ide_drive_t *);
1823649b 1156void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1157
103f7033
BP
1158int ide_check_ireason(ide_drive_t *, struct request *, int, int, int);
1159
51509eec
BZ
1160int ide_check_atapi_device(ide_drive_t *, const char *);
1161
7bf7420a
BZ
1162void ide_init_pc(struct ide_atapi_pc *);
1163
4abdc6ee
EO
1164/* Disk head parking */
1165extern wait_queue_head_t ide_park_wq;
1166ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1167 char *buf);
1168ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1169 const char *buf, size_t len);
1170
7645c151
BZ
1171/*
1172 * Special requests for ide-tape block device strategy routine.
1173 *
1174 * In order to service a character device command, we add special requests to
1175 * the tail of our block device request queue and wait for their completion.
1176 */
1177enum {
13990cf8
AS
1178 REQ_IDETAPE_PC1 = BIT(0), /* packet command (first stage) */
1179 REQ_IDETAPE_PC2 = BIT(1), /* packet command (second stage) */
1180 REQ_IDETAPE_READ = BIT(2),
1181 REQ_IDETAPE_WRITE = BIT(3),
7645c151
BZ
1182};
1183
5a0e43b5 1184int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *,
b13345f3 1185 void *, unsigned int);
7645c151 1186
de699ad5 1187int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1188int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1189int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b 1190void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
6b544fcc 1191void ide_retry_pc(ide_drive_t *drive);
0578042d 1192
a1df5169 1193void ide_prep_sense(ide_drive_t *drive, struct request *rq);
5c4be572 1194int ide_queue_sense_rq(ide_drive_t *drive, void *special);
a1df5169 1195
4cad085e 1196int ide_cd_expiry(ide_drive_t *);
844b9468 1197
392de1d5
BP
1198int ide_cd_get_xferlen(struct request *);
1199
b788ee9c 1200ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_cmd *);
594c16d8 1201
22aa4b32 1202ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *);
1da177e4 1203
a08915ba
BZ
1204void ide_pio_bytes(ide_drive_t *, struct ide_cmd *, unsigned int, unsigned int);
1205
adb1af98 1206void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8);
4d7a984b 1207
22aa4b32
BZ
1208int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16);
1209int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *);
9a3c49be 1210
22aa4b32 1211int ide_taskfile_ioctl(ide_drive_t *, unsigned long);
1da177e4 1212
fa56d4cb 1213int ide_dev_read_id(ide_drive_t *, u8, u16 *, int);
2ebe1d9e 1214
1da177e4 1215extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1216extern int ide_config_drive_speed(ide_drive_t *, u8);
1217extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1218extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1219
1220extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1221
1da177e4
LT
1222extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1223
10738ba8 1224extern void ide_timer_expiry(struct timer_list *t);
7d12e780 1225extern irqreturn_t ide_intr(int irq, void *dev_id);
60033520 1226extern blk_status_t ide_queue_rq(struct blk_mq_hw_ctx *, const struct blk_mq_queue_data *);
9a6d5488 1227extern blk_status_t ide_issue_rq(ide_drive_t *, struct request *, bool);
6072f749 1228extern void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq);
1da177e4
LT
1229
1230void ide_init_disk(struct gendisk *, ide_drive_t *);
1231
6d208b39 1232#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1233extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1234#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1235#else
1236#define ide_pci_register_driver(d) pci_register_driver(d)
1237#endif
1238
6636487e
BZ
1239static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1240{
1241 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1242 return 1;
1243 return 0;
1244}
1245
86ccf37c 1246void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *,
9f36d314 1247 struct ide_hw *, struct ide_hw **);
85620436 1248void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1249
8e882ba1 1250#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1251int ide_pci_set_master(struct pci_dev *, const char *);
1252unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1253int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1254int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1255#else
b123f56e
BZ
1256static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1257 const struct ide_port_info *d)
1258{
1259 return -EINVAL;
1260}
c413b9b9
BZ
1261#endif
1262
c0ae5023 1263struct ide_pci_enablebit {
1da177e4
LT
1264 u8 reg; /* byte pci reg holding the enable-bit */
1265 u8 mask; /* mask to isolate the enable-bit */
1266 u8 val; /* value of masked reg when "enabled" */
c0ae5023 1267};
1da177e4
LT
1268
1269enum {
1270 /* Uses ISA control ports not PCI ones. */
13990cf8 1271 IDE_HFLAG_ISA_PORTS = BIT(0),
6a824c92 1272 /* single port device */
13990cf8 1273 IDE_HFLAG_SINGLE = BIT(1),
6a824c92 1274 /* don't use legacy PIO blacklist */
13990cf8 1275 IDE_HFLAG_PIO_NO_BLACKLIST = BIT(2),
e277f91f 1276 /* set for the second port of QD65xx */
13990cf8 1277 IDE_HFLAG_QD_2ND_PORT = BIT(3),
26bcb879 1278 /* use PIO8/9 for prefetch off/on */
13990cf8 1279 IDE_HFLAG_ABUSE_PREFETCH = BIT(4),
26bcb879 1280 /* use PIO6/7 for fast-devsel off/on */
13990cf8 1281 IDE_HFLAG_ABUSE_FAST_DEVSEL = BIT(5),
26bcb879 1282 /* use 100-102 and 200-202 PIO values to set DMA modes */
13990cf8 1283 IDE_HFLAG_ABUSE_DMA_MODES = BIT(6),
aedea591
BZ
1284 /*
1285 * keep DMA setting when programming PIO mode, may be used only
1286 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1287 */
13990cf8 1288 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = BIT(7),
88b2b32b 1289 /* program host for the transfer mode after programming device */
13990cf8 1290 IDE_HFLAG_POST_SET_MODE = BIT(8),
88b2b32b 1291 /* don't program host/device for the transfer mode ("smart" hosts) */
13990cf8 1292 IDE_HFLAG_NO_SET_MODE = BIT(9),
0ae2e178 1293 /* trust BIOS for programming chipset/device for DMA */
13990cf8 1294 IDE_HFLAG_TRUST_BIOS_FOR_DMA = BIT(10),
cafa027b 1295 /* host is CS5510/CS5520 */
13990cf8 1296 IDE_HFLAG_CS5520 = BIT(11),
33c1002e 1297 /* ATAPI DMA is unsupported */
13990cf8 1298 IDE_HFLAG_NO_ATAPI_DMA = BIT(12),
5e71d9c5 1299 /* set if host is a "non-bootable" controller */
13990cf8 1300 IDE_HFLAG_NON_BOOTABLE = BIT(13),
47b68788 1301 /* host doesn't support DMA */
13990cf8 1302 IDE_HFLAG_NO_DMA = BIT(14),
47b68788 1303 /* check if host is PCI IDE device before allowing DMA */
13990cf8 1304 IDE_HFLAG_NO_AUTODMA = BIT(15),
c5dd43ec 1305 /* host uses MMIO */
13990cf8 1306 IDE_HFLAG_MMIO = BIT(16),
238e4f14 1307 /* no LBA48 */
13990cf8 1308 IDE_HFLAG_NO_LBA48 = BIT(17),
238e4f14 1309 /* no LBA48 DMA */
13990cf8 1310 IDE_HFLAG_NO_LBA48_DMA = BIT(18),
ed67b923 1311 /* data FIFO is cleared by an error */
13990cf8 1312 IDE_HFLAG_ERROR_STOPS_FIFO = BIT(19),
1c51361a 1313 /* serialize ports */
13990cf8 1314 IDE_HFLAG_SERIALIZE = BIT(20),
2787cb8a 1315 /* host is DTC2278 */
13990cf8 1316 IDE_HFLAG_DTC2278 = BIT(21),
c094ea07 1317 /* 4 devices on a single set of I/O ports */
13990cf8 1318 IDE_HFLAG_4DRIVES = BIT(22),
1f66019b 1319 /* host is TRM290 */
13990cf8 1320 IDE_HFLAG_TRM290 = BIT(23),
caea7602 1321 /* use 32-bit I/O ops */
13990cf8 1322 IDE_HFLAG_IO_32BIT = BIT(24),
caea7602 1323 /* unmask IRQs */
13990cf8
AS
1324 IDE_HFLAG_UNMASK_IRQS = BIT(25),
1325 IDE_HFLAG_BROKEN_ALTSTATUS = BIT(26),
1fd18905 1326 /* serialize ports if DMA is possible (for sl82c105) */
13990cf8 1327 IDE_HFLAG_SERIALIZE_DMA = BIT(27),
8ac2b42a 1328 /* force host out of "simplex" mode */
13990cf8 1329 IDE_HFLAG_CLEAR_SIMPLEX = BIT(28),
4166c199 1330 /* DSC overlap is unsupported */
13990cf8 1331 IDE_HFLAG_NO_DSC = BIT(29),
807b90d0 1332 /* never use 32-bit I/O ops */
13990cf8 1333 IDE_HFLAG_NO_IO_32BIT = BIT(30),
807b90d0 1334 /* never unmask IRQs */
13990cf8 1335 IDE_HFLAG_NO_UNMASK_IRQS = BIT(31),
1da177e4
LT
1336};
1337
7cab14a7 1338#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1339# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1340#else
1341# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1342#endif
1343
039788e1 1344struct ide_port_info {
1da177e4 1345 char *name;
e354c1d8 1346
2ed0ef54 1347 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
1348
1349 void (*get_lock)(irq_handler_t, void *);
1350 void (*release_lock)(void);
1351
1da177e4
LT
1352 void (*init_iops)(ide_hwif_t *);
1353 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1354 int (*init_dma)(ide_hwif_t *,
1355 const struct ide_port_info *);
ac95beed 1356
374e042c 1357 const struct ide_tp_ops *tp_ops;
ac95beed 1358 const struct ide_port_ops *port_ops;
f37afdac 1359 const struct ide_dma_ops *dma_ops;
ac95beed 1360
c0ae5023
BZ
1361 struct ide_pci_enablebit enablebits[2];
1362
528a572d 1363 hwif_chipset_t chipset;
6b492496
BZ
1364
1365 u16 max_sectors; /* if < than the default one */
1366
9ffcf364 1367 u32 host_flags;
255115fb
BZ
1368
1369 int irq_flags;
1370
4099d143 1371 u8 pio_mask;
5f8b6c34
BZ
1372 u8 swdma_mask;
1373 u8 mwdma_mask;
18137207 1374 u8 udma_mask;
039788e1 1375};
1da177e4 1376
a7928c15
CH
1377/*
1378 * State information carried for REQ_TYPE_ATA_PM_SUSPEND and REQ_TYPE_ATA_PM_RESUME
1379 * requests.
1380 */
1381struct ide_pm_state {
1382 /* PM state machine step value, currently driver specific */
1383 int pm_step;
1384 /* requested PM state value (S1, S2, S3, S4, ...) */
1385 u32 pm_state;
1386 void* data; /* for driver use */
1387};
1388
1389
6cdf6eb3
BZ
1390int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1391int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1392 const struct ide_port_info *, void *);
ef0b0427 1393void ide_pci_remove(struct pci_dev *);
1da177e4 1394
feb22b7f
BZ
1395#ifdef CONFIG_PM
1396int ide_pci_suspend(struct pci_dev *, pm_message_t);
1397int ide_pci_resume(struct pci_dev *);
1398#else
1399#define ide_pci_suspend NULL
1400#define ide_pci_resume NULL
1401#endif
1402
22981694 1403void ide_map_sg(ide_drive_t *, struct ide_cmd *);
bf717c0a 1404void ide_init_sg_cmd(struct ide_cmd *, unsigned int);
1da177e4
LT
1405
1406#define BAD_DMA_DRIVE 0
1407#define GOOD_DMA_DRIVE 1
1408
65e5f2e3
JC
1409struct drive_list_entry {
1410 const char *id_model;
1411 const char *id_firmware;
1412};
1413
4dde4492 1414int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1415
1416#ifdef CONFIG_BLK_DEV_IDEDMA
2dbe7e91 1417int ide_dma_good_drive(ide_drive_t *);
1da177e4 1418int __ide_dma_bad_drive(ide_drive_t *);
7670df73
BZ
1419
1420u8 ide_find_dma_mode(ide_drive_t *, u8);
1421
1422static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1423{
1424 return ide_find_dma_mode(drive, XFER_UDMA_6);
1425}
1426
4a546e04 1427void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1428void ide_dma_off(ide_drive_t *);
4a546e04 1429void ide_dma_on(ide_drive_t *);
3608b5d7 1430int ide_set_dma(ide_drive_t *);
578cfa0d 1431void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1432ide_startstop_t ide_dma_intr(ide_drive_t *);
1433
2bbd57ca
BZ
1434int ide_allocate_dma_engine(ide_hwif_t *);
1435void ide_release_dma_engine(ide_hwif_t *);
1436
5ae5412d 1437int ide_dma_prepare(ide_drive_t *, struct ide_cmd *);
f094d4d8 1438void ide_dma_unmap_sg(ide_drive_t *, struct ide_cmd *);
062f9f02 1439
8e882ba1 1440#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
2dbe7e91 1441int config_drive_for_dma(ide_drive_t *);
22981694 1442int ide_build_dmatable(ide_drive_t *, struct ide_cmd *);
15ce926a 1443void ide_dma_host_set(ide_drive_t *, int);
22981694 1444int ide_dma_setup(ide_drive_t *, struct ide_cmd *);
1da177e4 1445extern void ide_dma_start(ide_drive_t *);
653bcf52 1446int ide_dma_end(ide_drive_t *);
f37afdac 1447int ide_dma_test_irq(ide_drive_t *);
22117d6e 1448int ide_dma_sff_timer_expiry(ide_drive_t *);
592b5315 1449u8 ide_dma_sff_read_status(ide_hwif_t *);
71fc9fcc 1450extern const struct ide_dma_ops sff_dma_ops;
2dbe7e91
BZ
1451#else
1452static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
8e882ba1 1453#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4 1454
de23ec9c 1455void ide_dma_lost_irq(ide_drive_t *);
65ca5377 1456ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
de23ec9c 1457
1da177e4 1458#else
7670df73 1459static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1460static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1461static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1462static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1463static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1464static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1465static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1466static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
22117d6e 1467static inline ide_startstop_t ide_dma_intr(ide_drive_t *drive) { return ide_stopped; }
65ca5377 1468static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; }
0d1bad21 1469static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
5ae5412d
BZ
1470static inline int ide_dma_prepare(ide_drive_t *drive,
1471 struct ide_cmd *cmd) { return 1; }
f094d4d8
BZ
1472static inline void ide_dma_unmap_sg(ide_drive_t *drive,
1473 struct ide_cmd *cmd) { ; }
2bbd57ca 1474#endif /* CONFIG_BLK_DEV_IDEDMA */
1da177e4 1475
e3a59b4d 1476#ifdef CONFIG_BLK_DEV_IDEACPI
8b803bd1 1477int ide_acpi_init(void);
2bf427b2 1478bool ide_port_acpi(ide_hwif_t *hwif);
e3a59b4d
HR
1479extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1480extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1481extern void ide_acpi_push_timing(ide_hwif_t *hwif);
8b803bd1 1482void ide_acpi_init_port(ide_hwif_t *);
eafd88a3 1483void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1484extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d 1485#else
8b803bd1 1486static inline int ide_acpi_init(void) { return 0; }
2bf427b2 1487static inline bool ide_port_acpi(ide_hwif_t *hwif) { return 0; }
e3a59b4d
HR
1488static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1489static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1490static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
8b803bd1 1491static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; }
eafd88a3 1492static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1493static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1494#endif
1495
8bc1e5aa 1496void ide_check_nien_quirk_list(ide_drive_t *);
f01393e4 1497void ide_undecoded_slave(ide_drive_t *);
1da177e4 1498
9fd91d95 1499void ide_port_apply_params(ide_hwif_t *);
ebdab07d 1500int ide_sysfs_register_port(ide_hwif_t *);
9fd91d95 1501
9f36d314 1502struct ide_host *ide_host_alloc(const struct ide_port_info *, struct ide_hw **,
dca39830 1503 unsigned int);
8a69580e 1504void ide_host_free(struct ide_host *);
48c3c107 1505int ide_host_register(struct ide_host *, const struct ide_port_info *,
9f36d314
BZ
1506 struct ide_hw **);
1507int ide_host_add(const struct ide_port_info *, struct ide_hw **, unsigned int,
6f904d01 1508 struct ide_host **);
48c3c107 1509void ide_host_remove(struct ide_host *);
0bfeee7d 1510int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1511void ide_port_unregister_devices(ide_hwif_t *);
1512void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1513
1514static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1515{
1516 return hwif->hwif_data;
1517}
1518
1519static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1520{
1521 hwif->hwif_data = data;
1522}
1523
745483f1 1524u64 ide_get_lba_addr(struct ide_cmd *, int);
1da177e4
LT
1525u8 ide_dump_status(ide_drive_t *, const char *, u8);
1526
3be53f3f
BZ
1527struct ide_timing {
1528 u8 mode;
1529 u8 setup; /* t1 */
1530 u16 act8b; /* t2 for 8-bit io */
1531 u16 rec8b; /* t2i for 8-bit io */
1532 u16 cyc8b; /* t0 for 8-bit io */
1533 u16 active; /* t2 or tD */
1534 u16 recover; /* t2i or tK */
1535 u16 cycle; /* t0 */
1536 u16 udma; /* t2CYCTYP/2 */
1537};
1538
1539enum {
13990cf8
AS
1540 IDE_TIMING_SETUP = BIT(0),
1541 IDE_TIMING_ACT8B = BIT(1),
1542 IDE_TIMING_REC8B = BIT(2),
1543 IDE_TIMING_CYC8B = BIT(3),
3be53f3f
BZ
1544 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1545 IDE_TIMING_CYC8B,
13990cf8
AS
1546 IDE_TIMING_ACTIVE = BIT(4),
1547 IDE_TIMING_RECOVER = BIT(5),
1548 IDE_TIMING_CYCLE = BIT(6),
1549 IDE_TIMING_UDMA = BIT(7),
3be53f3f
BZ
1550 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1551 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1552 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1553};
1554
f06ab340 1555struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1556u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1557void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1558 struct ide_timing *, unsigned int);
1559int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1560
7eeaaaa5 1561#ifdef CONFIG_IDE_XFER_MODE
9ad54093 1562int ide_scan_pio_blacklist(char *);
7eeaaaa5 1563const char *ide_xfer_verbose(u8);
c9ef59ff 1564int ide_pio_need_iordy(ide_drive_t *, const u8);
88b2b32b
BZ
1565int ide_set_pio_mode(ide_drive_t *, u8);
1566int ide_set_dma_mode(ide_drive_t *, u8);
26bcb879 1567void ide_set_pio(ide_drive_t *, u8);
7eeaaaa5
BZ
1568int ide_set_xfer_rate(ide_drive_t *, u8);
1569#else
1570static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; }
1571static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; }
1572#endif
26bcb879
BZ
1573
1574static inline void ide_set_max_pio(ide_drive_t *drive)
1575{
1576 ide_set_pio(drive, 255);
1577}
1da177e4 1578
ebdab07d
BZ
1579char *ide_media_string(ide_drive_t *);
1580
fb3fed79 1581extern const struct attribute_group *ide_dev_groups[];
1da177e4 1582extern struct bus_type ide_bus_type;
f74c9141 1583extern struct class *ide_port_class;
1da177e4 1584
7b9f25b5
BZ
1585static inline void ide_dump_identify(u8 *id)
1586{
1587 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1588}
1589
86b37860
CL
1590static inline int hwif_to_node(ide_hwif_t *hwif)
1591{
96f80219 1592 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1593}
1594
7e59ea21 1595static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1596{
5e7f3a46 1597 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
1b678347 1598
97100fc8 1599 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1600}
2bd24a1c 1601
5bfb151f
JR
1602static inline void *ide_get_drivedata(ide_drive_t *drive)
1603{
1604 return drive->drive_data;
1605}
1606
1607static inline void ide_set_drivedata(ide_drive_t *drive, void *data)
1608{
1609 drive->drive_data = data;
1610}
1611
2bd24a1c
BZ
1612#define ide_port_for_each_dev(i, dev, port) \
1613 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
1614
7ed5b157
BZ
1615#define ide_port_for_each_present_dev(i, dev, port) \
1616 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \
1617 if ((dev)->dev_flags & IDE_DFLAG_PRESENT)
1618
2bd24a1c
BZ
1619#define ide_host_for_each_port(i, port, host) \
1620 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
1621
b42171ef 1622
1da177e4 1623#endif /* _IDE_H */