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CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
3ceca727 11#include <linux/ata.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
1da177e4 17#include <linux/pci.h>
f36d4024 18#include <linux/completion.h>
feb22b7f 19#include <linux/pm.h>
245e3718 20#include <linux/mutex.h>
a1df5169
BP
21/* for request_sense */
22#include <linux/cdrom.h>
8b48463f
LZ
23#include <asm/byteorder.h>
24#include <asm/io.h>
a1df5169 25
d45b70ab 26#if defined(CONFIG_CRIS) || defined(CONFIG_FRV) || defined(CONFIG_MN10300)
4ee06b7e
BZ
27# define SUPPORT_VLB_SYNC 0
28#else
29# define SUPPORT_VLB_SYNC 1
1da177e4
LT
30#endif
31
1da177e4
LT
32/*
33 * Probably not wise to fiddle with these
34 */
b40d1b88 35#define IDE_DEFAULT_MAX_FAILURES 1
1da177e4
LT
36#define ERROR_MAX 8 /* Max read/write errors per sector */
37#define ERROR_RESET 3 /* Reset controller every 4th retry */
38#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
39
313162d0
PG
40struct device;
41
c152cc1a
BZ
42/* Error codes returned in rq->errors to the higher part of the driver. */
43enum {
44 IDE_DRV_ERROR_GENERAL = 101,
45 IDE_DRV_ERROR_FILEMARK = 102,
46 IDE_DRV_ERROR_EOD = 103,
47};
48
1da177e4
LT
49/*
50 * Definitions for accessing IDE controller registers
51 */
52#define IDE_NR_PORTS (10)
53
4c3032d8
BZ
54struct ide_io_ports {
55 unsigned long data_addr;
56
57 union {
58 unsigned long error_addr; /* read: error */
59 unsigned long feature_addr; /* write: feature */
60 };
61
62 unsigned long nsect_addr;
63 unsigned long lbal_addr;
64 unsigned long lbam_addr;
65 unsigned long lbah_addr;
66
67 unsigned long device_addr;
68
69 union {
70 unsigned long status_addr; /*  read: status  */
71 unsigned long command_addr; /* write: command */
72 };
73
74 unsigned long ctl_addr;
75
76 unsigned long irq_addr;
77};
1da177e4
LT
78
79#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 80
3a7d2484
BZ
81#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
82#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
83#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
84#define DRIVE_READY (ATA_DRDY | ATA_DSC)
85
86#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
87
88#define SATA_NR_PORTS (3) /* 16 possible ?? */
89
90#define SATA_STATUS_OFFSET (0)
1da177e4 91#define SATA_ERROR_OFFSET (1)
1da177e4 92#define SATA_CONTROL_OFFSET (2)
1da177e4 93
1da177e4
LT
94/*
95 * Our Physical Region Descriptor (PRD) table should be large enough
96 * to handle the biggest I/O request we are likely to see. Since requests
97 * can have no more than 256 sectors, and since the typical blocksize is
98 * two or more sectors, we could get by with a limit of 128 entries here for
99 * the usual worst case. Most requests seem to include some contiguous blocks,
100 * further reducing the number of table entries required.
101 *
102 * The driver reverts to PIO mode for individual requests that exceed
103 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
104 * 100% of all crazy scenarios here is not necessary.
105 *
106 * As it turns out though, we must allocate a full 4KB page for this,
107 * so the two PRD tables (ide0 & ide1) will each get half of that,
108 * allowing each to have about 256 entries (8 bytes each) from this.
109 */
110#define PRD_BYTES 8
111#define PRD_ENTRIES 256
112
113/*
114 * Some more useful definitions
115 */
116#define PARTN_BITS 6 /* number of minor dev bits for partitions */
117#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
118#define SECTOR_SIZE 512
151a6701 119
1da177e4
LT
120/*
121 * Timeouts for various operations:
122 */
d6e2955a 123enum {
602da297
DM
124 /* spec allows up to 20ms, but CF cards and SSD drives need more */
125 WAIT_DRQ = 1 * HZ, /* 1s */
d6e2955a
BZ
126 /* some laptops are very slow */
127 WAIT_READY = 5 * HZ, /* 5s */
128 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
129 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
130 /* worst case when spinning up */
131 WAIT_WORSTCASE = 30 * HZ, /* 30s */
132 /* maximum wait for an IRQ to happen */
133 WAIT_CMD = 10 * HZ, /* 10s */
134 /* Some drives require a longer IRQ timeout. */
135 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
136 /*
137 * Some drives (for example, Seagate STT3401A Travan) require a very
138 * long timeout, because they don't return an interrupt or clear their
139 * BSY bit until after the command completes (even retension commands).
140 */
141 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
142 /* minimum sleep time */
143 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
144};
1da177e4 145
79e36a9f
EO
146/*
147 * Op codes for special requests to be handled by ide_special_rq().
148 * Values should be in the range of 0x20 to 0x3f.
149 */
150#define REQ_DRIVE_RESET 0x20
92f1f8fd 151#define REQ_DEVSET_EXEC 0x21
4abdc6ee
EO
152#define REQ_PARK_HEADS 0x22
153#define REQ_UNPARK_HEADS 0x23
79e36a9f 154
1da177e4
LT
155/*
156 * hwif_chipset_t is used to keep track of the specific hardware
157 * chipset used by each IDE interface, if known.
158 */
528a572d 159enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
160 ide_cmd640, ide_dtc2278, ide_ali14xx,
161 ide_qd65xx, ide_umc8672, ide_ht6560b,
b7876a6f 162 ide_4drives, ide_pmac, ide_acorn,
9a0e77f2 163 ide_au1xxx, ide_palm3710
528a572d
BZ
164};
165
166typedef u8 hwif_chipset_t;
1da177e4
LT
167
168/*
169 * Structure to hold all information about the location of this port
170 */
9f36d314 171struct ide_hw {
4c3032d8
BZ
172 union {
173 struct ide_io_ports io_ports;
174 unsigned long io_ports_array[IDE_NR_PORTS];
175 };
176
1da177e4 177 int irq; /* our irq number */
c56c5648 178 struct device *dev, *parent;
d6276b5f 179 unsigned long config;
9f36d314 180};
1da177e4 181
9f36d314 182static inline void ide_std_init_ports(struct ide_hw *hw,
1da177e4
LT
183 unsigned long io_addr,
184 unsigned long ctl_addr)
185{
186 unsigned int i;
187
4c3032d8
BZ
188 for (i = 0; i <= 7; i++)
189 hw->io_ports_array[i] = io_addr++;
1da177e4 190
4c3032d8 191 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
192}
193
c5bfc375 194#define MAX_HWIFS 10
83ae20c8 195
1da177e4
LT
196/*
197 * Now for the data we need to maintain per-drive: ide_drive_t
198 */
199
200#define ide_scsi 0x21
201#define ide_disk 0x20
202#define ide_optical 0x7
203#define ide_cdrom 0x5
204#define ide_tape 0x1
205#define ide_floppy 0x0
206
207/*
208 * Special Driver Flags
1da177e4 209 */
ca1b96e0
BZ
210enum {
211 IDE_SFLAG_SET_GEOMETRY = (1 << 0),
212 IDE_SFLAG_RECALIBRATE = (1 << 1),
213 IDE_SFLAG_SET_MULTMODE = (1 << 2),
214};
1da177e4 215
1da177e4
LT
216/*
217 * Status returned from various ide_ functions
218 */
219typedef enum {
220 ide_stopped, /* no drive operation was started */
221 ide_started, /* a drive operation was started, handler was set */
222} ide_startstop_t;
223
60f85019
SS
224enum {
225 IDE_VALID_ERROR = (1 << 1),
226 IDE_VALID_FEATURE = IDE_VALID_ERROR,
227 IDE_VALID_NSECT = (1 << 2),
228 IDE_VALID_LBAL = (1 << 3),
229 IDE_VALID_LBAM = (1 << 4),
230 IDE_VALID_LBAH = (1 << 5),
231 IDE_VALID_DEVICE = (1 << 6),
232 IDE_VALID_LBA = IDE_VALID_LBAL |
233 IDE_VALID_LBAM |
234 IDE_VALID_LBAH,
235 IDE_VALID_OUT_TF = IDE_VALID_FEATURE |
236 IDE_VALID_NSECT |
237 IDE_VALID_LBA,
238 IDE_VALID_IN_TF = IDE_VALID_NSECT |
239 IDE_VALID_LBA,
240 IDE_VALID_OUT_HOB = IDE_VALID_OUT_TF,
241 IDE_VALID_IN_HOB = IDE_VALID_ERROR |
242 IDE_VALID_NSECT |
243 IDE_VALID_LBA,
244};
245
d6ff9f64
BZ
246enum {
247 IDE_TFLAG_LBA48 = (1 << 0),
60f85019
SS
248 IDE_TFLAG_WRITE = (1 << 1),
249 IDE_TFLAG_CUSTOM_HANDLER = (1 << 2),
250 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 3),
d6ff9f64 251 /* force 16-bit I/O operations */
60f85019 252 IDE_TFLAG_IO_16BIT = (1 << 4),
22aa4b32 253 /* struct ide_cmd was allocated using kmalloc() */
60f85019
SS
254 IDE_TFLAG_DYN = (1 << 5),
255 IDE_TFLAG_FS = (1 << 6),
256 IDE_TFLAG_MULTI_PIO = (1 << 7),
665d66e8 257 IDE_TFLAG_SET_XFER = (1 << 8),
19710d25
BZ
258};
259
260enum {
261 IDE_FTFLAG_FLAGGED = (1 << 0),
262 IDE_FTFLAG_SET_IN_FLAGS = (1 << 1),
263 IDE_FTFLAG_OUT_DATA = (1 << 2),
264 IDE_FTFLAG_IN_DATA = (1 << 3),
d6ff9f64
BZ
265};
266
267struct ide_taskfile {
745483f1
SS
268 u8 data; /* 0: data byte (for TASKFILE ioctl) */
269 union { /* 1: */
270 u8 error; /* read: error */
271 u8 feature; /* write: feature */
d6ff9f64 272 };
745483f1
SS
273 u8 nsect; /* 2: number of sectors */
274 u8 lbal; /* 3: LBA low */
275 u8 lbam; /* 4: LBA mid */
276 u8 lbah; /* 5: LBA high */
277 u8 device; /* 6: device select */
278 union { /* 7: */
279 u8 status; /* read: status */
d6ff9f64
BZ
280 u8 command; /* write: command */
281 };
282};
283
22aa4b32 284struct ide_cmd {
745483f1
SS
285 struct ide_taskfile tf;
286 struct ide_taskfile hob;
60f85019
SS
287 struct {
288 struct {
289 u8 tf;
290 u8 hob;
291 } out, in;
292 } valid;
293
665d66e8 294 u16 tf_flags;
19710d25 295 u8 ftf_flags; /* for TASKFILE ioctl */
0dfb991c 296 int protocol;
b6308ee0
BZ
297
298 int sg_nents; /* number of sg entries */
299 int orig_sg_nents;
300 int sg_dma_direction; /* DMA transfer direction */
301
bf717c0a 302 unsigned int nbytes;
b6308ee0 303 unsigned int nleft;
a08915ba
BZ
304 unsigned int last_xfer_len;
305
b6308ee0
BZ
306 struct scatterlist *cursg;
307 unsigned int cursg_ofs;
308
d6ff9f64 309 struct request *rq; /* copy of request */
22aa4b32 310};
d6ff9f64 311
67c56364
BZ
312/* ATAPI packet command flags */
313enum {
314 /* set when an error is considered normal - no retry (ide-tape) */
315 PC_FLAG_ABORT = (1 << 0),
316 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
317 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
318 PC_FLAG_DMA_OK = (1 << 3),
319 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
320 PC_FLAG_DMA_ERROR = (1 << 5),
321 PC_FLAG_WRITING = (1 << 6),
67c56364
BZ
322};
323
4cad085e 324#define ATAPI_WAIT_PC (60 * HZ)
67c56364
BZ
325
326struct ide_atapi_pc {
327 /* actual packet bytes */
328 u8 c[12];
329 /* incremented on each retry */
330 int retries;
331 int error;
332
333 /* bytes to transfer */
334 int req_xfer;
67c56364
BZ
335
336 /* the corresponding request */
337 struct request *rq;
338
339 unsigned long flags;
340
341 /*
342 * those are more or less driver-specific and some of them are subject
343 * to change/removal later.
344 */
67c56364
BZ
345 unsigned long timeout;
346};
347
8185d5aa 348struct ide_devset;
7f3c868b 349struct ide_driver;
1da177e4 350
e3a59b4d
HR
351#ifdef CONFIG_BLK_DEV_IDEACPI
352struct ide_acpi_drive_link;
353struct ide_acpi_hwif_link;
354#endif
355
806f80a6
BZ
356struct ide_drive_s;
357
358struct ide_disk_ops {
359 int (*check)(struct ide_drive_s *, const char *);
360 int (*get_capacity)(struct ide_drive_s *);
c3e33e04 361 void (*unlock_native_capacity)(struct ide_drive_s *);
806f80a6
BZ
362 void (*setup)(struct ide_drive_s *);
363 void (*flush)(struct ide_drive_s *);
364 int (*init_media)(struct ide_drive_s *, struct gendisk *);
365 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
366 int);
367 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
368 sector_t);
badf8082
AV
369 int (*ioctl)(struct ide_drive_s *, struct block_device *,
370 fmode_t, unsigned int, unsigned long);
806f80a6
BZ
371};
372
3b8ac539
BP
373/* ATAPI device flags */
374enum {
375 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
0578042d
BZ
376
377 /* ide-cd */
3b8ac539 378 /* Drive cannot eject the disc. */
bf64741f 379 IDE_AFLAG_NO_EJECT = (1 << 1),
3b8ac539 380 /* Drive is a pre ATAPI 1.2 drive. */
bf64741f 381 IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
3b8ac539 382 /* TOC addresses are in BCD. */
bf64741f 383 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
3b8ac539 384 /* TOC track numbers are in BCD. */
bf64741f 385 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
3b8ac539 386 /* Saved TOC information is current. */
bf64741f 387 IDE_AFLAG_TOC_VALID = (1 << 6),
3b8ac539 388 /* We think that the drive door is locked. */
bf64741f 389 IDE_AFLAG_DOOR_LOCKED = (1 << 7),
3b8ac539 390 /* SET_CD_SPEED command is unsupported. */
bf64741f
BP
391 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
392 IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
393 IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
394 IDE_AFLAG_SANYO_3CD = (1 << 11),
395 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
396 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
397 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
3b8ac539
BP
398
399 /* ide-floppy */
3b8ac539 400 /* Avoid commands not supported in Clik drive */
bf64741f 401 IDE_AFLAG_CLIK_DRIVE = (1 << 15),
3b8ac539 402 /* Requires BH algorithm for packets */
bf64741f 403 IDE_AFLAG_ZIP_DRIVE = (1 << 16),
49cac39e 404 /* Supports format progress report */
bf64741f 405 IDE_AFLAG_SRFP = (1 << 17),
3b8ac539
BP
406
407 /* ide-tape */
bf64741f 408 IDE_AFLAG_IGNORE_DSC = (1 << 18),
3b8ac539 409 /* 0 When the tape position is unknown */
bf64741f 410 IDE_AFLAG_ADDRESS_VALID = (1 << 19),
3b8ac539 411 /* Device already opened */
bf64741f 412 IDE_AFLAG_BUSY = (1 << 20),
3b8ac539 413 /* Attempt to auto-detect the current user block size */
bf64741f 414 IDE_AFLAG_DETECT_BS = (1 << 21),
3b8ac539 415 /* Currently on a filemark */
bf64741f 416 IDE_AFLAG_FILEMARK = (1 << 22),
3b8ac539 417 /* 0 = no tape is loaded, so we don't rewind after ejecting */
bf64741f 418 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
f20f2586 419
bf64741f 420 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
3b8ac539
BP
421};
422
97100fc8
BZ
423/* device flags */
424enum {
425 /* restore settings after device reset */
426 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
427 /* device is using DMA for read/write */
428 IDE_DFLAG_USING_DMA = (1 << 1),
429 /* okay to unmask other IRQs */
430 IDE_DFLAG_UNMASK = (1 << 2),
431 /* don't attempt flushes */
432 IDE_DFLAG_NOFLUSH = (1 << 3),
433 /* DSC overlap */
434 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
435 /* give potential excess bandwidth */
436 IDE_DFLAG_NICE1 = (1 << 5),
437 /* device is physically present */
438 IDE_DFLAG_PRESENT = (1 << 6),
075affcb
BZ
439 /* disable Host Protected Area */
440 IDE_DFLAG_NOHPA = (1 << 7),
97100fc8
BZ
441 /* id read from device (synthetic if not set) */
442 IDE_DFLAG_ID_READ = (1 << 8),
443 IDE_DFLAG_NOPROBE = (1 << 9),
444 /* need to do check_media_change() */
445 IDE_DFLAG_REMOVABLE = (1 << 10),
446 /* needed for removable devices */
447 IDE_DFLAG_ATTACH = (1 << 11),
448 IDE_DFLAG_FORCED_GEOM = (1 << 12),
449 /* disallow setting unmask bit */
450 IDE_DFLAG_NO_UNMASK = (1 << 13),
451 /* disallow enabling 32-bit I/O */
452 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
453 /* for removable only: door lock/unlock works */
454 IDE_DFLAG_DOORLOCKING = (1 << 15),
455 /* disallow DMA */
456 IDE_DFLAG_NODMA = (1 << 16),
65155b37 457 /* powermanagement told us not to do anything, so sleep nicely */
97100fc8 458 IDE_DFLAG_BLOCKED = (1 << 17),
97100fc8 459 /* sleeping & sleep field valid */
5317464d
BP
460 IDE_DFLAG_SLEEPING = (1 << 18),
461 IDE_DFLAG_POST_RESET = (1 << 19),
462 IDE_DFLAG_UDMA33_WARNED = (1 << 20),
463 IDE_DFLAG_LBA48 = (1 << 21),
97100fc8 464 /* status of write cache */
5317464d 465 IDE_DFLAG_WCACHE = (1 << 22),
97100fc8 466 /* used for ignoring ATA_DF */
5317464d 467 IDE_DFLAG_NOWERR = (1 << 23),
c3922048 468 /* retrying in PIO */
5317464d
BP
469 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
470 IDE_DFLAG_LBA = (1 << 25),
4abdc6ee 471 /* don't unload heads */
5317464d 472 IDE_DFLAG_NO_UNLOAD = (1 << 26),
4abdc6ee 473 /* heads unloaded, please don't reset port */
5317464d
BP
474 IDE_DFLAG_PARKED = (1 << 27),
475 IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
da167876 476 /* write protect */
5317464d
BP
477 IDE_DFLAG_WP = (1 << 29),
478 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
734affdc 479 IDE_DFLAG_NIEN_QUIRK = (1 << 31),
97100fc8
BZ
480};
481
d7c26ebb 482struct ide_drive_s {
1da177e4
LT
483 char name[4]; /* drive name, such as "hda" */
484 char driver_req[10]; /* requests specific driver */
485
165125e1 486 struct request_queue *queue; /* request queue */
1da177e4
LT
487
488 struct request *rq; /* current request */
1da177e4 489 void *driver_data; /* extra driver data */
48fb2688 490 u16 *id; /* identification info */
7662d046 491#ifdef CONFIG_IDE_PROC_FS
1da177e4 492 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 493 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 494#endif
1da177e4
LT
495 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
496
806f80a6
BZ
497 const struct ide_disk_ops *disk_ops;
498
97100fc8
BZ
499 unsigned long dev_flags;
500
1da177e4 501 unsigned long sleep; /* sleep until this time */
1da177e4
LT
502 unsigned long timeout; /* max time to wait for irq */
503
ca1b96e0 504 u8 special_flags; /* special action flags */
1da177e4 505
7f612f27 506 u8 select; /* basic drive/head select reg value */
1da177e4 507 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 508 u8 waiting_for_dma; /* dma currently in progress */
0a9b6f88 509 u8 dma; /* atapi dma flag */
1da177e4 510
1da177e4 511 u8 init_speed; /* transfer rate set at boot */
1da177e4 512 u8 current_speed; /* current transfer rate set */
513daadd 513 u8 desired_speed; /* desired transfer rate set */
d2d4e780 514 u8 pio_mode; /* for ->set_pio_mode _only_ */
54a4ec46
SS
515 u8 dma_mode; /* for ->set_dma_mode _only_ */
516 u8 dn; /* now wide spread use */
1da177e4
LT
517 u8 acoustic; /* acoustic management */
518 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
519 u8 ready_stat; /* min status value for drive ready */
520 u8 mult_count; /* current multiple sector setting */
521 u8 mult_req; /* requested multiple sector setting */
1da177e4 522 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 523 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
524 u8 head; /* "real" number of heads */
525 u8 sect; /* "real" sectors per track */
526 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
527 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
528
baf08f0b
BZ
529 /* delay this long before sending packet command */
530 u8 pc_delay;
531
1da177e4
LT
532 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
533 unsigned int cyl; /* "real" number of cyls */
5bfb151f 534 void *drive_data; /* used by set_pio_mode/dev_select() */
1da177e4
LT
535 unsigned int failures; /* current failure count */
536 unsigned int max_failures; /* maximum allowed failure count */
e957b60d 537 u64 probed_capacity;/* initial/native media capacity */
1da177e4
LT
538 u64 capacity64; /* total number of sectors */
539
540 int lun; /* logical unit */
541 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
542
543 unsigned long debug_mask; /* debugging levels switch */
544
e3a59b4d
HR
545#ifdef CONFIG_BLK_DEV_IDEACPI
546 struct ide_acpi_drive_link *acpidata;
547#endif
1da177e4
LT
548 struct list_head list;
549 struct device gendev;
f36d4024 550 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 551
2b9efba4
BZ
552 /* current packet command */
553 struct ide_atapi_pc *pc;
554
5e2040fd
BZ
555 /* last failed packet command */
556 struct ide_atapi_pc *failed_pc;
557
d7c26ebb 558 /* callback for packet commands */
03a2faae 559 int (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 560
d6251d44
BP
561 ide_startstop_t (*irq_handler)(struct ide_drive_s *);
562
3b8ac539 563 unsigned long atapi_flags;
67c56364
BZ
564
565 struct ide_atapi_pc request_sense_pc;
a1df5169
BP
566
567 /* current sense rq and buffer */
568 bool sense_rq_armed;
569 struct request sense_rq;
570 struct request_sense sense_data;
d7c26ebb
BP
571};
572
573typedef struct ide_drive_s ide_drive_t;
1da177e4 574
5aeddf90
BP
575#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
576
577#define to_ide_drv(obj, cont_type) \
8fed4368 578 container_of(obj, struct cont_type, dev)
5aeddf90
BP
579
580#define ide_drv_g(disk, cont_type) \
581 container_of((disk)->private_data, struct cont_type, driver)
8604affd 582
039788e1 583struct ide_port_info;
1da177e4 584
374e042c
BZ
585struct ide_tp_ops {
586 void (*exec_command)(struct hwif_s *, u8);
587 u8 (*read_status)(struct hwif_s *);
588 u8 (*read_altstatus)(struct hwif_s *);
ecf3a31d 589 void (*write_devctl)(struct hwif_s *, u8);
374e042c 590
abb596b2 591 void (*dev_select)(ide_drive_t *);
c9ff9e7b 592 void (*tf_load)(ide_drive_t *, struct ide_taskfile *, u8);
3153c26b 593 void (*tf_read)(ide_drive_t *, struct ide_taskfile *, u8);
374e042c 594
adb1af98
BZ
595 void (*input_data)(ide_drive_t *, struct ide_cmd *,
596 void *, unsigned int);
597 void (*output_data)(ide_drive_t *, struct ide_cmd *,
598 void *, unsigned int);
374e042c
BZ
599};
600
601extern const struct ide_tp_ops default_tp_ops;
602
39b986a6
BZ
603/**
604 * struct ide_port_ops - IDE port operations
605 *
606 * @init_dev: host specific initialization of a device
607 * @set_pio_mode: routine to program host for PIO mode
608 * @set_dma_mode: routine to program host for DMA mode
39b986a6
BZ
609 * @reset_poll: chipset polling based on hba specifics
610 * @pre_reset: chipset specific changes to default for device-hba resets
611 * @resetproc: routine to reset controller after a disk reset
612 * @maskproc: special host masking for drive selection
613 * @quirkproc: check host's drive quirk list
bfa7d8e5 614 * @clear_irq: clear IRQ
39b986a6
BZ
615 *
616 * @mdma_filter: filter MDMA modes
617 * @udma_filter: filter UDMA modes
618 *
619 * @cable_detect: detect cable type
620 */
ac95beed 621struct ide_port_ops {
e6d95bd1 622 void (*init_dev)(ide_drive_t *);
e085b3ca 623 void (*set_pio_mode)(struct hwif_s *, ide_drive_t *);
8776168c 624 void (*set_dma_mode)(struct hwif_s *, ide_drive_t *);
ac95beed 625 int (*reset_poll)(ide_drive_t *);
ac95beed 626 void (*pre_reset)(ide_drive_t *);
ac95beed 627 void (*resetproc)(ide_drive_t *);
ac95beed 628 void (*maskproc)(ide_drive_t *, int);
ac95beed 629 void (*quirkproc)(ide_drive_t *);
bfa7d8e5 630 void (*clear_irq)(ide_drive_t *);
f4d3ffa5 631 int (*test_irq)(struct hwif_s *);
ac95beed
BZ
632
633 u8 (*mdma_filter)(ide_drive_t *);
634 u8 (*udma_filter)(ide_drive_t *);
635
636 u8 (*cable_detect)(struct hwif_s *);
637};
638
5e37bdc0
BZ
639struct ide_dma_ops {
640 void (*dma_host_set)(struct ide_drive_s *, int);
22981694 641 int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *);
5e37bdc0
BZ
642 void (*dma_start)(struct ide_drive_s *);
643 int (*dma_end)(struct ide_drive_s *);
644 int (*dma_test_irq)(struct ide_drive_s *);
645 void (*dma_lost_irq)(struct ide_drive_s *);
35c9b4da 646 /* below ones are optional */
8a4a5738 647 int (*dma_check)(struct ide_drive_s *, struct ide_cmd *);
22117d6e 648 int (*dma_timer_expiry)(struct ide_drive_s *);
35c9b4da 649 void (*dma_clear)(struct ide_drive_s *);
592b5315
SS
650 /*
651 * The following method is optional and only required to be
652 * implemented for the SFF-8038i compatible controllers.
653 */
654 u8 (*dma_sff_read_status)(struct hwif_s *);
5e37bdc0
BZ
655};
656
5880b5de
BZ
657enum {
658 IDE_PFLAG_PROBING = (1 << 0),
659};
660
08da591e
BZ
661struct ide_host;
662
1da177e4 663typedef struct hwif_s {
1da177e4 664 struct hwif_s *mate; /* other hwif from same PCI chip */
1da177e4
LT
665 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
666
08da591e
BZ
667 struct ide_host *host;
668
1da177e4
LT
669 char name[6]; /* name of interface, eg. "ide0" */
670
4c3032d8
BZ
671 struct ide_io_ports io_ports;
672
1da177e4 673 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 674
2bd24a1c 675 ide_drive_t *devices[MAX_DRIVES + 1];
1da177e4 676
5880b5de
BZ
677 unsigned long port_flags;
678
1da177e4
LT
679 u8 major; /* our major number */
680 u8 index; /* 0 for ide0; 1 for ide1; ... */
681 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 682
e95d9c6b 683 u32 host_flags;
6a824c92 684
4099d143
BZ
685 u8 pio_mask;
686
1da177e4
LT
687 u8 ultra_mask;
688 u8 mwdma_mask;
689 u8 swdma_mask;
690
49521f97
BZ
691 u8 cbl; /* cable type */
692
1da177e4
LT
693 hwif_chipset_t chipset; /* sub-module for tuning.. */
694
36501650
BZ
695 struct device *dev;
696
1da177e4
LT
697 void (*rw_disk)(ide_drive_t *, struct request *);
698
374e042c 699 const struct ide_tp_ops *tp_ops;
ac95beed 700 const struct ide_port_ops *port_ops;
f37afdac 701 const struct ide_dma_ops *dma_ops;
bfa14b42 702
1da177e4
LT
703 /* dma physical region descriptor table (cpu view) */
704 unsigned int *dmatable_cpu;
705 /* dma physical region descriptor table (dma view) */
706 dma_addr_t dmatable_dma;
2bbd57ca
BZ
707
708 /* maximum number of PRD table entries */
709 int prd_max_nents;
710 /* PRD entry size in bytes */
711 int prd_ent_size;
712
1da177e4
LT
713 /* Scatter-gather list used to build the above */
714 struct scatterlist *sg_table;
715 int sg_max_nents; /* Maximum number of entries in it */
1da177e4 716
22aa4b32 717 struct ide_cmd cmd; /* current command */
d6ff9f64 718
1da177e4
LT
719 int rqsize; /* max sectors per request */
720 int irq; /* our irq number */
721
1da177e4 722 unsigned long dma_base; /* base addr for dma ports */
1da177e4 723
1da177e4
LT
724 unsigned long config_data; /* for use by chipset-specific code */
725 unsigned long select_data; /* for use by chipset-specific code */
726
020e322d
SS
727 unsigned long extra_base; /* extra addr for dma ports */
728 unsigned extra_ports; /* number of extra dma ports */
729
1da177e4 730 unsigned present : 1; /* this interface exists */
5b31f855 731 unsigned busy : 1; /* serializes devices on a port */
1da177e4 732
f74c9141
BZ
733 struct device gendev;
734 struct device *portdev;
735
f36d4024 736 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
737
738 void *hwif_data; /* extra hwif data */
739
e3a59b4d
HR
740#ifdef CONFIG_BLK_DEV_IDEACPI
741 struct ide_acpi_hwif_link *acpidata;
742#endif
b65fac32
BZ
743
744 /* IRQ handler, if active */
745 ide_startstop_t (*handler)(ide_drive_t *);
746
747 /* BOOL: polling active & poll_timeout field valid */
748 unsigned int polling : 1;
749
750 /* current drive */
751 ide_drive_t *cur_dev;
752
753 /* current request */
754 struct request *rq;
755
756 /* failsafe timer */
757 struct timer_list timer;
758 /* timeout value during long polls */
759 unsigned long poll_timeout;
760 /* queried upon timeouts */
761 int (*expiry)(ide_drive_t *);
762
763 int req_gen;
764 int req_gen_timer;
765
766 spinlock_t lock;
22fc6ecc 767} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 768
a36223b0
BZ
769#define MAX_HOST_PORTS 4
770
48c3c107 771struct ide_host {
2bd24a1c 772 ide_hwif_t *ports[MAX_HOST_PORTS + 1];
48c3c107 773 unsigned int n_ports;
6cdf6eb3 774 struct device *dev[2];
e354c1d8 775
2ed0ef54 776 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
777
778 void (*get_lock)(irq_handler_t, void *);
779 void (*release_lock)(void);
780
849d7130 781 irq_handler_t irq_handler;
e354c1d8 782
ef0b0427 783 unsigned long host_flags;
255115fb
BZ
784
785 int irq_flags;
786
6cdf6eb3 787 void *host_priv;
bd53cbcc 788 ide_hwif_t *cur_port; /* for hosts requiring serialization */
5b31f855
BZ
789
790 /* used for hosts requiring serialization */
e720b9e4 791 volatile unsigned long host_busy;
48c3c107
BZ
792};
793
5b31f855
BZ
794#define IDE_HOST_BUSY 0
795
1da177e4
LT
796/*
797 * internal ide interrupt handler type
798 */
1da177e4
LT
799typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
800typedef int (ide_expiry_t)(ide_drive_t *);
801
0eea6458 802/* used by ide-cd, ide-floppy, etc. */
adb1af98 803typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned);
0eea6458 804
f9383c42 805extern struct mutex ide_setting_mtx;
1da177e4 806
92f1f8fd
EO
807/*
808 * configurable drive settings
809 */
810
811#define DS_SYNC (1 << 0)
812
813struct ide_devset {
814 int (*get)(ide_drive_t *);
815 int (*set)(ide_drive_t *, int);
816 unsigned int flags;
817};
818
819#define __DEVSET(_flags, _get, _set) { \
820 .flags = _flags, \
821 .get = _get, \
822 .set = _set, \
823}
7662d046 824
8185d5aa 825#define ide_devset_get(name, field) \
92f1f8fd 826static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
827{ \
828 return drive->field; \
829}
830
831#define ide_devset_set(name, field) \
92f1f8fd 832static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
833{ \
834 drive->field = arg; \
835 return 0; \
836}
837
97100fc8
BZ
838#define ide_devset_get_flag(name, flag) \
839static int get_##name(ide_drive_t *drive) \
840{ \
841 return !!(drive->dev_flags & flag); \
842}
843
844#define ide_devset_set_flag(name, flag) \
845static int set_##name(ide_drive_t *drive, int arg) \
846{ \
847 if (arg) \
848 drive->dev_flags |= flag; \
849 else \
850 drive->dev_flags &= ~flag; \
851 return 0; \
852}
853
92f1f8fd
EO
854#define __IDE_DEVSET(_name, _flags, _get, _set) \
855const struct ide_devset ide_devset_##_name = \
856 __DEVSET(_flags, _get, _set)
857
858#define IDE_DEVSET(_name, _flags, _get, _set) \
859static __IDE_DEVSET(_name, _flags, _get, _set)
860
861#define ide_devset_rw(_name, _func) \
862IDE_DEVSET(_name, 0, get_##_func, set_##_func)
863
864#define ide_devset_w(_name, _func) \
865IDE_DEVSET(_name, 0, NULL, set_##_func)
866
f8790489
BZ
867#define ide_ext_devset_rw(_name, _func) \
868__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
869
870#define ide_ext_devset_rw_sync(_name, _func) \
871__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
92f1f8fd
EO
872
873#define ide_decl_devset(_name) \
874extern const struct ide_devset ide_devset_##_name
875
876ide_decl_devset(io_32bit);
877ide_decl_devset(keepsettings);
878ide_decl_devset(pio_mode);
879ide_decl_devset(unmaskirq);
880ide_decl_devset(using_dma);
881
7662d046 882#ifdef CONFIG_IDE_PROC_FS
1da177e4 883/*
92f1f8fd 884 * /proc/ide interface
1da177e4
LT
885 */
886
92f1f8fd
EO
887#define ide_devset_rw_field(_name, _field) \
888ide_devset_get(_name, _field); \
889ide_devset_set(_name, _field); \
890IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
891
97100fc8
BZ
892#define ide_devset_rw_flag(_name, _field) \
893ide_devset_get_flag(_name, _field); \
894ide_devset_set_flag(_name, _field); \
895IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
896
92f1f8fd
EO
897struct ide_proc_devset {
898 const char *name;
899 const struct ide_devset *setting;
900 int min, max;
901 int (*mulf)(ide_drive_t *);
902 int (*divf)(ide_drive_t *);
8185d5aa
BZ
903};
904
92f1f8fd
EO
905#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
906 .name = __stringify(_name), \
907 .setting = &ide_devset_##_name, \
908 .min = _min, \
909 .max = _max, \
910 .mulf = _mulf, \
911 .divf = _divf, \
8185d5aa
BZ
912}
913
92f1f8fd
EO
914#define IDE_PROC_DEVSET(_name, _min, _max) \
915__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 916
1da177e4
LT
917typedef struct {
918 const char *name;
d161a13f 919 umode_t mode;
6d703a81 920 const struct file_operations *proc_fops;
1da177e4
LT
921} ide_proc_entry_t;
922
ecfd80e4
BZ
923void proc_ide_create(void);
924void proc_ide_destroy(void);
5cbf79cd 925void ide_proc_register_port(ide_hwif_t *);
d9270a3f 926void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 927void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 928void ide_proc_unregister_port(ide_hwif_t *);
7f3c868b
BZ
929void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
930void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
7662d046 931
6d703a81
AD
932extern const struct file_operations ide_capacity_proc_fops;
933extern const struct file_operations ide_geometry_proc_fops;
1da177e4 934#else
ecfd80e4
BZ
935static inline void proc_ide_create(void) { ; }
936static inline void proc_ide_destroy(void) { ; }
5cbf79cd 937static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 938static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 939static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 940static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7f3c868b
BZ
941static inline void ide_proc_register_driver(ide_drive_t *drive,
942 struct ide_driver *driver) { ; }
943static inline void ide_proc_unregister_driver(ide_drive_t *drive,
944 struct ide_driver *driver) { ; }
1da177e4
LT
945#endif
946
e1c7c464
BP
947enum {
948 /* enter/exit functions */
949 IDE_DBG_FUNC = (1 << 0),
950 /* sense key/asc handling */
951 IDE_DBG_SENSE = (1 << 1),
952 /* packet commands handling */
953 IDE_DBG_PC = (1 << 2),
954 /* request handling */
955 IDE_DBG_RQ = (1 << 3),
956 /* driver probing/setup */
957 IDE_DBG_PROBE = (1 << 4),
958};
959
960/* DRV_NAME has to be defined in the driver before using the macro below */
088b1b88
BP
961#define __ide_debug_log(lvl, fmt, args...) \
962{ \
963 if (unlikely(drive->debug_mask & lvl)) \
964 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \
965 __func__, ## args); \
e1c7c464
BP
966}
967
1da177e4 968/*
0d346ba0 969 * Power Management state machine (rq->pm->pm_step).
1da177e4 970 *
0d346ba0 971 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
972 * This can return:
973 * - ide_stopped : In this case, the core calls us back again unless
974 * step have been set to ide_power_state_completed.
975 * - ide_started : In this case, the channel is left busy until an
976 * async event (interrupt) occurs.
0d346ba0 977 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
978 * do_rw_taskfile().
979 *
0d346ba0 980 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
981 * with the error code if any. This routine should update the step value
982 * and return. It should not start a new request. The core will call
0d346ba0
BZ
983 * ide_start_power_step() for the new step value, unless step have been
984 * set to IDE_PM_COMPLETED.
1da177e4 985 */
1da177e4 986enum {
0d346ba0
BZ
987 IDE_PM_START_SUSPEND,
988 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
989 IDE_PM_STANDBY,
990
991 IDE_PM_START_RESUME,
992 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
993 IDE_PM_IDLE,
994 IDE_PM_RESTORE_DMA,
995
996 IDE_PM_COMPLETED,
1da177e4
LT
997};
998
e2984c62
BZ
999int generic_ide_suspend(struct device *, pm_message_t);
1000int generic_ide_resume(struct device *);
1001
1002void ide_complete_power_step(ide_drive_t *, struct request *);
1003ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
3616b653 1004void ide_complete_pm_rq(ide_drive_t *, struct request *);
e2984c62
BZ
1005void ide_check_pm_state(ide_drive_t *, struct request *);
1006
1da177e4
LT
1007/*
1008 * Subdrivers support.
4ef3b8f4
LR
1009 *
1010 * The gendriver.owner field should be set to the module owner of this driver.
1011 * The gendriver.name field should be set to the name of this driver
1da177e4 1012 */
7f3c868b 1013struct ide_driver {
1da177e4 1014 const char *version;
1da177e4 1015 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1da177e4 1016 struct device_driver gen_driver;
4031bbe4
RK
1017 int (*probe)(ide_drive_t *);
1018 void (*remove)(ide_drive_t *);
0d2157f7 1019 void (*resume)(ide_drive_t *);
4031bbe4 1020 void (*shutdown)(ide_drive_t *);
7662d046 1021#ifdef CONFIG_IDE_PROC_FS
79cb3803
BZ
1022 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1023 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
7662d046
BZ
1024#endif
1025};
1da177e4 1026
7f3c868b 1027#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
4031bbe4 1028
08da591e
BZ
1029int ide_device_get(ide_drive_t *);
1030void ide_device_put(ide_drive_t *);
1031
aa768773
BZ
1032struct ide_ioctl_devset {
1033 unsigned int get_ioctl;
1034 unsigned int set_ioctl;
92f1f8fd 1035 const struct ide_devset *setting;
aa768773
BZ
1036};
1037
1038int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1039 unsigned long, const struct ide_ioctl_devset *);
1040
1bddd9e6 1041int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1da177e4 1042
ebae41a5
BZ
1043extern int ide_vlb_clk;
1044extern int ide_pci_clk;
1045
1caf236d 1046int ide_end_rq(ide_drive_t *, struct request *, int, unsigned int);
327fa1c2
BZ
1047void ide_kill_rq(ide_drive_t *, struct request *);
1048
60c0cd02
BZ
1049void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1050void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1da177e4 1051
35b5d0be
BZ
1052void ide_execute_command(ide_drive_t *, struct ide_cmd *, ide_handler_t *,
1053 unsigned int);
1fc14258 1054
9f87abe8
BZ
1055void ide_pad_transfer(ide_drive_t *, int, int);
1056
9892ec54 1057ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
1da177e4 1058
4dde4492 1059void ide_fix_driveid(u16 *);
01745112 1060
1da177e4
LT
1061extern void ide_fixstring(u8 *, const int, const int);
1062
28ee9bc5 1063int ide_busy_sleep(ide_drive_t *, unsigned long, int);
b163f46d 1064
fa56d4cb 1065int __ide_wait_stat(ide_drive_t *, u8, u8, unsigned long, u8 *);
74af21cf 1066int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1067
c4e66c36 1068ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
11938c92 1069ide_startstop_t ide_do_devset(ide_drive_t *, struct request *);
c4e66c36 1070
1da177e4
LT
1071extern ide_startstop_t ide_do_reset (ide_drive_t *);
1072
92f1f8fd
EO
1073extern int ide_devset_execute(ide_drive_t *drive,
1074 const struct ide_devset *setting, int arg);
1075
22aa4b32 1076void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8);
f974b196 1077int ide_complete_rq(ide_drive_t *, int, unsigned int);
1da177e4 1078
3153c26b 1079void ide_tf_readback(ide_drive_t *drive, struct ide_cmd *cmd);
745483f1 1080void ide_tf_dump(const char *, struct ide_cmd *);
1da177e4 1081
374e042c
BZ
1082void ide_exec_command(ide_hwif_t *, u8);
1083u8 ide_read_status(ide_hwif_t *);
1084u8 ide_read_altstatus(ide_hwif_t *);
ecf3a31d 1085void ide_write_devctl(ide_hwif_t *, u8);
374e042c 1086
abb596b2 1087void ide_dev_select(ide_drive_t *);
c9ff9e7b 1088void ide_tf_load(ide_drive_t *, struct ide_taskfile *, u8);
3153c26b 1089void ide_tf_read(ide_drive_t *, struct ide_taskfile *, u8);
374e042c 1090
adb1af98
BZ
1091void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1092void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
374e042c 1093
ed4af48f 1094void SELECT_MASK(ide_drive_t *, int);
1da177e4 1095
92eb4380 1096u8 ide_read_error(ide_drive_t *);
1823649b 1097void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1098
103f7033
BP
1099int ide_check_ireason(ide_drive_t *, struct request *, int, int, int);
1100
51509eec
BZ
1101int ide_check_atapi_device(ide_drive_t *, const char *);
1102
7bf7420a
BZ
1103void ide_init_pc(struct ide_atapi_pc *);
1104
4abdc6ee
EO
1105/* Disk head parking */
1106extern wait_queue_head_t ide_park_wq;
1107ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1108 char *buf);
1109ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1110 const char *buf, size_t len);
1111
7645c151
BZ
1112/*
1113 * Special requests for ide-tape block device strategy routine.
1114 *
1115 * In order to service a character device command, we add special requests to
1116 * the tail of our block device request queue and wait for their completion.
1117 */
1118enum {
1119 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1120 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1121 REQ_IDETAPE_READ = (1 << 2),
1122 REQ_IDETAPE_WRITE = (1 << 3),
1123};
1124
5a0e43b5 1125int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *,
b13345f3 1126 void *, unsigned int);
7645c151 1127
de699ad5 1128int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1129int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1130int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b 1131void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
6b544fcc 1132void ide_retry_pc(ide_drive_t *drive);
0578042d 1133
a1df5169 1134void ide_prep_sense(ide_drive_t *drive, struct request *rq);
5c4be572 1135int ide_queue_sense_rq(ide_drive_t *drive, void *special);
a1df5169 1136
4cad085e 1137int ide_cd_expiry(ide_drive_t *);
844b9468 1138
392de1d5
BP
1139int ide_cd_get_xferlen(struct request *);
1140
b788ee9c 1141ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_cmd *);
594c16d8 1142
22aa4b32 1143ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *);
1da177e4 1144
a08915ba
BZ
1145void ide_pio_bytes(ide_drive_t *, struct ide_cmd *, unsigned int, unsigned int);
1146
adb1af98 1147void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8);
4d7a984b 1148
22aa4b32
BZ
1149int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16);
1150int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *);
9a3c49be 1151
22aa4b32 1152int ide_taskfile_ioctl(ide_drive_t *, unsigned long);
1da177e4 1153
fa56d4cb 1154int ide_dev_read_id(ide_drive_t *, u8, u16 *, int);
2ebe1d9e 1155
1da177e4 1156extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1157extern int ide_config_drive_speed(ide_drive_t *, u8);
1158extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1159extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1160
1161extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1162
1da177e4
LT
1163extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1164
1da177e4 1165extern void ide_timer_expiry(unsigned long);
7d12e780 1166extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1167extern void do_ide_request(struct request_queue *);
6072f749 1168extern void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq);
1da177e4
LT
1169
1170void ide_init_disk(struct gendisk *, ide_drive_t *);
1171
6d208b39 1172#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1173extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1174#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1175#else
1176#define ide_pci_register_driver(d) pci_register_driver(d)
1177#endif
1178
6636487e
BZ
1179static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1180{
1181 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1182 return 1;
1183 return 0;
1184}
1185
86ccf37c 1186void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *,
9f36d314 1187 struct ide_hw *, struct ide_hw **);
85620436 1188void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1189
8e882ba1 1190#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1191int ide_pci_set_master(struct pci_dev *, const char *);
1192unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1193int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1194int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1195#else
b123f56e
BZ
1196static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1197 const struct ide_port_info *d)
1198{
1199 return -EINVAL;
1200}
c413b9b9
BZ
1201#endif
1202
c0ae5023 1203struct ide_pci_enablebit {
1da177e4
LT
1204 u8 reg; /* byte pci reg holding the enable-bit */
1205 u8 mask; /* mask to isolate the enable-bit */
1206 u8 val; /* value of masked reg when "enabled" */
c0ae5023 1207};
1da177e4
LT
1208
1209enum {
1210 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1211 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1212 /* single port device */
a5d8c5c8 1213 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1214 /* don't use legacy PIO blacklist */
1215 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1216 /* set for the second port of QD65xx */
1217 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1218 /* use PIO8/9 for prefetch off/on */
1219 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1220 /* use PIO6/7 for fast-devsel off/on */
1221 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1222 /* use 100-102 and 200-202 PIO values to set DMA modes */
1223 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1224 /*
1225 * keep DMA setting when programming PIO mode, may be used only
1226 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1227 */
1228 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1229 /* program host for the transfer mode after programming device */
1230 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1231 /* don't program host/device for the transfer mode ("smart" hosts) */
1232 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1233 /* trust BIOS for programming chipset/device for DMA */
1234 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1235 /* host is CS5510/CS5520 */
1236 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1237 /* ATAPI DMA is unsupported */
1238 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1239 /* set if host is a "non-bootable" controller */
1240 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1241 /* host doesn't support DMA */
1242 IDE_HFLAG_NO_DMA = (1 << 14),
1243 /* check if host is PCI IDE device before allowing DMA */
1244 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1245 /* host uses MMIO */
1246 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1247 /* no LBA48 */
1248 IDE_HFLAG_NO_LBA48 = (1 << 17),
1249 /* no LBA48 DMA */
1250 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1251 /* data FIFO is cleared by an error */
1252 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1253 /* serialize ports */
1254 IDE_HFLAG_SERIALIZE = (1 << 20),
2787cb8a
BZ
1255 /* host is DTC2278 */
1256 IDE_HFLAG_DTC2278 = (1 << 21),
c094ea07
BZ
1257 /* 4 devices on a single set of I/O ports */
1258 IDE_HFLAG_4DRIVES = (1 << 22),
1f66019b
BZ
1259 /* host is TRM290 */
1260 IDE_HFLAG_TRM290 = (1 << 23),
caea7602
BZ
1261 /* use 32-bit I/O ops */
1262 IDE_HFLAG_IO_32BIT = (1 << 24),
1263 /* unmask IRQs */
1264 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
6636487e 1265 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
1fd18905
BZ
1266 /* serialize ports if DMA is possible (for sl82c105) */
1267 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1268 /* force host out of "simplex" mode */
1269 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1270 /* DSC overlap is unsupported */
1271 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1272 /* never use 32-bit I/O ops */
1273 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1274 /* never unmask IRQs */
1275 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1276};
1277
7cab14a7 1278#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1279# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1280#else
1281# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1282#endif
1283
039788e1 1284struct ide_port_info {
1da177e4 1285 char *name;
e354c1d8 1286
2ed0ef54 1287 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
1288
1289 void (*get_lock)(irq_handler_t, void *);
1290 void (*release_lock)(void);
1291
1da177e4
LT
1292 void (*init_iops)(ide_hwif_t *);
1293 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1294 int (*init_dma)(ide_hwif_t *,
1295 const struct ide_port_info *);
ac95beed 1296
374e042c 1297 const struct ide_tp_ops *tp_ops;
ac95beed 1298 const struct ide_port_ops *port_ops;
f37afdac 1299 const struct ide_dma_ops *dma_ops;
ac95beed 1300
c0ae5023
BZ
1301 struct ide_pci_enablebit enablebits[2];
1302
528a572d 1303 hwif_chipset_t chipset;
6b492496
BZ
1304
1305 u16 max_sectors; /* if < than the default one */
1306
9ffcf364 1307 u32 host_flags;
255115fb
BZ
1308
1309 int irq_flags;
1310
4099d143 1311 u8 pio_mask;
5f8b6c34
BZ
1312 u8 swdma_mask;
1313 u8 mwdma_mask;
18137207 1314 u8 udma_mask;
039788e1 1315};
1da177e4 1316
6cdf6eb3
BZ
1317int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1318int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1319 const struct ide_port_info *, void *);
ef0b0427 1320void ide_pci_remove(struct pci_dev *);
1da177e4 1321
feb22b7f
BZ
1322#ifdef CONFIG_PM
1323int ide_pci_suspend(struct pci_dev *, pm_message_t);
1324int ide_pci_resume(struct pci_dev *);
1325#else
1326#define ide_pci_suspend NULL
1327#define ide_pci_resume NULL
1328#endif
1329
22981694 1330void ide_map_sg(ide_drive_t *, struct ide_cmd *);
bf717c0a 1331void ide_init_sg_cmd(struct ide_cmd *, unsigned int);
1da177e4
LT
1332
1333#define BAD_DMA_DRIVE 0
1334#define GOOD_DMA_DRIVE 1
1335
65e5f2e3
JC
1336struct drive_list_entry {
1337 const char *id_model;
1338 const char *id_firmware;
1339};
1340
4dde4492 1341int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1342
1343#ifdef CONFIG_BLK_DEV_IDEDMA
2dbe7e91 1344int ide_dma_good_drive(ide_drive_t *);
1da177e4 1345int __ide_dma_bad_drive(ide_drive_t *);
7670df73
BZ
1346
1347u8 ide_find_dma_mode(ide_drive_t *, u8);
1348
1349static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1350{
1351 return ide_find_dma_mode(drive, XFER_UDMA_6);
1352}
1353
4a546e04 1354void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1355void ide_dma_off(ide_drive_t *);
4a546e04 1356void ide_dma_on(ide_drive_t *);
3608b5d7 1357int ide_set_dma(ide_drive_t *);
578cfa0d 1358void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1359ide_startstop_t ide_dma_intr(ide_drive_t *);
1360
2bbd57ca
BZ
1361int ide_allocate_dma_engine(ide_hwif_t *);
1362void ide_release_dma_engine(ide_hwif_t *);
1363
5ae5412d 1364int ide_dma_prepare(ide_drive_t *, struct ide_cmd *);
f094d4d8 1365void ide_dma_unmap_sg(ide_drive_t *, struct ide_cmd *);
062f9f02 1366
8e882ba1 1367#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
2dbe7e91 1368int config_drive_for_dma(ide_drive_t *);
22981694 1369int ide_build_dmatable(ide_drive_t *, struct ide_cmd *);
15ce926a 1370void ide_dma_host_set(ide_drive_t *, int);
22981694 1371int ide_dma_setup(ide_drive_t *, struct ide_cmd *);
1da177e4 1372extern void ide_dma_start(ide_drive_t *);
653bcf52 1373int ide_dma_end(ide_drive_t *);
f37afdac 1374int ide_dma_test_irq(ide_drive_t *);
22117d6e 1375int ide_dma_sff_timer_expiry(ide_drive_t *);
592b5315 1376u8 ide_dma_sff_read_status(ide_hwif_t *);
71fc9fcc 1377extern const struct ide_dma_ops sff_dma_ops;
2dbe7e91
BZ
1378#else
1379static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
8e882ba1 1380#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4 1381
de23ec9c 1382void ide_dma_lost_irq(ide_drive_t *);
65ca5377 1383ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
de23ec9c 1384
1da177e4 1385#else
7670df73 1386static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1387static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1388static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1389static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1390static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1391static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1392static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1393static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
22117d6e 1394static inline ide_startstop_t ide_dma_intr(ide_drive_t *drive) { return ide_stopped; }
65ca5377 1395static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; }
0d1bad21 1396static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
5ae5412d
BZ
1397static inline int ide_dma_prepare(ide_drive_t *drive,
1398 struct ide_cmd *cmd) { return 1; }
f094d4d8
BZ
1399static inline void ide_dma_unmap_sg(ide_drive_t *drive,
1400 struct ide_cmd *cmd) { ; }
2bbd57ca 1401#endif /* CONFIG_BLK_DEV_IDEDMA */
1da177e4 1402
e3a59b4d 1403#ifdef CONFIG_BLK_DEV_IDEACPI
8b803bd1 1404int ide_acpi_init(void);
2bf427b2 1405bool ide_port_acpi(ide_hwif_t *hwif);
e3a59b4d
HR
1406extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1407extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1408extern void ide_acpi_push_timing(ide_hwif_t *hwif);
8b803bd1 1409void ide_acpi_init_port(ide_hwif_t *);
eafd88a3 1410void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1411extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d 1412#else
8b803bd1 1413static inline int ide_acpi_init(void) { return 0; }
2bf427b2 1414static inline bool ide_port_acpi(ide_hwif_t *hwif) { return 0; }
e3a59b4d
HR
1415static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1416static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1417static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
8b803bd1 1418static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; }
eafd88a3 1419static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1420static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1421#endif
1422
1da177e4
LT
1423void ide_register_region(struct gendisk *);
1424void ide_unregister_region(struct gendisk *);
1425
8bc1e5aa 1426void ide_check_nien_quirk_list(ide_drive_t *);
f01393e4 1427void ide_undecoded_slave(ide_drive_t *);
1da177e4 1428
9fd91d95 1429void ide_port_apply_params(ide_hwif_t *);
ebdab07d 1430int ide_sysfs_register_port(ide_hwif_t *);
9fd91d95 1431
9f36d314 1432struct ide_host *ide_host_alloc(const struct ide_port_info *, struct ide_hw **,
dca39830 1433 unsigned int);
8a69580e 1434void ide_host_free(struct ide_host *);
48c3c107 1435int ide_host_register(struct ide_host *, const struct ide_port_info *,
9f36d314
BZ
1436 struct ide_hw **);
1437int ide_host_add(const struct ide_port_info *, struct ide_hw **, unsigned int,
6f904d01 1438 struct ide_host **);
48c3c107 1439void ide_host_remove(struct ide_host *);
0bfeee7d 1440int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1441void ide_port_unregister_devices(ide_hwif_t *);
1442void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1443
1444static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1445{
1446 return hwif->hwif_data;
1447}
1448
1449static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1450{
1451 hwif->hwif_data = data;
1452}
1453
1da177e4 1454extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1da177e4 1455
745483f1 1456u64 ide_get_lba_addr(struct ide_cmd *, int);
1da177e4
LT
1457u8 ide_dump_status(ide_drive_t *, const char *, u8);
1458
3be53f3f
BZ
1459struct ide_timing {
1460 u8 mode;
1461 u8 setup; /* t1 */
1462 u16 act8b; /* t2 for 8-bit io */
1463 u16 rec8b; /* t2i for 8-bit io */
1464 u16 cyc8b; /* t0 for 8-bit io */
1465 u16 active; /* t2 or tD */
1466 u16 recover; /* t2i or tK */
1467 u16 cycle; /* t0 */
1468 u16 udma; /* t2CYCTYP/2 */
1469};
1470
1471enum {
1472 IDE_TIMING_SETUP = (1 << 0),
1473 IDE_TIMING_ACT8B = (1 << 1),
1474 IDE_TIMING_REC8B = (1 << 2),
1475 IDE_TIMING_CYC8B = (1 << 3),
1476 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1477 IDE_TIMING_CYC8B,
1478 IDE_TIMING_ACTIVE = (1 << 4),
1479 IDE_TIMING_RECOVER = (1 << 5),
1480 IDE_TIMING_CYCLE = (1 << 6),
1481 IDE_TIMING_UDMA = (1 << 7),
1482 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1483 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1484 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1485};
1486
f06ab340 1487struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1488u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1489void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1490 struct ide_timing *, unsigned int);
1491int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1492
7eeaaaa5 1493#ifdef CONFIG_IDE_XFER_MODE
9ad54093 1494int ide_scan_pio_blacklist(char *);
7eeaaaa5 1495const char *ide_xfer_verbose(u8);
c9ef59ff 1496int ide_pio_need_iordy(ide_drive_t *, const u8);
88b2b32b
BZ
1497int ide_set_pio_mode(ide_drive_t *, u8);
1498int ide_set_dma_mode(ide_drive_t *, u8);
26bcb879 1499void ide_set_pio(ide_drive_t *, u8);
7eeaaaa5
BZ
1500int ide_set_xfer_rate(ide_drive_t *, u8);
1501#else
1502static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; }
1503static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; }
1504#endif
26bcb879
BZ
1505
1506static inline void ide_set_max_pio(ide_drive_t *drive)
1507{
1508 ide_set_pio(drive, 255);
1509}
1da177e4 1510
ebdab07d
BZ
1511char *ide_media_string(ide_drive_t *);
1512
fb3fed79 1513extern const struct attribute_group *ide_dev_groups[];
1da177e4 1514extern struct bus_type ide_bus_type;
f74c9141 1515extern struct class *ide_port_class;
1da177e4 1516
7b9f25b5
BZ
1517static inline void ide_dump_identify(u8 *id)
1518{
1519 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1520}
1521
86b37860
CL
1522static inline int hwif_to_node(ide_hwif_t *hwif)
1523{
96f80219 1524 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1525}
1526
7e59ea21 1527static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1528{
5e7f3a46 1529 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
1b678347 1530
97100fc8 1531 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1532}
2bd24a1c 1533
5bfb151f
JR
1534static inline void *ide_get_drivedata(ide_drive_t *drive)
1535{
1536 return drive->drive_data;
1537}
1538
1539static inline void ide_set_drivedata(ide_drive_t *drive, void *data)
1540{
1541 drive->drive_data = data;
1542}
1543
2bd24a1c
BZ
1544#define ide_port_for_each_dev(i, dev, port) \
1545 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
1546
7ed5b157
BZ
1547#define ide_port_for_each_present_dev(i, dev, port) \
1548 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \
1549 if ((dev)->dev_flags & IDE_DFLAG_PRESENT)
1550
2bd24a1c
BZ
1551#define ide_host_for_each_port(i, port, host) \
1552 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
1553
1da177e4 1554#endif /* _IDE_H */