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1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
3ceca727 11#include <linux/ata.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
1da177e4 17#include <linux/pci.h>
f36d4024 18#include <linux/completion.h>
feb22b7f 19#include <linux/pm.h>
245e3718 20#include <linux/mutex.h>
a1df5169
BP
21/* for request_sense */
22#include <linux/cdrom.h>
82ed4db4 23#include <scsi/scsi_cmnd.h>
8b48463f
LZ
24#include <asm/byteorder.h>
25#include <asm/io.h>
a1df5169 26
d45b70ab 27#if defined(CONFIG_CRIS) || defined(CONFIG_FRV) || defined(CONFIG_MN10300)
4ee06b7e
BZ
28# define SUPPORT_VLB_SYNC 0
29#else
30# define SUPPORT_VLB_SYNC 1
1da177e4
LT
31#endif
32
1da177e4
LT
33/*
34 * Probably not wise to fiddle with these
35 */
b40d1b88 36#define IDE_DEFAULT_MAX_FAILURES 1
1da177e4
LT
37#define ERROR_MAX 8 /* Max read/write errors per sector */
38#define ERROR_RESET 3 /* Reset controller every 4th retry */
39#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
40
313162d0
PG
41struct device;
42
2f5a8e80
CH
43/* values for ide_request.type */
44enum ata_priv_type {
45 ATA_PRIV_MISC,
46 ATA_PRIV_TASKFILE,
47 ATA_PRIV_PC,
48 ATA_PRIV_SENSE, /* sense request */
49 ATA_PRIV_PM_SUSPEND, /* suspend request */
50 ATA_PRIV_PM_RESUME, /* resume request */
b42171ef
CH
51};
52
82ed4db4
CH
53struct ide_request {
54 struct scsi_request sreq;
55 u8 sense[SCSI_SENSE_BUFFERSIZE];
2f5a8e80 56 u8 type;
82ed4db4
CH
57};
58
2f5a8e80
CH
59static inline struct ide_request *ide_req(struct request *rq)
60{
61 return blk_mq_rq_to_pdu(rq);
62}
63
64static inline bool ata_misc_request(struct request *rq)
65{
aebf526b 66 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_MISC;
2f5a8e80
CH
67}
68
69static inline bool ata_taskfile_request(struct request *rq)
70{
aebf526b 71 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_TASKFILE;
2f5a8e80
CH
72}
73
74static inline bool ata_pc_request(struct request *rq)
75{
aebf526b 76 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_PC;
2f5a8e80
CH
77}
78
79static inline bool ata_sense_request(struct request *rq)
80{
aebf526b 81 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_SENSE;
2f5a8e80
CH
82}
83
84static inline bool ata_pm_request(struct request *rq)
85{
aebf526b 86 return blk_rq_is_private(rq) &&
2f5a8e80
CH
87 (ide_req(rq)->type == ATA_PRIV_PM_SUSPEND ||
88 ide_req(rq)->type == ATA_PRIV_PM_RESUME);
89}
90
17d5363b 91/* Error codes returned in result to the higher part of the driver. */
c152cc1a
BZ
92enum {
93 IDE_DRV_ERROR_GENERAL = 101,
94 IDE_DRV_ERROR_FILEMARK = 102,
95 IDE_DRV_ERROR_EOD = 103,
96};
97
1da177e4
LT
98/*
99 * Definitions for accessing IDE controller registers
100 */
101#define IDE_NR_PORTS (10)
102
4c3032d8
BZ
103struct ide_io_ports {
104 unsigned long data_addr;
105
106 union {
107 unsigned long error_addr; /* read: error */
108 unsigned long feature_addr; /* write: feature */
109 };
110
111 unsigned long nsect_addr;
112 unsigned long lbal_addr;
113 unsigned long lbam_addr;
114 unsigned long lbah_addr;
115
116 unsigned long device_addr;
117
118 union {
119 unsigned long status_addr; /*  read: status  */
120 unsigned long command_addr; /* write: command */
121 };
122
123 unsigned long ctl_addr;
124
125 unsigned long irq_addr;
126};
1da177e4
LT
127
128#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 129
3a7d2484
BZ
130#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
131#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
132#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
133#define DRIVE_READY (ATA_DRDY | ATA_DSC)
134
135#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
136
137#define SATA_NR_PORTS (3) /* 16 possible ?? */
138
139#define SATA_STATUS_OFFSET (0)
1da177e4 140#define SATA_ERROR_OFFSET (1)
1da177e4 141#define SATA_CONTROL_OFFSET (2)
1da177e4 142
1da177e4
LT
143/*
144 * Our Physical Region Descriptor (PRD) table should be large enough
145 * to handle the biggest I/O request we are likely to see. Since requests
146 * can have no more than 256 sectors, and since the typical blocksize is
147 * two or more sectors, we could get by with a limit of 128 entries here for
148 * the usual worst case. Most requests seem to include some contiguous blocks,
149 * further reducing the number of table entries required.
150 *
151 * The driver reverts to PIO mode for individual requests that exceed
152 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
153 * 100% of all crazy scenarios here is not necessary.
154 *
155 * As it turns out though, we must allocate a full 4KB page for this,
156 * so the two PRD tables (ide0 & ide1) will each get half of that,
157 * allowing each to have about 256 entries (8 bytes each) from this.
158 */
159#define PRD_BYTES 8
160#define PRD_ENTRIES 256
161
162/*
163 * Some more useful definitions
164 */
165#define PARTN_BITS 6 /* number of minor dev bits for partitions */
166#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
167#define SECTOR_SIZE 512
151a6701 168
1da177e4
LT
169/*
170 * Timeouts for various operations:
171 */
d6e2955a 172enum {
602da297
DM
173 /* spec allows up to 20ms, but CF cards and SSD drives need more */
174 WAIT_DRQ = 1 * HZ, /* 1s */
d6e2955a
BZ
175 /* some laptops are very slow */
176 WAIT_READY = 5 * HZ, /* 5s */
177 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
178 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
179 /* worst case when spinning up */
180 WAIT_WORSTCASE = 30 * HZ, /* 30s */
181 /* maximum wait for an IRQ to happen */
182 WAIT_CMD = 10 * HZ, /* 10s */
183 /* Some drives require a longer IRQ timeout. */
184 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
185 /*
186 * Some drives (for example, Seagate STT3401A Travan) require a very
187 * long timeout, because they don't return an interrupt or clear their
188 * BSY bit until after the command completes (even retension commands).
189 */
190 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
191 /* minimum sleep time */
192 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
193};
1da177e4 194
79e36a9f
EO
195/*
196 * Op codes for special requests to be handled by ide_special_rq().
197 * Values should be in the range of 0x20 to 0x3f.
198 */
199#define REQ_DRIVE_RESET 0x20
92f1f8fd 200#define REQ_DEVSET_EXEC 0x21
4abdc6ee
EO
201#define REQ_PARK_HEADS 0x22
202#define REQ_UNPARK_HEADS 0x23
79e36a9f 203
1da177e4
LT
204/*
205 * hwif_chipset_t is used to keep track of the specific hardware
206 * chipset used by each IDE interface, if known.
207 */
528a572d 208enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
209 ide_cmd640, ide_dtc2278, ide_ali14xx,
210 ide_qd65xx, ide_umc8672, ide_ht6560b,
b7876a6f 211 ide_4drives, ide_pmac, ide_acorn,
9a0e77f2 212 ide_au1xxx, ide_palm3710
528a572d
BZ
213};
214
215typedef u8 hwif_chipset_t;
1da177e4
LT
216
217/*
218 * Structure to hold all information about the location of this port
219 */
9f36d314 220struct ide_hw {
4c3032d8
BZ
221 union {
222 struct ide_io_ports io_ports;
223 unsigned long io_ports_array[IDE_NR_PORTS];
224 };
225
1da177e4 226 int irq; /* our irq number */
c56c5648 227 struct device *dev, *parent;
d6276b5f 228 unsigned long config;
9f36d314 229};
1da177e4 230
9f36d314 231static inline void ide_std_init_ports(struct ide_hw *hw,
1da177e4
LT
232 unsigned long io_addr,
233 unsigned long ctl_addr)
234{
235 unsigned int i;
236
4c3032d8
BZ
237 for (i = 0; i <= 7; i++)
238 hw->io_ports_array[i] = io_addr++;
1da177e4 239
4c3032d8 240 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
241}
242
c5bfc375 243#define MAX_HWIFS 10
83ae20c8 244
1da177e4
LT
245/*
246 * Now for the data we need to maintain per-drive: ide_drive_t
247 */
248
249#define ide_scsi 0x21
250#define ide_disk 0x20
251#define ide_optical 0x7
252#define ide_cdrom 0x5
253#define ide_tape 0x1
254#define ide_floppy 0x0
255
256/*
257 * Special Driver Flags
1da177e4 258 */
ca1b96e0
BZ
259enum {
260 IDE_SFLAG_SET_GEOMETRY = (1 << 0),
261 IDE_SFLAG_RECALIBRATE = (1 << 1),
262 IDE_SFLAG_SET_MULTMODE = (1 << 2),
263};
1da177e4 264
1da177e4
LT
265/*
266 * Status returned from various ide_ functions
267 */
268typedef enum {
269 ide_stopped, /* no drive operation was started */
270 ide_started, /* a drive operation was started, handler was set */
271} ide_startstop_t;
272
60f85019
SS
273enum {
274 IDE_VALID_ERROR = (1 << 1),
275 IDE_VALID_FEATURE = IDE_VALID_ERROR,
276 IDE_VALID_NSECT = (1 << 2),
277 IDE_VALID_LBAL = (1 << 3),
278 IDE_VALID_LBAM = (1 << 4),
279 IDE_VALID_LBAH = (1 << 5),
280 IDE_VALID_DEVICE = (1 << 6),
281 IDE_VALID_LBA = IDE_VALID_LBAL |
282 IDE_VALID_LBAM |
283 IDE_VALID_LBAH,
284 IDE_VALID_OUT_TF = IDE_VALID_FEATURE |
285 IDE_VALID_NSECT |
286 IDE_VALID_LBA,
287 IDE_VALID_IN_TF = IDE_VALID_NSECT |
288 IDE_VALID_LBA,
289 IDE_VALID_OUT_HOB = IDE_VALID_OUT_TF,
290 IDE_VALID_IN_HOB = IDE_VALID_ERROR |
291 IDE_VALID_NSECT |
292 IDE_VALID_LBA,
293};
294
d6ff9f64
BZ
295enum {
296 IDE_TFLAG_LBA48 = (1 << 0),
60f85019
SS
297 IDE_TFLAG_WRITE = (1 << 1),
298 IDE_TFLAG_CUSTOM_HANDLER = (1 << 2),
299 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 3),
d6ff9f64 300 /* force 16-bit I/O operations */
60f85019 301 IDE_TFLAG_IO_16BIT = (1 << 4),
22aa4b32 302 /* struct ide_cmd was allocated using kmalloc() */
60f85019
SS
303 IDE_TFLAG_DYN = (1 << 5),
304 IDE_TFLAG_FS = (1 << 6),
305 IDE_TFLAG_MULTI_PIO = (1 << 7),
665d66e8 306 IDE_TFLAG_SET_XFER = (1 << 8),
19710d25
BZ
307};
308
309enum {
310 IDE_FTFLAG_FLAGGED = (1 << 0),
311 IDE_FTFLAG_SET_IN_FLAGS = (1 << 1),
312 IDE_FTFLAG_OUT_DATA = (1 << 2),
313 IDE_FTFLAG_IN_DATA = (1 << 3),
d6ff9f64
BZ
314};
315
316struct ide_taskfile {
745483f1
SS
317 u8 data; /* 0: data byte (for TASKFILE ioctl) */
318 union { /* 1: */
319 u8 error; /* read: error */
320 u8 feature; /* write: feature */
d6ff9f64 321 };
745483f1
SS
322 u8 nsect; /* 2: number of sectors */
323 u8 lbal; /* 3: LBA low */
324 u8 lbam; /* 4: LBA mid */
325 u8 lbah; /* 5: LBA high */
326 u8 device; /* 6: device select */
327 union { /* 7: */
328 u8 status; /* read: status */
d6ff9f64
BZ
329 u8 command; /* write: command */
330 };
331};
332
22aa4b32 333struct ide_cmd {
745483f1
SS
334 struct ide_taskfile tf;
335 struct ide_taskfile hob;
60f85019
SS
336 struct {
337 struct {
338 u8 tf;
339 u8 hob;
340 } out, in;
341 } valid;
342
665d66e8 343 u16 tf_flags;
19710d25 344 u8 ftf_flags; /* for TASKFILE ioctl */
0dfb991c 345 int protocol;
b6308ee0
BZ
346
347 int sg_nents; /* number of sg entries */
348 int orig_sg_nents;
349 int sg_dma_direction; /* DMA transfer direction */
350
bf717c0a 351 unsigned int nbytes;
b6308ee0 352 unsigned int nleft;
a08915ba
BZ
353 unsigned int last_xfer_len;
354
b6308ee0
BZ
355 struct scatterlist *cursg;
356 unsigned int cursg_ofs;
357
d6ff9f64 358 struct request *rq; /* copy of request */
22aa4b32 359};
d6ff9f64 360
67c56364
BZ
361/* ATAPI packet command flags */
362enum {
363 /* set when an error is considered normal - no retry (ide-tape) */
364 PC_FLAG_ABORT = (1 << 0),
365 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
366 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
367 PC_FLAG_DMA_OK = (1 << 3),
368 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
369 PC_FLAG_DMA_ERROR = (1 << 5),
370 PC_FLAG_WRITING = (1 << 6),
67c56364
BZ
371};
372
4cad085e 373#define ATAPI_WAIT_PC (60 * HZ)
67c56364
BZ
374
375struct ide_atapi_pc {
376 /* actual packet bytes */
377 u8 c[12];
378 /* incremented on each retry */
379 int retries;
380 int error;
381
382 /* bytes to transfer */
383 int req_xfer;
67c56364
BZ
384
385 /* the corresponding request */
386 struct request *rq;
387
388 unsigned long flags;
389
390 /*
391 * those are more or less driver-specific and some of them are subject
392 * to change/removal later.
393 */
67c56364
BZ
394 unsigned long timeout;
395};
396
8185d5aa 397struct ide_devset;
7f3c868b 398struct ide_driver;
1da177e4 399
e3a59b4d
HR
400#ifdef CONFIG_BLK_DEV_IDEACPI
401struct ide_acpi_drive_link;
402struct ide_acpi_hwif_link;
403#endif
404
806f80a6
BZ
405struct ide_drive_s;
406
407struct ide_disk_ops {
408 int (*check)(struct ide_drive_s *, const char *);
409 int (*get_capacity)(struct ide_drive_s *);
c3e33e04 410 void (*unlock_native_capacity)(struct ide_drive_s *);
806f80a6
BZ
411 void (*setup)(struct ide_drive_s *);
412 void (*flush)(struct ide_drive_s *);
413 int (*init_media)(struct ide_drive_s *, struct gendisk *);
414 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
415 int);
416 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
417 sector_t);
badf8082
AV
418 int (*ioctl)(struct ide_drive_s *, struct block_device *,
419 fmode_t, unsigned int, unsigned long);
806f80a6
BZ
420};
421
3b8ac539
BP
422/* ATAPI device flags */
423enum {
424 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
0578042d
BZ
425
426 /* ide-cd */
3b8ac539 427 /* Drive cannot eject the disc. */
bf64741f 428 IDE_AFLAG_NO_EJECT = (1 << 1),
3b8ac539 429 /* Drive is a pre ATAPI 1.2 drive. */
bf64741f 430 IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
3b8ac539 431 /* TOC addresses are in BCD. */
bf64741f 432 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
3b8ac539 433 /* TOC track numbers are in BCD. */
bf64741f 434 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
3b8ac539 435 /* Saved TOC information is current. */
bf64741f 436 IDE_AFLAG_TOC_VALID = (1 << 6),
3b8ac539 437 /* We think that the drive door is locked. */
bf64741f 438 IDE_AFLAG_DOOR_LOCKED = (1 << 7),
3b8ac539 439 /* SET_CD_SPEED command is unsupported. */
bf64741f
BP
440 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
441 IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
442 IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
443 IDE_AFLAG_SANYO_3CD = (1 << 11),
444 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
445 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
446 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
3b8ac539
BP
447
448 /* ide-floppy */
3b8ac539 449 /* Avoid commands not supported in Clik drive */
bf64741f 450 IDE_AFLAG_CLIK_DRIVE = (1 << 15),
3b8ac539 451 /* Requires BH algorithm for packets */
bf64741f 452 IDE_AFLAG_ZIP_DRIVE = (1 << 16),
49cac39e 453 /* Supports format progress report */
bf64741f 454 IDE_AFLAG_SRFP = (1 << 17),
3b8ac539
BP
455
456 /* ide-tape */
bf64741f 457 IDE_AFLAG_IGNORE_DSC = (1 << 18),
3b8ac539 458 /* 0 When the tape position is unknown */
bf64741f 459 IDE_AFLAG_ADDRESS_VALID = (1 << 19),
3b8ac539 460 /* Device already opened */
bf64741f 461 IDE_AFLAG_BUSY = (1 << 20),
3b8ac539 462 /* Attempt to auto-detect the current user block size */
bf64741f 463 IDE_AFLAG_DETECT_BS = (1 << 21),
3b8ac539 464 /* Currently on a filemark */
bf64741f 465 IDE_AFLAG_FILEMARK = (1 << 22),
3b8ac539 466 /* 0 = no tape is loaded, so we don't rewind after ejecting */
bf64741f 467 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
f20f2586 468
bf64741f 469 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
3b8ac539
BP
470};
471
97100fc8
BZ
472/* device flags */
473enum {
474 /* restore settings after device reset */
475 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
476 /* device is using DMA for read/write */
477 IDE_DFLAG_USING_DMA = (1 << 1),
478 /* okay to unmask other IRQs */
479 IDE_DFLAG_UNMASK = (1 << 2),
480 /* don't attempt flushes */
481 IDE_DFLAG_NOFLUSH = (1 << 3),
482 /* DSC overlap */
483 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
484 /* give potential excess bandwidth */
485 IDE_DFLAG_NICE1 = (1 << 5),
486 /* device is physically present */
487 IDE_DFLAG_PRESENT = (1 << 6),
075affcb
BZ
488 /* disable Host Protected Area */
489 IDE_DFLAG_NOHPA = (1 << 7),
97100fc8
BZ
490 /* id read from device (synthetic if not set) */
491 IDE_DFLAG_ID_READ = (1 << 8),
492 IDE_DFLAG_NOPROBE = (1 << 9),
493 /* need to do check_media_change() */
494 IDE_DFLAG_REMOVABLE = (1 << 10),
495 /* needed for removable devices */
496 IDE_DFLAG_ATTACH = (1 << 11),
497 IDE_DFLAG_FORCED_GEOM = (1 << 12),
498 /* disallow setting unmask bit */
499 IDE_DFLAG_NO_UNMASK = (1 << 13),
500 /* disallow enabling 32-bit I/O */
501 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
502 /* for removable only: door lock/unlock works */
503 IDE_DFLAG_DOORLOCKING = (1 << 15),
504 /* disallow DMA */
505 IDE_DFLAG_NODMA = (1 << 16),
65155b37 506 /* powermanagement told us not to do anything, so sleep nicely */
97100fc8 507 IDE_DFLAG_BLOCKED = (1 << 17),
97100fc8 508 /* sleeping & sleep field valid */
5317464d
BP
509 IDE_DFLAG_SLEEPING = (1 << 18),
510 IDE_DFLAG_POST_RESET = (1 << 19),
511 IDE_DFLAG_UDMA33_WARNED = (1 << 20),
512 IDE_DFLAG_LBA48 = (1 << 21),
97100fc8 513 /* status of write cache */
5317464d 514 IDE_DFLAG_WCACHE = (1 << 22),
97100fc8 515 /* used for ignoring ATA_DF */
5317464d 516 IDE_DFLAG_NOWERR = (1 << 23),
c3922048 517 /* retrying in PIO */
5317464d
BP
518 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
519 IDE_DFLAG_LBA = (1 << 25),
4abdc6ee 520 /* don't unload heads */
5317464d 521 IDE_DFLAG_NO_UNLOAD = (1 << 26),
4abdc6ee 522 /* heads unloaded, please don't reset port */
5317464d
BP
523 IDE_DFLAG_PARKED = (1 << 27),
524 IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
da167876 525 /* write protect */
5317464d
BP
526 IDE_DFLAG_WP = (1 << 29),
527 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
734affdc 528 IDE_DFLAG_NIEN_QUIRK = (1 << 31),
97100fc8
BZ
529};
530
d7c26ebb 531struct ide_drive_s {
1da177e4
LT
532 char name[4]; /* drive name, such as "hda" */
533 char driver_req[10]; /* requests specific driver */
534
165125e1 535 struct request_queue *queue; /* request queue */
1da177e4
LT
536
537 struct request *rq; /* current request */
1da177e4 538 void *driver_data; /* extra driver data */
48fb2688 539 u16 *id; /* identification info */
7662d046 540#ifdef CONFIG_IDE_PROC_FS
1da177e4 541 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 542 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 543#endif
1da177e4
LT
544 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
545
806f80a6
BZ
546 const struct ide_disk_ops *disk_ops;
547
97100fc8
BZ
548 unsigned long dev_flags;
549
1da177e4 550 unsigned long sleep; /* sleep until this time */
1da177e4
LT
551 unsigned long timeout; /* max time to wait for irq */
552
ca1b96e0 553 u8 special_flags; /* special action flags */
1da177e4 554
7f612f27 555 u8 select; /* basic drive/head select reg value */
1da177e4 556 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 557 u8 waiting_for_dma; /* dma currently in progress */
0a9b6f88 558 u8 dma; /* atapi dma flag */
1da177e4 559
1da177e4 560 u8 init_speed; /* transfer rate set at boot */
1da177e4 561 u8 current_speed; /* current transfer rate set */
513daadd 562 u8 desired_speed; /* desired transfer rate set */
d2d4e780 563 u8 pio_mode; /* for ->set_pio_mode _only_ */
54a4ec46
SS
564 u8 dma_mode; /* for ->set_dma_mode _only_ */
565 u8 dn; /* now wide spread use */
1da177e4
LT
566 u8 acoustic; /* acoustic management */
567 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
568 u8 ready_stat; /* min status value for drive ready */
569 u8 mult_count; /* current multiple sector setting */
570 u8 mult_req; /* requested multiple sector setting */
1da177e4 571 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 572 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
573 u8 head; /* "real" number of heads */
574 u8 sect; /* "real" sectors per track */
575 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
576 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
577
baf08f0b
BZ
578 /* delay this long before sending packet command */
579 u8 pc_delay;
580
1da177e4
LT
581 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
582 unsigned int cyl; /* "real" number of cyls */
5bfb151f 583 void *drive_data; /* used by set_pio_mode/dev_select() */
1da177e4
LT
584 unsigned int failures; /* current failure count */
585 unsigned int max_failures; /* maximum allowed failure count */
e957b60d 586 u64 probed_capacity;/* initial/native media capacity */
1da177e4
LT
587 u64 capacity64; /* total number of sectors */
588
589 int lun; /* logical unit */
590 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
591
592 unsigned long debug_mask; /* debugging levels switch */
593
e3a59b4d
HR
594#ifdef CONFIG_BLK_DEV_IDEACPI
595 struct ide_acpi_drive_link *acpidata;
596#endif
1da177e4
LT
597 struct list_head list;
598 struct device gendev;
f36d4024 599 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 600
2b9efba4
BZ
601 /* current packet command */
602 struct ide_atapi_pc *pc;
603
5e2040fd
BZ
604 /* last failed packet command */
605 struct ide_atapi_pc *failed_pc;
606
d7c26ebb 607 /* callback for packet commands */
03a2faae 608 int (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 609
d6251d44
BP
610 ide_startstop_t (*irq_handler)(struct ide_drive_s *);
611
3b8ac539 612 unsigned long atapi_flags;
67c56364
BZ
613
614 struct ide_atapi_pc request_sense_pc;
a1df5169
BP
615
616 /* current sense rq and buffer */
617 bool sense_rq_armed;
82ed4db4 618 struct request *sense_rq;
a1df5169 619 struct request_sense sense_data;
d7c26ebb
BP
620};
621
622typedef struct ide_drive_s ide_drive_t;
1da177e4 623
5aeddf90
BP
624#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
625
626#define to_ide_drv(obj, cont_type) \
8fed4368 627 container_of(obj, struct cont_type, dev)
5aeddf90
BP
628
629#define ide_drv_g(disk, cont_type) \
630 container_of((disk)->private_data, struct cont_type, driver)
8604affd 631
039788e1 632struct ide_port_info;
1da177e4 633
374e042c
BZ
634struct ide_tp_ops {
635 void (*exec_command)(struct hwif_s *, u8);
636 u8 (*read_status)(struct hwif_s *);
637 u8 (*read_altstatus)(struct hwif_s *);
ecf3a31d 638 void (*write_devctl)(struct hwif_s *, u8);
374e042c 639
abb596b2 640 void (*dev_select)(ide_drive_t *);
c9ff9e7b 641 void (*tf_load)(ide_drive_t *, struct ide_taskfile *, u8);
3153c26b 642 void (*tf_read)(ide_drive_t *, struct ide_taskfile *, u8);
374e042c 643
adb1af98
BZ
644 void (*input_data)(ide_drive_t *, struct ide_cmd *,
645 void *, unsigned int);
646 void (*output_data)(ide_drive_t *, struct ide_cmd *,
647 void *, unsigned int);
374e042c
BZ
648};
649
650extern const struct ide_tp_ops default_tp_ops;
651
39b986a6
BZ
652/**
653 * struct ide_port_ops - IDE port operations
654 *
655 * @init_dev: host specific initialization of a device
656 * @set_pio_mode: routine to program host for PIO mode
657 * @set_dma_mode: routine to program host for DMA mode
39b986a6
BZ
658 * @reset_poll: chipset polling based on hba specifics
659 * @pre_reset: chipset specific changes to default for device-hba resets
660 * @resetproc: routine to reset controller after a disk reset
661 * @maskproc: special host masking for drive selection
662 * @quirkproc: check host's drive quirk list
bfa7d8e5 663 * @clear_irq: clear IRQ
39b986a6
BZ
664 *
665 * @mdma_filter: filter MDMA modes
666 * @udma_filter: filter UDMA modes
667 *
668 * @cable_detect: detect cable type
669 */
ac95beed 670struct ide_port_ops {
e6d95bd1 671 void (*init_dev)(ide_drive_t *);
e085b3ca 672 void (*set_pio_mode)(struct hwif_s *, ide_drive_t *);
8776168c 673 void (*set_dma_mode)(struct hwif_s *, ide_drive_t *);
2a842aca 674 blk_status_t (*reset_poll)(ide_drive_t *);
ac95beed 675 void (*pre_reset)(ide_drive_t *);
ac95beed 676 void (*resetproc)(ide_drive_t *);
ac95beed 677 void (*maskproc)(ide_drive_t *, int);
ac95beed 678 void (*quirkproc)(ide_drive_t *);
bfa7d8e5 679 void (*clear_irq)(ide_drive_t *);
f4d3ffa5 680 int (*test_irq)(struct hwif_s *);
ac95beed
BZ
681
682 u8 (*mdma_filter)(ide_drive_t *);
683 u8 (*udma_filter)(ide_drive_t *);
684
685 u8 (*cable_detect)(struct hwif_s *);
686};
687
5e37bdc0
BZ
688struct ide_dma_ops {
689 void (*dma_host_set)(struct ide_drive_s *, int);
22981694 690 int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *);
5e37bdc0
BZ
691 void (*dma_start)(struct ide_drive_s *);
692 int (*dma_end)(struct ide_drive_s *);
693 int (*dma_test_irq)(struct ide_drive_s *);
694 void (*dma_lost_irq)(struct ide_drive_s *);
35c9b4da 695 /* below ones are optional */
8a4a5738 696 int (*dma_check)(struct ide_drive_s *, struct ide_cmd *);
22117d6e 697 int (*dma_timer_expiry)(struct ide_drive_s *);
35c9b4da 698 void (*dma_clear)(struct ide_drive_s *);
592b5315
SS
699 /*
700 * The following method is optional and only required to be
701 * implemented for the SFF-8038i compatible controllers.
702 */
703 u8 (*dma_sff_read_status)(struct hwif_s *);
5e37bdc0
BZ
704};
705
5880b5de
BZ
706enum {
707 IDE_PFLAG_PROBING = (1 << 0),
708};
709
08da591e
BZ
710struct ide_host;
711
1da177e4 712typedef struct hwif_s {
1da177e4 713 struct hwif_s *mate; /* other hwif from same PCI chip */
1da177e4
LT
714 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
715
08da591e
BZ
716 struct ide_host *host;
717
1da177e4
LT
718 char name[6]; /* name of interface, eg. "ide0" */
719
4c3032d8
BZ
720 struct ide_io_ports io_ports;
721
1da177e4 722 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 723
2bd24a1c 724 ide_drive_t *devices[MAX_DRIVES + 1];
1da177e4 725
5880b5de
BZ
726 unsigned long port_flags;
727
1da177e4
LT
728 u8 major; /* our major number */
729 u8 index; /* 0 for ide0; 1 for ide1; ... */
730 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 731
e95d9c6b 732 u32 host_flags;
6a824c92 733
4099d143
BZ
734 u8 pio_mask;
735
1da177e4
LT
736 u8 ultra_mask;
737 u8 mwdma_mask;
738 u8 swdma_mask;
739
49521f97
BZ
740 u8 cbl; /* cable type */
741
1da177e4
LT
742 hwif_chipset_t chipset; /* sub-module for tuning.. */
743
36501650
BZ
744 struct device *dev;
745
1da177e4
LT
746 void (*rw_disk)(ide_drive_t *, struct request *);
747
374e042c 748 const struct ide_tp_ops *tp_ops;
ac95beed 749 const struct ide_port_ops *port_ops;
f37afdac 750 const struct ide_dma_ops *dma_ops;
bfa14b42 751
1da177e4
LT
752 /* dma physical region descriptor table (cpu view) */
753 unsigned int *dmatable_cpu;
754 /* dma physical region descriptor table (dma view) */
755 dma_addr_t dmatable_dma;
2bbd57ca
BZ
756
757 /* maximum number of PRD table entries */
758 int prd_max_nents;
759 /* PRD entry size in bytes */
760 int prd_ent_size;
761
1da177e4
LT
762 /* Scatter-gather list used to build the above */
763 struct scatterlist *sg_table;
764 int sg_max_nents; /* Maximum number of entries in it */
1da177e4 765
22aa4b32 766 struct ide_cmd cmd; /* current command */
d6ff9f64 767
1da177e4
LT
768 int rqsize; /* max sectors per request */
769 int irq; /* our irq number */
770
1da177e4 771 unsigned long dma_base; /* base addr for dma ports */
1da177e4 772
1da177e4
LT
773 unsigned long config_data; /* for use by chipset-specific code */
774 unsigned long select_data; /* for use by chipset-specific code */
775
020e322d
SS
776 unsigned long extra_base; /* extra addr for dma ports */
777 unsigned extra_ports; /* number of extra dma ports */
778
1da177e4 779 unsigned present : 1; /* this interface exists */
5b31f855 780 unsigned busy : 1; /* serializes devices on a port */
1da177e4 781
f74c9141
BZ
782 struct device gendev;
783 struct device *portdev;
784
f36d4024 785 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
786
787 void *hwif_data; /* extra hwif data */
788
e3a59b4d
HR
789#ifdef CONFIG_BLK_DEV_IDEACPI
790 struct ide_acpi_hwif_link *acpidata;
791#endif
b65fac32
BZ
792
793 /* IRQ handler, if active */
794 ide_startstop_t (*handler)(ide_drive_t *);
795
796 /* BOOL: polling active & poll_timeout field valid */
797 unsigned int polling : 1;
798
799 /* current drive */
800 ide_drive_t *cur_dev;
801
802 /* current request */
803 struct request *rq;
804
805 /* failsafe timer */
806 struct timer_list timer;
807 /* timeout value during long polls */
808 unsigned long poll_timeout;
809 /* queried upon timeouts */
810 int (*expiry)(ide_drive_t *);
811
812 int req_gen;
813 int req_gen_timer;
814
815 spinlock_t lock;
22fc6ecc 816} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 817
a36223b0
BZ
818#define MAX_HOST_PORTS 4
819
48c3c107 820struct ide_host {
2bd24a1c 821 ide_hwif_t *ports[MAX_HOST_PORTS + 1];
48c3c107 822 unsigned int n_ports;
6cdf6eb3 823 struct device *dev[2];
e354c1d8 824
2ed0ef54 825 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
826
827 void (*get_lock)(irq_handler_t, void *);
828 void (*release_lock)(void);
829
849d7130 830 irq_handler_t irq_handler;
e354c1d8 831
ef0b0427 832 unsigned long host_flags;
255115fb
BZ
833
834 int irq_flags;
835
6cdf6eb3 836 void *host_priv;
bd53cbcc 837 ide_hwif_t *cur_port; /* for hosts requiring serialization */
5b31f855
BZ
838
839 /* used for hosts requiring serialization */
e720b9e4 840 volatile unsigned long host_busy;
48c3c107
BZ
841};
842
5b31f855
BZ
843#define IDE_HOST_BUSY 0
844
1da177e4
LT
845/*
846 * internal ide interrupt handler type
847 */
1da177e4
LT
848typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
849typedef int (ide_expiry_t)(ide_drive_t *);
850
0eea6458 851/* used by ide-cd, ide-floppy, etc. */
adb1af98 852typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned);
0eea6458 853
f9383c42 854extern struct mutex ide_setting_mtx;
1da177e4 855
92f1f8fd
EO
856/*
857 * configurable drive settings
858 */
859
860#define DS_SYNC (1 << 0)
861
862struct ide_devset {
863 int (*get)(ide_drive_t *);
864 int (*set)(ide_drive_t *, int);
865 unsigned int flags;
866};
867
868#define __DEVSET(_flags, _get, _set) { \
869 .flags = _flags, \
870 .get = _get, \
871 .set = _set, \
872}
7662d046 873
8185d5aa 874#define ide_devset_get(name, field) \
92f1f8fd 875static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
876{ \
877 return drive->field; \
878}
879
880#define ide_devset_set(name, field) \
92f1f8fd 881static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
882{ \
883 drive->field = arg; \
884 return 0; \
885}
886
97100fc8
BZ
887#define ide_devset_get_flag(name, flag) \
888static int get_##name(ide_drive_t *drive) \
889{ \
890 return !!(drive->dev_flags & flag); \
891}
892
893#define ide_devset_set_flag(name, flag) \
894static int set_##name(ide_drive_t *drive, int arg) \
895{ \
896 if (arg) \
897 drive->dev_flags |= flag; \
898 else \
899 drive->dev_flags &= ~flag; \
900 return 0; \
901}
902
92f1f8fd
EO
903#define __IDE_DEVSET(_name, _flags, _get, _set) \
904const struct ide_devset ide_devset_##_name = \
905 __DEVSET(_flags, _get, _set)
906
907#define IDE_DEVSET(_name, _flags, _get, _set) \
908static __IDE_DEVSET(_name, _flags, _get, _set)
909
910#define ide_devset_rw(_name, _func) \
911IDE_DEVSET(_name, 0, get_##_func, set_##_func)
912
913#define ide_devset_w(_name, _func) \
914IDE_DEVSET(_name, 0, NULL, set_##_func)
915
f8790489
BZ
916#define ide_ext_devset_rw(_name, _func) \
917__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
918
919#define ide_ext_devset_rw_sync(_name, _func) \
920__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
92f1f8fd
EO
921
922#define ide_decl_devset(_name) \
923extern const struct ide_devset ide_devset_##_name
924
925ide_decl_devset(io_32bit);
926ide_decl_devset(keepsettings);
927ide_decl_devset(pio_mode);
928ide_decl_devset(unmaskirq);
929ide_decl_devset(using_dma);
930
7662d046 931#ifdef CONFIG_IDE_PROC_FS
1da177e4 932/*
92f1f8fd 933 * /proc/ide interface
1da177e4
LT
934 */
935
92f1f8fd
EO
936#define ide_devset_rw_field(_name, _field) \
937ide_devset_get(_name, _field); \
938ide_devset_set(_name, _field); \
939IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
940
97100fc8
BZ
941#define ide_devset_rw_flag(_name, _field) \
942ide_devset_get_flag(_name, _field); \
943ide_devset_set_flag(_name, _field); \
944IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
945
92f1f8fd
EO
946struct ide_proc_devset {
947 const char *name;
948 const struct ide_devset *setting;
949 int min, max;
950 int (*mulf)(ide_drive_t *);
951 int (*divf)(ide_drive_t *);
8185d5aa
BZ
952};
953
92f1f8fd
EO
954#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
955 .name = __stringify(_name), \
956 .setting = &ide_devset_##_name, \
957 .min = _min, \
958 .max = _max, \
959 .mulf = _mulf, \
960 .divf = _divf, \
8185d5aa
BZ
961}
962
92f1f8fd
EO
963#define IDE_PROC_DEVSET(_name, _min, _max) \
964__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 965
1da177e4
LT
966typedef struct {
967 const char *name;
d161a13f 968 umode_t mode;
6d703a81 969 const struct file_operations *proc_fops;
1da177e4
LT
970} ide_proc_entry_t;
971
ecfd80e4
BZ
972void proc_ide_create(void);
973void proc_ide_destroy(void);
5cbf79cd 974void ide_proc_register_port(ide_hwif_t *);
d9270a3f 975void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 976void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 977void ide_proc_unregister_port(ide_hwif_t *);
7f3c868b
BZ
978void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
979void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
7662d046 980
6d703a81
AD
981extern const struct file_operations ide_capacity_proc_fops;
982extern const struct file_operations ide_geometry_proc_fops;
1da177e4 983#else
ecfd80e4
BZ
984static inline void proc_ide_create(void) { ; }
985static inline void proc_ide_destroy(void) { ; }
5cbf79cd 986static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 987static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 988static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 989static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7f3c868b
BZ
990static inline void ide_proc_register_driver(ide_drive_t *drive,
991 struct ide_driver *driver) { ; }
992static inline void ide_proc_unregister_driver(ide_drive_t *drive,
993 struct ide_driver *driver) { ; }
1da177e4
LT
994#endif
995
e1c7c464
BP
996enum {
997 /* enter/exit functions */
998 IDE_DBG_FUNC = (1 << 0),
999 /* sense key/asc handling */
1000 IDE_DBG_SENSE = (1 << 1),
1001 /* packet commands handling */
1002 IDE_DBG_PC = (1 << 2),
1003 /* request handling */
1004 IDE_DBG_RQ = (1 << 3),
1005 /* driver probing/setup */
1006 IDE_DBG_PROBE = (1 << 4),
1007};
1008
1009/* DRV_NAME has to be defined in the driver before using the macro below */
088b1b88
BP
1010#define __ide_debug_log(lvl, fmt, args...) \
1011{ \
1012 if (unlikely(drive->debug_mask & lvl)) \
1013 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \
1014 __func__, ## args); \
e1c7c464
BP
1015}
1016
1da177e4 1017/*
0d346ba0 1018 * Power Management state machine (rq->pm->pm_step).
1da177e4 1019 *
0d346ba0 1020 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
1021 * This can return:
1022 * - ide_stopped : In this case, the core calls us back again unless
1023 * step have been set to ide_power_state_completed.
1024 * - ide_started : In this case, the channel is left busy until an
1025 * async event (interrupt) occurs.
0d346ba0 1026 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
1027 * do_rw_taskfile().
1028 *
0d346ba0 1029 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
1030 * with the error code if any. This routine should update the step value
1031 * and return. It should not start a new request. The core will call
0d346ba0
BZ
1032 * ide_start_power_step() for the new step value, unless step have been
1033 * set to IDE_PM_COMPLETED.
1da177e4 1034 */
1da177e4 1035enum {
0d346ba0
BZ
1036 IDE_PM_START_SUSPEND,
1037 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1038 IDE_PM_STANDBY,
1039
1040 IDE_PM_START_RESUME,
1041 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1042 IDE_PM_IDLE,
1043 IDE_PM_RESTORE_DMA,
1044
1045 IDE_PM_COMPLETED,
1da177e4
LT
1046};
1047
e2984c62
BZ
1048int generic_ide_suspend(struct device *, pm_message_t);
1049int generic_ide_resume(struct device *);
1050
1051void ide_complete_power_step(ide_drive_t *, struct request *);
1052ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
3616b653 1053void ide_complete_pm_rq(ide_drive_t *, struct request *);
e2984c62
BZ
1054void ide_check_pm_state(ide_drive_t *, struct request *);
1055
1da177e4
LT
1056/*
1057 * Subdrivers support.
4ef3b8f4
LR
1058 *
1059 * The gendriver.owner field should be set to the module owner of this driver.
1060 * The gendriver.name field should be set to the name of this driver
1da177e4 1061 */
7f3c868b 1062struct ide_driver {
1da177e4 1063 const char *version;
1da177e4 1064 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1da177e4 1065 struct device_driver gen_driver;
4031bbe4
RK
1066 int (*probe)(ide_drive_t *);
1067 void (*remove)(ide_drive_t *);
0d2157f7 1068 void (*resume)(ide_drive_t *);
4031bbe4 1069 void (*shutdown)(ide_drive_t *);
7662d046 1070#ifdef CONFIG_IDE_PROC_FS
79cb3803
BZ
1071 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1072 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
7662d046
BZ
1073#endif
1074};
1da177e4 1075
7f3c868b 1076#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
4031bbe4 1077
08da591e
BZ
1078int ide_device_get(ide_drive_t *);
1079void ide_device_put(ide_drive_t *);
1080
aa768773
BZ
1081struct ide_ioctl_devset {
1082 unsigned int get_ioctl;
1083 unsigned int set_ioctl;
92f1f8fd 1084 const struct ide_devset *setting;
aa768773
BZ
1085};
1086
1087int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1088 unsigned long, const struct ide_ioctl_devset *);
1089
1bddd9e6 1090int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1da177e4 1091
ebae41a5
BZ
1092extern int ide_vlb_clk;
1093extern int ide_pci_clk;
1094
2a842aca 1095int ide_end_rq(ide_drive_t *, struct request *, blk_status_t, unsigned int);
327fa1c2
BZ
1096void ide_kill_rq(ide_drive_t *, struct request *);
1097
60c0cd02
BZ
1098void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1099void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1da177e4 1100
35b5d0be
BZ
1101void ide_execute_command(ide_drive_t *, struct ide_cmd *, ide_handler_t *,
1102 unsigned int);
1fc14258 1103
9f87abe8
BZ
1104void ide_pad_transfer(ide_drive_t *, int, int);
1105
9892ec54 1106ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
1da177e4 1107
4dde4492 1108void ide_fix_driveid(u16 *);
01745112 1109
1da177e4
LT
1110extern void ide_fixstring(u8 *, const int, const int);
1111
28ee9bc5 1112int ide_busy_sleep(ide_drive_t *, unsigned long, int);
b163f46d 1113
fa56d4cb 1114int __ide_wait_stat(ide_drive_t *, u8, u8, unsigned long, u8 *);
74af21cf 1115int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1116
c4e66c36 1117ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
11938c92 1118ide_startstop_t ide_do_devset(ide_drive_t *, struct request *);
c4e66c36 1119
1da177e4
LT
1120extern ide_startstop_t ide_do_reset (ide_drive_t *);
1121
92f1f8fd
EO
1122extern int ide_devset_execute(ide_drive_t *drive,
1123 const struct ide_devset *setting, int arg);
1124
22aa4b32 1125void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8);
2a842aca 1126int ide_complete_rq(ide_drive_t *, blk_status_t, unsigned int);
1da177e4 1127
3153c26b 1128void ide_tf_readback(ide_drive_t *drive, struct ide_cmd *cmd);
745483f1 1129void ide_tf_dump(const char *, struct ide_cmd *);
1da177e4 1130
374e042c
BZ
1131void ide_exec_command(ide_hwif_t *, u8);
1132u8 ide_read_status(ide_hwif_t *);
1133u8 ide_read_altstatus(ide_hwif_t *);
ecf3a31d 1134void ide_write_devctl(ide_hwif_t *, u8);
374e042c 1135
abb596b2 1136void ide_dev_select(ide_drive_t *);
c9ff9e7b 1137void ide_tf_load(ide_drive_t *, struct ide_taskfile *, u8);
3153c26b 1138void ide_tf_read(ide_drive_t *, struct ide_taskfile *, u8);
374e042c 1139
adb1af98
BZ
1140void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1141void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
374e042c 1142
ed4af48f 1143void SELECT_MASK(ide_drive_t *, int);
1da177e4 1144
92eb4380 1145u8 ide_read_error(ide_drive_t *);
1823649b 1146void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1147
103f7033
BP
1148int ide_check_ireason(ide_drive_t *, struct request *, int, int, int);
1149
51509eec
BZ
1150int ide_check_atapi_device(ide_drive_t *, const char *);
1151
7bf7420a
BZ
1152void ide_init_pc(struct ide_atapi_pc *);
1153
4abdc6ee
EO
1154/* Disk head parking */
1155extern wait_queue_head_t ide_park_wq;
1156ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1157 char *buf);
1158ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1159 const char *buf, size_t len);
1160
7645c151
BZ
1161/*
1162 * Special requests for ide-tape block device strategy routine.
1163 *
1164 * In order to service a character device command, we add special requests to
1165 * the tail of our block device request queue and wait for their completion.
1166 */
1167enum {
1168 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1169 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1170 REQ_IDETAPE_READ = (1 << 2),
1171 REQ_IDETAPE_WRITE = (1 << 3),
1172};
1173
5a0e43b5 1174int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *,
b13345f3 1175 void *, unsigned int);
7645c151 1176
de699ad5 1177int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1178int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1179int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b 1180void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
6b544fcc 1181void ide_retry_pc(ide_drive_t *drive);
0578042d 1182
a1df5169 1183void ide_prep_sense(ide_drive_t *drive, struct request *rq);
5c4be572 1184int ide_queue_sense_rq(ide_drive_t *drive, void *special);
a1df5169 1185
4cad085e 1186int ide_cd_expiry(ide_drive_t *);
844b9468 1187
392de1d5
BP
1188int ide_cd_get_xferlen(struct request *);
1189
b788ee9c 1190ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_cmd *);
594c16d8 1191
22aa4b32 1192ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *);
1da177e4 1193
a08915ba
BZ
1194void ide_pio_bytes(ide_drive_t *, struct ide_cmd *, unsigned int, unsigned int);
1195
adb1af98 1196void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8);
4d7a984b 1197
22aa4b32
BZ
1198int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16);
1199int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *);
9a3c49be 1200
22aa4b32 1201int ide_taskfile_ioctl(ide_drive_t *, unsigned long);
1da177e4 1202
fa56d4cb 1203int ide_dev_read_id(ide_drive_t *, u8, u16 *, int);
2ebe1d9e 1204
1da177e4 1205extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1206extern int ide_config_drive_speed(ide_drive_t *, u8);
1207extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1208extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1209
1210extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1211
1da177e4
LT
1212extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1213
1da177e4 1214extern void ide_timer_expiry(unsigned long);
7d12e780 1215extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1216extern void do_ide_request(struct request_queue *);
6072f749 1217extern void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq);
1da177e4
LT
1218
1219void ide_init_disk(struct gendisk *, ide_drive_t *);
1220
6d208b39 1221#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1222extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1223#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1224#else
1225#define ide_pci_register_driver(d) pci_register_driver(d)
1226#endif
1227
6636487e
BZ
1228static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1229{
1230 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1231 return 1;
1232 return 0;
1233}
1234
86ccf37c 1235void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *,
9f36d314 1236 struct ide_hw *, struct ide_hw **);
85620436 1237void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1238
8e882ba1 1239#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1240int ide_pci_set_master(struct pci_dev *, const char *);
1241unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1242int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1243int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1244#else
b123f56e
BZ
1245static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1246 const struct ide_port_info *d)
1247{
1248 return -EINVAL;
1249}
c413b9b9
BZ
1250#endif
1251
c0ae5023 1252struct ide_pci_enablebit {
1da177e4
LT
1253 u8 reg; /* byte pci reg holding the enable-bit */
1254 u8 mask; /* mask to isolate the enable-bit */
1255 u8 val; /* value of masked reg when "enabled" */
c0ae5023 1256};
1da177e4
LT
1257
1258enum {
1259 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1260 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1261 /* single port device */
a5d8c5c8 1262 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1263 /* don't use legacy PIO blacklist */
1264 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1265 /* set for the second port of QD65xx */
1266 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1267 /* use PIO8/9 for prefetch off/on */
1268 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1269 /* use PIO6/7 for fast-devsel off/on */
1270 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1271 /* use 100-102 and 200-202 PIO values to set DMA modes */
1272 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1273 /*
1274 * keep DMA setting when programming PIO mode, may be used only
1275 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1276 */
1277 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1278 /* program host for the transfer mode after programming device */
1279 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1280 /* don't program host/device for the transfer mode ("smart" hosts) */
1281 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1282 /* trust BIOS for programming chipset/device for DMA */
1283 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1284 /* host is CS5510/CS5520 */
1285 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1286 /* ATAPI DMA is unsupported */
1287 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1288 /* set if host is a "non-bootable" controller */
1289 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1290 /* host doesn't support DMA */
1291 IDE_HFLAG_NO_DMA = (1 << 14),
1292 /* check if host is PCI IDE device before allowing DMA */
1293 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1294 /* host uses MMIO */
1295 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1296 /* no LBA48 */
1297 IDE_HFLAG_NO_LBA48 = (1 << 17),
1298 /* no LBA48 DMA */
1299 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1300 /* data FIFO is cleared by an error */
1301 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1302 /* serialize ports */
1303 IDE_HFLAG_SERIALIZE = (1 << 20),
2787cb8a
BZ
1304 /* host is DTC2278 */
1305 IDE_HFLAG_DTC2278 = (1 << 21),
c094ea07
BZ
1306 /* 4 devices on a single set of I/O ports */
1307 IDE_HFLAG_4DRIVES = (1 << 22),
1f66019b
BZ
1308 /* host is TRM290 */
1309 IDE_HFLAG_TRM290 = (1 << 23),
caea7602
BZ
1310 /* use 32-bit I/O ops */
1311 IDE_HFLAG_IO_32BIT = (1 << 24),
1312 /* unmask IRQs */
1313 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
6636487e 1314 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
1fd18905
BZ
1315 /* serialize ports if DMA is possible (for sl82c105) */
1316 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1317 /* force host out of "simplex" mode */
1318 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1319 /* DSC overlap is unsupported */
1320 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1321 /* never use 32-bit I/O ops */
1322 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1323 /* never unmask IRQs */
1324 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1325};
1326
7cab14a7 1327#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1328# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1329#else
1330# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1331#endif
1332
039788e1 1333struct ide_port_info {
1da177e4 1334 char *name;
e354c1d8 1335
2ed0ef54 1336 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
1337
1338 void (*get_lock)(irq_handler_t, void *);
1339 void (*release_lock)(void);
1340
1da177e4
LT
1341 void (*init_iops)(ide_hwif_t *);
1342 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1343 int (*init_dma)(ide_hwif_t *,
1344 const struct ide_port_info *);
ac95beed 1345
374e042c 1346 const struct ide_tp_ops *tp_ops;
ac95beed 1347 const struct ide_port_ops *port_ops;
f37afdac 1348 const struct ide_dma_ops *dma_ops;
ac95beed 1349
c0ae5023
BZ
1350 struct ide_pci_enablebit enablebits[2];
1351
528a572d 1352 hwif_chipset_t chipset;
6b492496
BZ
1353
1354 u16 max_sectors; /* if < than the default one */
1355
9ffcf364 1356 u32 host_flags;
255115fb
BZ
1357
1358 int irq_flags;
1359
4099d143 1360 u8 pio_mask;
5f8b6c34
BZ
1361 u8 swdma_mask;
1362 u8 mwdma_mask;
18137207 1363 u8 udma_mask;
039788e1 1364};
1da177e4 1365
a7928c15
CH
1366/*
1367 * State information carried for REQ_TYPE_ATA_PM_SUSPEND and REQ_TYPE_ATA_PM_RESUME
1368 * requests.
1369 */
1370struct ide_pm_state {
1371 /* PM state machine step value, currently driver specific */
1372 int pm_step;
1373 /* requested PM state value (S1, S2, S3, S4, ...) */
1374 u32 pm_state;
1375 void* data; /* for driver use */
1376};
1377
1378
6cdf6eb3
BZ
1379int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1380int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1381 const struct ide_port_info *, void *);
ef0b0427 1382void ide_pci_remove(struct pci_dev *);
1da177e4 1383
feb22b7f
BZ
1384#ifdef CONFIG_PM
1385int ide_pci_suspend(struct pci_dev *, pm_message_t);
1386int ide_pci_resume(struct pci_dev *);
1387#else
1388#define ide_pci_suspend NULL
1389#define ide_pci_resume NULL
1390#endif
1391
22981694 1392void ide_map_sg(ide_drive_t *, struct ide_cmd *);
bf717c0a 1393void ide_init_sg_cmd(struct ide_cmd *, unsigned int);
1da177e4
LT
1394
1395#define BAD_DMA_DRIVE 0
1396#define GOOD_DMA_DRIVE 1
1397
65e5f2e3
JC
1398struct drive_list_entry {
1399 const char *id_model;
1400 const char *id_firmware;
1401};
1402
4dde4492 1403int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1404
1405#ifdef CONFIG_BLK_DEV_IDEDMA
2dbe7e91 1406int ide_dma_good_drive(ide_drive_t *);
1da177e4 1407int __ide_dma_bad_drive(ide_drive_t *);
7670df73
BZ
1408
1409u8 ide_find_dma_mode(ide_drive_t *, u8);
1410
1411static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1412{
1413 return ide_find_dma_mode(drive, XFER_UDMA_6);
1414}
1415
4a546e04 1416void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1417void ide_dma_off(ide_drive_t *);
4a546e04 1418void ide_dma_on(ide_drive_t *);
3608b5d7 1419int ide_set_dma(ide_drive_t *);
578cfa0d 1420void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1421ide_startstop_t ide_dma_intr(ide_drive_t *);
1422
2bbd57ca
BZ
1423int ide_allocate_dma_engine(ide_hwif_t *);
1424void ide_release_dma_engine(ide_hwif_t *);
1425
5ae5412d 1426int ide_dma_prepare(ide_drive_t *, struct ide_cmd *);
f094d4d8 1427void ide_dma_unmap_sg(ide_drive_t *, struct ide_cmd *);
062f9f02 1428
8e882ba1 1429#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
2dbe7e91 1430int config_drive_for_dma(ide_drive_t *);
22981694 1431int ide_build_dmatable(ide_drive_t *, struct ide_cmd *);
15ce926a 1432void ide_dma_host_set(ide_drive_t *, int);
22981694 1433int ide_dma_setup(ide_drive_t *, struct ide_cmd *);
1da177e4 1434extern void ide_dma_start(ide_drive_t *);
653bcf52 1435int ide_dma_end(ide_drive_t *);
f37afdac 1436int ide_dma_test_irq(ide_drive_t *);
22117d6e 1437int ide_dma_sff_timer_expiry(ide_drive_t *);
592b5315 1438u8 ide_dma_sff_read_status(ide_hwif_t *);
71fc9fcc 1439extern const struct ide_dma_ops sff_dma_ops;
2dbe7e91
BZ
1440#else
1441static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
8e882ba1 1442#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4 1443
de23ec9c 1444void ide_dma_lost_irq(ide_drive_t *);
65ca5377 1445ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
de23ec9c 1446
1da177e4 1447#else
7670df73 1448static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1449static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1450static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1451static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1452static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1453static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1454static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1455static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
22117d6e 1456static inline ide_startstop_t ide_dma_intr(ide_drive_t *drive) { return ide_stopped; }
65ca5377 1457static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; }
0d1bad21 1458static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
5ae5412d
BZ
1459static inline int ide_dma_prepare(ide_drive_t *drive,
1460 struct ide_cmd *cmd) { return 1; }
f094d4d8
BZ
1461static inline void ide_dma_unmap_sg(ide_drive_t *drive,
1462 struct ide_cmd *cmd) { ; }
2bbd57ca 1463#endif /* CONFIG_BLK_DEV_IDEDMA */
1da177e4 1464
e3a59b4d 1465#ifdef CONFIG_BLK_DEV_IDEACPI
8b803bd1 1466int ide_acpi_init(void);
2bf427b2 1467bool ide_port_acpi(ide_hwif_t *hwif);
e3a59b4d
HR
1468extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1469extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1470extern void ide_acpi_push_timing(ide_hwif_t *hwif);
8b803bd1 1471void ide_acpi_init_port(ide_hwif_t *);
eafd88a3 1472void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1473extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d 1474#else
8b803bd1 1475static inline int ide_acpi_init(void) { return 0; }
2bf427b2 1476static inline bool ide_port_acpi(ide_hwif_t *hwif) { return 0; }
e3a59b4d
HR
1477static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1478static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1479static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
8b803bd1 1480static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; }
eafd88a3 1481static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1482static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1483#endif
1484
1da177e4
LT
1485void ide_register_region(struct gendisk *);
1486void ide_unregister_region(struct gendisk *);
1487
8bc1e5aa 1488void ide_check_nien_quirk_list(ide_drive_t *);
f01393e4 1489void ide_undecoded_slave(ide_drive_t *);
1da177e4 1490
9fd91d95 1491void ide_port_apply_params(ide_hwif_t *);
ebdab07d 1492int ide_sysfs_register_port(ide_hwif_t *);
9fd91d95 1493
9f36d314 1494struct ide_host *ide_host_alloc(const struct ide_port_info *, struct ide_hw **,
dca39830 1495 unsigned int);
8a69580e 1496void ide_host_free(struct ide_host *);
48c3c107 1497int ide_host_register(struct ide_host *, const struct ide_port_info *,
9f36d314
BZ
1498 struct ide_hw **);
1499int ide_host_add(const struct ide_port_info *, struct ide_hw **, unsigned int,
6f904d01 1500 struct ide_host **);
48c3c107 1501void ide_host_remove(struct ide_host *);
0bfeee7d 1502int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1503void ide_port_unregister_devices(ide_hwif_t *);
1504void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1505
1506static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1507{
1508 return hwif->hwif_data;
1509}
1510
1511static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1512{
1513 hwif->hwif_data = data;
1514}
1515
1da177e4 1516extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1da177e4 1517
745483f1 1518u64 ide_get_lba_addr(struct ide_cmd *, int);
1da177e4
LT
1519u8 ide_dump_status(ide_drive_t *, const char *, u8);
1520
3be53f3f
BZ
1521struct ide_timing {
1522 u8 mode;
1523 u8 setup; /* t1 */
1524 u16 act8b; /* t2 for 8-bit io */
1525 u16 rec8b; /* t2i for 8-bit io */
1526 u16 cyc8b; /* t0 for 8-bit io */
1527 u16 active; /* t2 or tD */
1528 u16 recover; /* t2i or tK */
1529 u16 cycle; /* t0 */
1530 u16 udma; /* t2CYCTYP/2 */
1531};
1532
1533enum {
1534 IDE_TIMING_SETUP = (1 << 0),
1535 IDE_TIMING_ACT8B = (1 << 1),
1536 IDE_TIMING_REC8B = (1 << 2),
1537 IDE_TIMING_CYC8B = (1 << 3),
1538 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1539 IDE_TIMING_CYC8B,
1540 IDE_TIMING_ACTIVE = (1 << 4),
1541 IDE_TIMING_RECOVER = (1 << 5),
1542 IDE_TIMING_CYCLE = (1 << 6),
1543 IDE_TIMING_UDMA = (1 << 7),
1544 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1545 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1546 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1547};
1548
f06ab340 1549struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1550u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1551void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1552 struct ide_timing *, unsigned int);
1553int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1554
7eeaaaa5 1555#ifdef CONFIG_IDE_XFER_MODE
9ad54093 1556int ide_scan_pio_blacklist(char *);
7eeaaaa5 1557const char *ide_xfer_verbose(u8);
c9ef59ff 1558int ide_pio_need_iordy(ide_drive_t *, const u8);
88b2b32b
BZ
1559int ide_set_pio_mode(ide_drive_t *, u8);
1560int ide_set_dma_mode(ide_drive_t *, u8);
26bcb879 1561void ide_set_pio(ide_drive_t *, u8);
7eeaaaa5
BZ
1562int ide_set_xfer_rate(ide_drive_t *, u8);
1563#else
1564static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; }
1565static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; }
1566#endif
26bcb879
BZ
1567
1568static inline void ide_set_max_pio(ide_drive_t *drive)
1569{
1570 ide_set_pio(drive, 255);
1571}
1da177e4 1572
ebdab07d
BZ
1573char *ide_media_string(ide_drive_t *);
1574
fb3fed79 1575extern const struct attribute_group *ide_dev_groups[];
1da177e4 1576extern struct bus_type ide_bus_type;
f74c9141 1577extern struct class *ide_port_class;
1da177e4 1578
7b9f25b5
BZ
1579static inline void ide_dump_identify(u8 *id)
1580{
1581 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1582}
1583
86b37860
CL
1584static inline int hwif_to_node(ide_hwif_t *hwif)
1585{
96f80219 1586 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1587}
1588
7e59ea21 1589static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1590{
5e7f3a46 1591 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
1b678347 1592
97100fc8 1593 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1594}
2bd24a1c 1595
5bfb151f
JR
1596static inline void *ide_get_drivedata(ide_drive_t *drive)
1597{
1598 return drive->drive_data;
1599}
1600
1601static inline void ide_set_drivedata(ide_drive_t *drive, void *data)
1602{
1603 drive->drive_data = data;
1604}
1605
2bd24a1c
BZ
1606#define ide_port_for_each_dev(i, dev, port) \
1607 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
1608
7ed5b157
BZ
1609#define ide_port_for_each_present_dev(i, dev, port) \
1610 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \
1611 if ((dev)->dev_flags & IDE_DFLAG_PRESENT)
1612
2bd24a1c
BZ
1613#define ide_host_for_each_port(i, port, host) \
1614 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
1615
b42171ef 1616
1da177e4 1617#endif /* _IDE_H */