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ide: make ide_special_rq() BUG() on unknown requests
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CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
3ceca727 11#include <linux/ata.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
feb22b7f 20#include <linux/pm.h>
e3a59b4d
HR
21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
d45b70ab 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV) || defined(CONFIG_MN10300)
4ee06b7e
BZ
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
1da177e4
LT
35/*
36 * Probably not wise to fiddle with these
37 */
b40d1b88 38#define IDE_DEFAULT_MAX_FAILURES 1
1da177e4
LT
39#define ERROR_MAX 8 /* Max read/write errors per sector */
40#define ERROR_RESET 3 /* Reset controller every 4th retry */
41#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
42
c152cc1a
BZ
43/* Error codes returned in rq->errors to the higher part of the driver. */
44enum {
45 IDE_DRV_ERROR_GENERAL = 101,
46 IDE_DRV_ERROR_FILEMARK = 102,
47 IDE_DRV_ERROR_EOD = 103,
48};
49
1da177e4
LT
50/*
51 * Definitions for accessing IDE controller registers
52 */
53#define IDE_NR_PORTS (10)
54
4c3032d8
BZ
55struct ide_io_ports {
56 unsigned long data_addr;
57
58 union {
59 unsigned long error_addr; /* read: error */
60 unsigned long feature_addr; /* write: feature */
61 };
62
63 unsigned long nsect_addr;
64 unsigned long lbal_addr;
65 unsigned long lbam_addr;
66 unsigned long lbah_addr;
67
68 unsigned long device_addr;
69
70 union {
71 unsigned long status_addr; /*  read: status  */
72 unsigned long command_addr; /* write: command */
73 };
74
75 unsigned long ctl_addr;
76
77 unsigned long irq_addr;
78};
1da177e4
LT
79
80#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 81
3a7d2484
BZ
82#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
83#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
84#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
85#define DRIVE_READY (ATA_DRDY | ATA_DSC)
86
87#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
88
89#define SATA_NR_PORTS (3) /* 16 possible ?? */
90
91#define SATA_STATUS_OFFSET (0)
1da177e4 92#define SATA_ERROR_OFFSET (1)
1da177e4 93#define SATA_CONTROL_OFFSET (2)
1da177e4 94
1da177e4
LT
95/*
96 * Our Physical Region Descriptor (PRD) table should be large enough
97 * to handle the biggest I/O request we are likely to see. Since requests
98 * can have no more than 256 sectors, and since the typical blocksize is
99 * two or more sectors, we could get by with a limit of 128 entries here for
100 * the usual worst case. Most requests seem to include some contiguous blocks,
101 * further reducing the number of table entries required.
102 *
103 * The driver reverts to PIO mode for individual requests that exceed
104 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
105 * 100% of all crazy scenarios here is not necessary.
106 *
107 * As it turns out though, we must allocate a full 4KB page for this,
108 * so the two PRD tables (ide0 & ide1) will each get half of that,
109 * allowing each to have about 256 entries (8 bytes each) from this.
110 */
111#define PRD_BYTES 8
112#define PRD_ENTRIES 256
113
114/*
115 * Some more useful definitions
116 */
117#define PARTN_BITS 6 /* number of minor dev bits for partitions */
118#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
119#define SECTOR_SIZE 512
151a6701 120
1da177e4
LT
121/*
122 * Timeouts for various operations:
123 */
d6e2955a
BZ
124enum {
125 /* spec allows up to 20ms */
126 WAIT_DRQ = HZ / 10, /* 100ms */
127 /* some laptops are very slow */
128 WAIT_READY = 5 * HZ, /* 5s */
129 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
130 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
131 /* worst case when spinning up */
132 WAIT_WORSTCASE = 30 * HZ, /* 30s */
133 /* maximum wait for an IRQ to happen */
134 WAIT_CMD = 10 * HZ, /* 10s */
135 /* Some drives require a longer IRQ timeout. */
136 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
137 /*
138 * Some drives (for example, Seagate STT3401A Travan) require a very
139 * long timeout, because they don't return an interrupt or clear their
140 * BSY bit until after the command completes (even retension commands).
141 */
142 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
143 /* minimum sleep time */
144 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
145};
1da177e4 146
79e36a9f
EO
147/*
148 * Op codes for special requests to be handled by ide_special_rq().
149 * Values should be in the range of 0x20 to 0x3f.
150 */
151#define REQ_DRIVE_RESET 0x20
92f1f8fd 152#define REQ_DEVSET_EXEC 0x21
4abdc6ee
EO
153#define REQ_PARK_HEADS 0x22
154#define REQ_UNPARK_HEADS 0x23
79e36a9f 155
1da177e4
LT
156/*
157 * Check for an interrupt and acknowledge the interrupt status
158 */
159struct hwif_s;
160typedef int (ide_ack_intr_t)(struct hwif_s *);
161
1da177e4
LT
162/*
163 * hwif_chipset_t is used to keep track of the specific hardware
164 * chipset used by each IDE interface, if known.
165 */
528a572d 166enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
167 ide_cmd640, ide_dtc2278, ide_ali14xx,
168 ide_qd65xx, ide_umc8672, ide_ht6560b,
b7876a6f 169 ide_4drives, ide_pmac, ide_acorn,
9a0e77f2 170 ide_au1xxx, ide_palm3710
528a572d
BZ
171};
172
173typedef u8 hwif_chipset_t;
1da177e4
LT
174
175/*
176 * Structure to hold all information about the location of this port
177 */
178typedef struct hw_regs_s {
4c3032d8
BZ
179 union {
180 struct ide_io_ports io_ports;
181 unsigned long io_ports_array[IDE_NR_PORTS];
182 };
183
1da177e4 184 int irq; /* our irq number */
1da177e4
LT
185 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
186 hwif_chipset_t chipset;
c56c5648 187 struct device *dev, *parent;
d6276b5f 188 unsigned long config;
1da177e4
LT
189} hw_regs_t;
190
1da177e4
LT
191static inline void ide_std_init_ports(hw_regs_t *hw,
192 unsigned long io_addr,
193 unsigned long ctl_addr)
194{
195 unsigned int i;
196
4c3032d8
BZ
197 for (i = 0; i <= 7; i++)
198 hw->io_ports_array[i] = io_addr++;
1da177e4 199
4c3032d8 200 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
201}
202
c5bfc375 203#define MAX_HWIFS 10
83ae20c8 204
1da177e4
LT
205/*
206 * Now for the data we need to maintain per-drive: ide_drive_t
207 */
208
209#define ide_scsi 0x21
210#define ide_disk 0x20
211#define ide_optical 0x7
212#define ide_cdrom 0x5
213#define ide_tape 0x1
214#define ide_floppy 0x0
215
216/*
217 * Special Driver Flags
218 *
219 * set_geometry : respecify drive geometry
220 * recalibrate : seek to cyl 0
221 * set_multmode : set multmode count
1da177e4
LT
222 * reserved : unused
223 */
224typedef union {
225 unsigned all : 8;
226 struct {
1da177e4
LT
227 unsigned set_geometry : 1;
228 unsigned recalibrate : 1;
229 unsigned set_multmode : 1;
6982daf7 230 unsigned reserved : 5;
1da177e4
LT
231 } b;
232} special_t;
233
1da177e4
LT
234/*
235 * Status returned from various ide_ functions
236 */
237typedef enum {
238 ide_stopped, /* no drive operation was started */
239 ide_started, /* a drive operation was started, handler was set */
240} ide_startstop_t;
241
d6ff9f64
BZ
242enum {
243 IDE_TFLAG_LBA48 = (1 << 0),
19710d25
BZ
244 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 1),
245 IDE_TFLAG_OUT_HOB_NSECT = (1 << 2),
246 IDE_TFLAG_OUT_HOB_LBAL = (1 << 3),
247 IDE_TFLAG_OUT_HOB_LBAM = (1 << 4),
248 IDE_TFLAG_OUT_HOB_LBAH = (1 << 5),
d6ff9f64
BZ
249 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
250 IDE_TFLAG_OUT_HOB_NSECT |
251 IDE_TFLAG_OUT_HOB_LBAL |
252 IDE_TFLAG_OUT_HOB_LBAM |
253 IDE_TFLAG_OUT_HOB_LBAH,
19710d25
BZ
254 IDE_TFLAG_OUT_FEATURE = (1 << 6),
255 IDE_TFLAG_OUT_NSECT = (1 << 7),
256 IDE_TFLAG_OUT_LBAL = (1 << 8),
257 IDE_TFLAG_OUT_LBAM = (1 << 9),
258 IDE_TFLAG_OUT_LBAH = (1 << 10),
d6ff9f64
BZ
259 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
260 IDE_TFLAG_OUT_NSECT |
261 IDE_TFLAG_OUT_LBAL |
262 IDE_TFLAG_OUT_LBAM |
263 IDE_TFLAG_OUT_LBAH,
19710d25
BZ
264 IDE_TFLAG_OUT_DEVICE = (1 << 11),
265 IDE_TFLAG_WRITE = (1 << 12),
266 IDE_TFLAG_CUSTOM_HANDLER = (1 << 13),
267 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 14),
268 IDE_TFLAG_IN_HOB_FEATURE = (1 << 15),
269 IDE_TFLAG_IN_HOB_NSECT = (1 << 16),
270 IDE_TFLAG_IN_HOB_LBAL = (1 << 17),
271 IDE_TFLAG_IN_HOB_LBAM = (1 << 18),
272 IDE_TFLAG_IN_HOB_LBAH = (1 << 19),
d6ff9f64
BZ
273 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
274 IDE_TFLAG_IN_HOB_LBAM |
275 IDE_TFLAG_IN_HOB_LBAH,
276 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
277 IDE_TFLAG_IN_HOB_NSECT |
278 IDE_TFLAG_IN_HOB_LBA,
19710d25
BZ
279 IDE_TFLAG_IN_FEATURE = (1 << 20),
280 IDE_TFLAG_IN_NSECT = (1 << 21),
281 IDE_TFLAG_IN_LBAL = (1 << 22),
282 IDE_TFLAG_IN_LBAM = (1 << 23),
283 IDE_TFLAG_IN_LBAH = (1 << 24),
d6ff9f64
BZ
284 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
285 IDE_TFLAG_IN_LBAM |
286 IDE_TFLAG_IN_LBAH,
287 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
288 IDE_TFLAG_IN_LBA,
19710d25 289 IDE_TFLAG_IN_DEVICE = (1 << 25),
d6ff9f64
BZ
290 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
291 IDE_TFLAG_IN_HOB,
292 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
293 IDE_TFLAG_IN_TF,
294 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
295 IDE_TFLAG_IN_DEVICE,
296 /* force 16-bit I/O operations */
19710d25 297 IDE_TFLAG_IO_16BIT = (1 << 26),
22aa4b32 298 /* struct ide_cmd was allocated using kmalloc() */
19710d25 299 IDE_TFLAG_DYN = (1 << 27),
adb1af98 300 IDE_TFLAG_FS = (1 << 28),
0dfb991c 301 IDE_TFLAG_MULTI_PIO = (1 << 29),
19710d25
BZ
302};
303
304enum {
305 IDE_FTFLAG_FLAGGED = (1 << 0),
306 IDE_FTFLAG_SET_IN_FLAGS = (1 << 1),
307 IDE_FTFLAG_OUT_DATA = (1 << 2),
308 IDE_FTFLAG_IN_DATA = (1 << 3),
d6ff9f64
BZ
309};
310
311struct ide_taskfile {
312 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
313
314 u8 hob_feature; /* 1-5: additional data to support LBA48 */
315 u8 hob_nsect;
316 u8 hob_lbal;
317 u8 hob_lbam;
318 u8 hob_lbah;
319
320 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
321
322 union { /*  7: */
323 u8 error; /* read: error */
324 u8 feature; /* write: feature */
325 };
326
327 u8 nsect; /* 8: number of sectors */
328 u8 lbal; /* 9: LBA low */
329 u8 lbam; /* 10: LBA mid */
330 u8 lbah; /* 11: LBA high */
331
332 u8 device; /* 12: device select */
333
334 union { /* 13: */
335 u8 status; /*  read: status  */
336 u8 command; /* write: command */
337 };
338};
339
22aa4b32 340struct ide_cmd {
d6ff9f64
BZ
341 union {
342 struct ide_taskfile tf;
343 u8 tf_array[14];
344 };
19710d25 345 u8 ftf_flags; /* for TASKFILE ioctl */
d6ff9f64 346 u32 tf_flags;
0dfb991c 347 int protocol;
b6308ee0
BZ
348
349 int sg_nents; /* number of sg entries */
350 int orig_sg_nents;
351 int sg_dma_direction; /* DMA transfer direction */
352
353 unsigned int nsect;
354 unsigned int nleft;
355 struct scatterlist *cursg;
356 unsigned int cursg_ofs;
357
d6ff9f64
BZ
358 struct request *rq; /* copy of request */
359 void *special; /* valid_t generally */
22aa4b32 360};
d6ff9f64 361
67c56364
BZ
362/* ATAPI packet command flags */
363enum {
364 /* set when an error is considered normal - no retry (ide-tape) */
365 PC_FLAG_ABORT = (1 << 0),
366 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
367 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
368 PC_FLAG_DMA_OK = (1 << 3),
369 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
370 PC_FLAG_DMA_ERROR = (1 << 5),
371 PC_FLAG_WRITING = (1 << 6),
67c56364
BZ
372};
373
374/*
375 * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
376 * This is used for several packet commands (not for READ/WRITE commands).
377 */
378#define IDE_PC_BUFFER_SIZE 256
4cad085e 379#define ATAPI_WAIT_PC (60 * HZ)
67c56364
BZ
380
381struct ide_atapi_pc {
382 /* actual packet bytes */
383 u8 c[12];
384 /* incremented on each retry */
385 int retries;
386 int error;
387
388 /* bytes to transfer */
389 int req_xfer;
390 /* bytes actually transferred */
391 int xferred;
392
393 /* data buffer */
394 u8 *buf;
395 /* current buffer position */
396 u8 *cur_pos;
397 int buf_size;
398 /* missing/available data on the current buffer */
399 int b_count;
400
401 /* the corresponding request */
402 struct request *rq;
403
404 unsigned long flags;
405
406 /*
407 * those are more or less driver-specific and some of them are subject
408 * to change/removal later.
409 */
410 u8 pc_buf[IDE_PC_BUFFER_SIZE];
411
412 /* idetape only */
413 struct idetape_bh *bh;
414 char *b_data;
415
67c56364
BZ
416 struct scatterlist *sg;
417 unsigned int sg_cnt;
418
67c56364
BZ
419 unsigned long timeout;
420};
421
8185d5aa 422struct ide_devset;
7f3c868b 423struct ide_driver;
1da177e4 424
e3a59b4d
HR
425#ifdef CONFIG_BLK_DEV_IDEACPI
426struct ide_acpi_drive_link;
427struct ide_acpi_hwif_link;
428#endif
429
806f80a6
BZ
430struct ide_drive_s;
431
432struct ide_disk_ops {
433 int (*check)(struct ide_drive_s *, const char *);
434 int (*get_capacity)(struct ide_drive_s *);
435 void (*setup)(struct ide_drive_s *);
436 void (*flush)(struct ide_drive_s *);
437 int (*init_media)(struct ide_drive_s *, struct gendisk *);
438 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
439 int);
440 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
441 sector_t);
badf8082
AV
442 int (*ioctl)(struct ide_drive_s *, struct block_device *,
443 fmode_t, unsigned int, unsigned long);
806f80a6
BZ
444};
445
3b8ac539
BP
446/* ATAPI device flags */
447enum {
448 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
0578042d
BZ
449
450 /* ide-cd */
3b8ac539 451 /* Drive cannot eject the disc. */
bf64741f 452 IDE_AFLAG_NO_EJECT = (1 << 1),
3b8ac539 453 /* Drive is a pre ATAPI 1.2 drive. */
bf64741f 454 IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
3b8ac539 455 /* TOC addresses are in BCD. */
bf64741f 456 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
3b8ac539 457 /* TOC track numbers are in BCD. */
bf64741f 458 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
3b8ac539
BP
459 /*
460 * Drive does not provide data in multiples of SECTOR_SIZE
461 * when more than one interrupt is needed.
462 */
bf64741f 463 IDE_AFLAG_LIMIT_NFRAMES = (1 << 5),
3b8ac539 464 /* Saved TOC information is current. */
bf64741f 465 IDE_AFLAG_TOC_VALID = (1 << 6),
3b8ac539 466 /* We think that the drive door is locked. */
bf64741f 467 IDE_AFLAG_DOOR_LOCKED = (1 << 7),
3b8ac539 468 /* SET_CD_SPEED command is unsupported. */
bf64741f
BP
469 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
470 IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
471 IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
472 IDE_AFLAG_SANYO_3CD = (1 << 11),
473 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
474 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
475 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
3b8ac539
BP
476
477 /* ide-floppy */
3b8ac539 478 /* Avoid commands not supported in Clik drive */
bf64741f 479 IDE_AFLAG_CLIK_DRIVE = (1 << 15),
3b8ac539 480 /* Requires BH algorithm for packets */
bf64741f 481 IDE_AFLAG_ZIP_DRIVE = (1 << 16),
49cac39e 482 /* Supports format progress report */
bf64741f 483 IDE_AFLAG_SRFP = (1 << 17),
3b8ac539
BP
484
485 /* ide-tape */
bf64741f 486 IDE_AFLAG_IGNORE_DSC = (1 << 18),
3b8ac539 487 /* 0 When the tape position is unknown */
bf64741f 488 IDE_AFLAG_ADDRESS_VALID = (1 << 19),
3b8ac539 489 /* Device already opened */
bf64741f 490 IDE_AFLAG_BUSY = (1 << 20),
3b8ac539 491 /* Attempt to auto-detect the current user block size */
bf64741f 492 IDE_AFLAG_DETECT_BS = (1 << 21),
3b8ac539 493 /* Currently on a filemark */
bf64741f 494 IDE_AFLAG_FILEMARK = (1 << 22),
3b8ac539 495 /* 0 = no tape is loaded, so we don't rewind after ejecting */
bf64741f 496 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
f20f2586 497
bf64741f 498 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
3b8ac539
BP
499};
500
97100fc8
BZ
501/* device flags */
502enum {
503 /* restore settings after device reset */
504 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
505 /* device is using DMA for read/write */
506 IDE_DFLAG_USING_DMA = (1 << 1),
507 /* okay to unmask other IRQs */
508 IDE_DFLAG_UNMASK = (1 << 2),
509 /* don't attempt flushes */
510 IDE_DFLAG_NOFLUSH = (1 << 3),
511 /* DSC overlap */
512 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
513 /* give potential excess bandwidth */
514 IDE_DFLAG_NICE1 = (1 << 5),
515 /* device is physically present */
516 IDE_DFLAG_PRESENT = (1 << 6),
97100fc8
BZ
517 /* id read from device (synthetic if not set) */
518 IDE_DFLAG_ID_READ = (1 << 8),
519 IDE_DFLAG_NOPROBE = (1 << 9),
520 /* need to do check_media_change() */
521 IDE_DFLAG_REMOVABLE = (1 << 10),
522 /* needed for removable devices */
523 IDE_DFLAG_ATTACH = (1 << 11),
524 IDE_DFLAG_FORCED_GEOM = (1 << 12),
525 /* disallow setting unmask bit */
526 IDE_DFLAG_NO_UNMASK = (1 << 13),
527 /* disallow enabling 32-bit I/O */
528 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
529 /* for removable only: door lock/unlock works */
530 IDE_DFLAG_DOORLOCKING = (1 << 15),
531 /* disallow DMA */
532 IDE_DFLAG_NODMA = (1 << 16),
533 /* powermanagment told us not to do anything, so sleep nicely */
534 IDE_DFLAG_BLOCKED = (1 << 17),
97100fc8 535 /* sleeping & sleep field valid */
5317464d
BP
536 IDE_DFLAG_SLEEPING = (1 << 18),
537 IDE_DFLAG_POST_RESET = (1 << 19),
538 IDE_DFLAG_UDMA33_WARNED = (1 << 20),
539 IDE_DFLAG_LBA48 = (1 << 21),
97100fc8 540 /* status of write cache */
5317464d 541 IDE_DFLAG_WCACHE = (1 << 22),
97100fc8 542 /* used for ignoring ATA_DF */
5317464d 543 IDE_DFLAG_NOWERR = (1 << 23),
c3922048 544 /* retrying in PIO */
5317464d
BP
545 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
546 IDE_DFLAG_LBA = (1 << 25),
4abdc6ee 547 /* don't unload heads */
5317464d 548 IDE_DFLAG_NO_UNLOAD = (1 << 26),
4abdc6ee 549 /* heads unloaded, please don't reset port */
5317464d
BP
550 IDE_DFLAG_PARKED = (1 << 27),
551 IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
da167876 552 /* write protect */
5317464d
BP
553 IDE_DFLAG_WP = (1 << 29),
554 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
97100fc8
BZ
555};
556
d7c26ebb 557struct ide_drive_s {
1da177e4
LT
558 char name[4]; /* drive name, such as "hda" */
559 char driver_req[10]; /* requests specific driver */
560
165125e1 561 struct request_queue *queue; /* request queue */
1da177e4
LT
562
563 struct request *rq; /* current request */
1da177e4 564 void *driver_data; /* extra driver data */
48fb2688 565 u16 *id; /* identification info */
7662d046 566#ifdef CONFIG_IDE_PROC_FS
1da177e4 567 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 568 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 569#endif
1da177e4
LT
570 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
571
806f80a6
BZ
572 const struct ide_disk_ops *disk_ops;
573
97100fc8
BZ
574 unsigned long dev_flags;
575
1da177e4 576 unsigned long sleep; /* sleep until this time */
1da177e4
LT
577 unsigned long timeout; /* max time to wait for irq */
578
579 special_t special; /* special action flags */
1da177e4 580
7f612f27 581 u8 select; /* basic drive/head select reg value */
1da177e4 582 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 583 u8 waiting_for_dma; /* dma currently in progress */
0a9b6f88 584 u8 dma; /* atapi dma flag */
1da177e4 585
1da177e4
LT
586 u8 quirk_list; /* considered quirky, set for a specific host */
587 u8 init_speed; /* transfer rate set at boot */
1da177e4 588 u8 current_speed; /* current transfer rate set */
513daadd 589 u8 desired_speed; /* desired transfer rate set */
1da177e4 590 u8 dn; /* now wide spread use */
1da177e4
LT
591 u8 acoustic; /* acoustic management */
592 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
593 u8 ready_stat; /* min status value for drive ready */
594 u8 mult_count; /* current multiple sector setting */
595 u8 mult_req; /* requested multiple sector setting */
1da177e4 596 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 597 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
598 u8 head; /* "real" number of heads */
599 u8 sect; /* "real" sectors per track */
600 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
601 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
602
baf08f0b
BZ
603 /* delay this long before sending packet command */
604 u8 pc_delay;
605
1da177e4
LT
606 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
607 unsigned int cyl; /* "real" number of cyls */
26bcb879 608 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
609 unsigned int failures; /* current failure count */
610 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 611 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
612
613 u64 capacity64; /* total number of sectors */
614
615 int lun; /* logical unit */
616 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
617
618 unsigned long debug_mask; /* debugging levels switch */
619
e3a59b4d
HR
620#ifdef CONFIG_BLK_DEV_IDEACPI
621 struct ide_acpi_drive_link *acpidata;
622#endif
1da177e4
LT
623 struct list_head list;
624 struct device gendev;
f36d4024 625 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 626
2b9efba4
BZ
627 /* current packet command */
628 struct ide_atapi_pc *pc;
629
5e2040fd
BZ
630 /* last failed packet command */
631 struct ide_atapi_pc *failed_pc;
632
d7c26ebb 633 /* callback for packet commands */
03a2faae 634 int (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 635
85e39035
BZ
636 void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *);
637 int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *,
638 unsigned int, int);
639
d6251d44
BP
640 ide_startstop_t (*irq_handler)(struct ide_drive_s *);
641
3b8ac539 642 unsigned long atapi_flags;
67c56364
BZ
643
644 struct ide_atapi_pc request_sense_pc;
645 struct request request_sense_rq;
d7c26ebb
BP
646};
647
648typedef struct ide_drive_s ide_drive_t;
1da177e4 649
5aeddf90
BP
650#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
651
652#define to_ide_drv(obj, cont_type) \
8fed4368 653 container_of(obj, struct cont_type, dev)
5aeddf90
BP
654
655#define ide_drv_g(disk, cont_type) \
656 container_of((disk)->private_data, struct cont_type, driver)
8604affd 657
039788e1 658struct ide_port_info;
1da177e4 659
374e042c
BZ
660struct ide_tp_ops {
661 void (*exec_command)(struct hwif_s *, u8);
662 u8 (*read_status)(struct hwif_s *);
663 u8 (*read_altstatus)(struct hwif_s *);
374e042c
BZ
664
665 void (*set_irq)(struct hwif_s *, int);
666
22aa4b32
BZ
667 void (*tf_load)(ide_drive_t *, struct ide_cmd *);
668 void (*tf_read)(ide_drive_t *, struct ide_cmd *);
374e042c 669
adb1af98
BZ
670 void (*input_data)(ide_drive_t *, struct ide_cmd *,
671 void *, unsigned int);
672 void (*output_data)(ide_drive_t *, struct ide_cmd *,
673 void *, unsigned int);
374e042c
BZ
674};
675
676extern const struct ide_tp_ops default_tp_ops;
677
39b986a6
BZ
678/**
679 * struct ide_port_ops - IDE port operations
680 *
681 * @init_dev: host specific initialization of a device
682 * @set_pio_mode: routine to program host for PIO mode
683 * @set_dma_mode: routine to program host for DMA mode
684 * @selectproc: tweaks hardware to select drive
685 * @reset_poll: chipset polling based on hba specifics
686 * @pre_reset: chipset specific changes to default for device-hba resets
687 * @resetproc: routine to reset controller after a disk reset
688 * @maskproc: special host masking for drive selection
689 * @quirkproc: check host's drive quirk list
bfa7d8e5 690 * @clear_irq: clear IRQ
39b986a6
BZ
691 *
692 * @mdma_filter: filter MDMA modes
693 * @udma_filter: filter UDMA modes
694 *
695 * @cable_detect: detect cable type
696 */
ac95beed 697struct ide_port_ops {
e6d95bd1 698 void (*init_dev)(ide_drive_t *);
ac95beed 699 void (*set_pio_mode)(ide_drive_t *, const u8);
ac95beed 700 void (*set_dma_mode)(ide_drive_t *, const u8);
ac95beed 701 void (*selectproc)(ide_drive_t *);
ac95beed 702 int (*reset_poll)(ide_drive_t *);
ac95beed 703 void (*pre_reset)(ide_drive_t *);
ac95beed 704 void (*resetproc)(ide_drive_t *);
ac95beed 705 void (*maskproc)(ide_drive_t *, int);
ac95beed 706 void (*quirkproc)(ide_drive_t *);
bfa7d8e5 707 void (*clear_irq)(ide_drive_t *);
ac95beed
BZ
708
709 u8 (*mdma_filter)(ide_drive_t *);
710 u8 (*udma_filter)(ide_drive_t *);
711
712 u8 (*cable_detect)(struct hwif_s *);
713};
714
5e37bdc0
BZ
715struct ide_dma_ops {
716 void (*dma_host_set)(struct ide_drive_s *, int);
717 int (*dma_setup)(struct ide_drive_s *);
718 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
719 void (*dma_start)(struct ide_drive_s *);
720 int (*dma_end)(struct ide_drive_s *);
721 int (*dma_test_irq)(struct ide_drive_s *);
722 void (*dma_lost_irq)(struct ide_drive_s *);
723 void (*dma_timeout)(struct ide_drive_s *);
592b5315
SS
724 /*
725 * The following method is optional and only required to be
726 * implemented for the SFF-8038i compatible controllers.
727 */
728 u8 (*dma_sff_read_status)(struct hwif_s *);
5e37bdc0
BZ
729};
730
08da591e
BZ
731struct ide_host;
732
1da177e4 733typedef struct hwif_s {
1da177e4 734 struct hwif_s *mate; /* other hwif from same PCI chip */
1da177e4
LT
735 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
736
08da591e
BZ
737 struct ide_host *host;
738
1da177e4
LT
739 char name[6]; /* name of interface, eg. "ide0" */
740
4c3032d8
BZ
741 struct ide_io_ports io_ports;
742
1da177e4 743 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 744
2bd24a1c 745 ide_drive_t *devices[MAX_DRIVES + 1];
1da177e4
LT
746
747 u8 major; /* our major number */
748 u8 index; /* 0 for ide0; 1 for ide1; ... */
749 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 750
e95d9c6b 751 u32 host_flags;
6a824c92 752
4099d143
BZ
753 u8 pio_mask;
754
1da177e4
LT
755 u8 ultra_mask;
756 u8 mwdma_mask;
757 u8 swdma_mask;
758
49521f97
BZ
759 u8 cbl; /* cable type */
760
1da177e4
LT
761 hwif_chipset_t chipset; /* sub-module for tuning.. */
762
36501650
BZ
763 struct device *dev;
764
18e181fe
BZ
765 ide_ack_intr_t *ack_intr;
766
1da177e4
LT
767 void (*rw_disk)(ide_drive_t *, struct request *);
768
374e042c 769 const struct ide_tp_ops *tp_ops;
ac95beed 770 const struct ide_port_ops *port_ops;
f37afdac 771 const struct ide_dma_ops *dma_ops;
bfa14b42 772
1da177e4
LT
773 /* dma physical region descriptor table (cpu view) */
774 unsigned int *dmatable_cpu;
775 /* dma physical region descriptor table (dma view) */
776 dma_addr_t dmatable_dma;
2bbd57ca
BZ
777
778 /* maximum number of PRD table entries */
779 int prd_max_nents;
780 /* PRD entry size in bytes */
781 int prd_ent_size;
782
1da177e4
LT
783 /* Scatter-gather list used to build the above */
784 struct scatterlist *sg_table;
785 int sg_max_nents; /* Maximum number of entries in it */
1da177e4 786
22aa4b32 787 struct ide_cmd cmd; /* current command */
d6ff9f64 788
1da177e4
LT
789 int rqsize; /* max sectors per request */
790 int irq; /* our irq number */
791
1da177e4 792 unsigned long dma_base; /* base addr for dma ports */
1da177e4 793
1da177e4
LT
794 unsigned long config_data; /* for use by chipset-specific code */
795 unsigned long select_data; /* for use by chipset-specific code */
796
020e322d
SS
797 unsigned long extra_base; /* extra addr for dma ports */
798 unsigned extra_ports; /* number of extra dma ports */
799
1da177e4 800 unsigned present : 1; /* this interface exists */
5b31f855 801 unsigned busy : 1; /* serializes devices on a port */
1da177e4 802
f74c9141
BZ
803 struct device gendev;
804 struct device *portdev;
805
f36d4024 806 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
807
808 void *hwif_data; /* extra hwif data */
809
e3a59b4d
HR
810#ifdef CONFIG_BLK_DEV_IDEACPI
811 struct ide_acpi_hwif_link *acpidata;
812#endif
b65fac32
BZ
813
814 /* IRQ handler, if active */
815 ide_startstop_t (*handler)(ide_drive_t *);
816
817 /* BOOL: polling active & poll_timeout field valid */
818 unsigned int polling : 1;
819
820 /* current drive */
821 ide_drive_t *cur_dev;
822
823 /* current request */
824 struct request *rq;
825
826 /* failsafe timer */
827 struct timer_list timer;
828 /* timeout value during long polls */
829 unsigned long poll_timeout;
830 /* queried upon timeouts */
831 int (*expiry)(ide_drive_t *);
832
833 int req_gen;
834 int req_gen_timer;
835
836 spinlock_t lock;
22fc6ecc 837} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 838
a36223b0
BZ
839#define MAX_HOST_PORTS 4
840
48c3c107 841struct ide_host {
2bd24a1c 842 ide_hwif_t *ports[MAX_HOST_PORTS + 1];
48c3c107 843 unsigned int n_ports;
6cdf6eb3 844 struct device *dev[2];
e354c1d8 845
2ed0ef54 846 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
847
848 void (*get_lock)(irq_handler_t, void *);
849 void (*release_lock)(void);
850
849d7130 851 irq_handler_t irq_handler;
e354c1d8 852
ef0b0427 853 unsigned long host_flags;
255115fb
BZ
854
855 int irq_flags;
856
6cdf6eb3 857 void *host_priv;
bd53cbcc 858 ide_hwif_t *cur_port; /* for hosts requiring serialization */
5b31f855
BZ
859
860 /* used for hosts requiring serialization */
e720b9e4 861 volatile unsigned long host_busy;
48c3c107
BZ
862};
863
5b31f855
BZ
864#define IDE_HOST_BUSY 0
865
1da177e4
LT
866/*
867 * internal ide interrupt handler type
868 */
1da177e4
LT
869typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
870typedef int (ide_expiry_t)(ide_drive_t *);
871
0eea6458 872/* used by ide-cd, ide-floppy, etc. */
adb1af98 873typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned);
0eea6458 874
f9383c42 875extern struct mutex ide_setting_mtx;
1da177e4 876
92f1f8fd
EO
877/*
878 * configurable drive settings
879 */
880
881#define DS_SYNC (1 << 0)
882
883struct ide_devset {
884 int (*get)(ide_drive_t *);
885 int (*set)(ide_drive_t *, int);
886 unsigned int flags;
887};
888
889#define __DEVSET(_flags, _get, _set) { \
890 .flags = _flags, \
891 .get = _get, \
892 .set = _set, \
893}
7662d046 894
8185d5aa 895#define ide_devset_get(name, field) \
92f1f8fd 896static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
897{ \
898 return drive->field; \
899}
900
901#define ide_devset_set(name, field) \
92f1f8fd 902static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
903{ \
904 drive->field = arg; \
905 return 0; \
906}
907
97100fc8
BZ
908#define ide_devset_get_flag(name, flag) \
909static int get_##name(ide_drive_t *drive) \
910{ \
911 return !!(drive->dev_flags & flag); \
912}
913
914#define ide_devset_set_flag(name, flag) \
915static int set_##name(ide_drive_t *drive, int arg) \
916{ \
917 if (arg) \
918 drive->dev_flags |= flag; \
919 else \
920 drive->dev_flags &= ~flag; \
921 return 0; \
922}
923
92f1f8fd
EO
924#define __IDE_DEVSET(_name, _flags, _get, _set) \
925const struct ide_devset ide_devset_##_name = \
926 __DEVSET(_flags, _get, _set)
927
928#define IDE_DEVSET(_name, _flags, _get, _set) \
929static __IDE_DEVSET(_name, _flags, _get, _set)
930
931#define ide_devset_rw(_name, _func) \
932IDE_DEVSET(_name, 0, get_##_func, set_##_func)
933
934#define ide_devset_w(_name, _func) \
935IDE_DEVSET(_name, 0, NULL, set_##_func)
936
f8790489
BZ
937#define ide_ext_devset_rw(_name, _func) \
938__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
939
940#define ide_ext_devset_rw_sync(_name, _func) \
941__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
92f1f8fd
EO
942
943#define ide_decl_devset(_name) \
944extern const struct ide_devset ide_devset_##_name
945
946ide_decl_devset(io_32bit);
947ide_decl_devset(keepsettings);
948ide_decl_devset(pio_mode);
949ide_decl_devset(unmaskirq);
950ide_decl_devset(using_dma);
951
7662d046 952#ifdef CONFIG_IDE_PROC_FS
1da177e4 953/*
92f1f8fd 954 * /proc/ide interface
1da177e4
LT
955 */
956
92f1f8fd
EO
957#define ide_devset_rw_field(_name, _field) \
958ide_devset_get(_name, _field); \
959ide_devset_set(_name, _field); \
960IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
961
97100fc8
BZ
962#define ide_devset_rw_flag(_name, _field) \
963ide_devset_get_flag(_name, _field); \
964ide_devset_set_flag(_name, _field); \
965IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
966
92f1f8fd
EO
967struct ide_proc_devset {
968 const char *name;
969 const struct ide_devset *setting;
970 int min, max;
971 int (*mulf)(ide_drive_t *);
972 int (*divf)(ide_drive_t *);
8185d5aa
BZ
973};
974
92f1f8fd
EO
975#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
976 .name = __stringify(_name), \
977 .setting = &ide_devset_##_name, \
978 .min = _min, \
979 .max = _max, \
980 .mulf = _mulf, \
981 .divf = _divf, \
8185d5aa
BZ
982}
983
92f1f8fd
EO
984#define IDE_PROC_DEVSET(_name, _min, _max) \
985__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 986
1da177e4
LT
987typedef struct {
988 const char *name;
989 mode_t mode;
990 read_proc_t *read_proc;
991 write_proc_t *write_proc;
992} ide_proc_entry_t;
993
ecfd80e4
BZ
994void proc_ide_create(void);
995void proc_ide_destroy(void);
5cbf79cd 996void ide_proc_register_port(ide_hwif_t *);
d9270a3f 997void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 998void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 999void ide_proc_unregister_port(ide_hwif_t *);
7f3c868b
BZ
1000void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
1001void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
7662d046 1002
1da177e4
LT
1003read_proc_t proc_ide_read_capacity;
1004read_proc_t proc_ide_read_geometry;
1005
1da177e4
LT
1006/*
1007 * Standard exit stuff:
1008 */
1009#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
1010{ \
1011 len -= off; \
1012 if (len < count) { \
1013 *eof = 1; \
1014 if (len <= 0) \
1015 return 0; \
1016 } else \
1017 len = count; \
1018 *start = page + off; \
1019 return len; \
1020}
1021#else
ecfd80e4
BZ
1022static inline void proc_ide_create(void) { ; }
1023static inline void proc_ide_destroy(void) { ; }
5cbf79cd 1024static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 1025static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 1026static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 1027static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7f3c868b
BZ
1028static inline void ide_proc_register_driver(ide_drive_t *drive,
1029 struct ide_driver *driver) { ; }
1030static inline void ide_proc_unregister_driver(ide_drive_t *drive,
1031 struct ide_driver *driver) { ; }
1da177e4
LT
1032#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
1033#endif
1034
e1c7c464
BP
1035enum {
1036 /* enter/exit functions */
1037 IDE_DBG_FUNC = (1 << 0),
1038 /* sense key/asc handling */
1039 IDE_DBG_SENSE = (1 << 1),
1040 /* packet commands handling */
1041 IDE_DBG_PC = (1 << 2),
1042 /* request handling */
1043 IDE_DBG_RQ = (1 << 3),
1044 /* driver probing/setup */
1045 IDE_DBG_PROBE = (1 << 4),
1046};
1047
1048/* DRV_NAME has to be defined in the driver before using the macro below */
088b1b88
BP
1049#define __ide_debug_log(lvl, fmt, args...) \
1050{ \
1051 if (unlikely(drive->debug_mask & lvl)) \
1052 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \
1053 __func__, ## args); \
e1c7c464
BP
1054}
1055
1da177e4 1056/*
0d346ba0 1057 * Power Management state machine (rq->pm->pm_step).
1da177e4 1058 *
0d346ba0 1059 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
1060 * This can return:
1061 * - ide_stopped : In this case, the core calls us back again unless
1062 * step have been set to ide_power_state_completed.
1063 * - ide_started : In this case, the channel is left busy until an
1064 * async event (interrupt) occurs.
0d346ba0 1065 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
1066 * do_rw_taskfile().
1067 *
0d346ba0 1068 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
1069 * with the error code if any. This routine should update the step value
1070 * and return. It should not start a new request. The core will call
0d346ba0
BZ
1071 * ide_start_power_step() for the new step value, unless step have been
1072 * set to IDE_PM_COMPLETED.
1da177e4 1073 */
1da177e4 1074enum {
0d346ba0
BZ
1075 IDE_PM_START_SUSPEND,
1076 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1077 IDE_PM_STANDBY,
1078
1079 IDE_PM_START_RESUME,
1080 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1081 IDE_PM_IDLE,
1082 IDE_PM_RESTORE_DMA,
1083
1084 IDE_PM_COMPLETED,
1da177e4
LT
1085};
1086
e2984c62
BZ
1087int generic_ide_suspend(struct device *, pm_message_t);
1088int generic_ide_resume(struct device *);
1089
1090void ide_complete_power_step(ide_drive_t *, struct request *);
1091ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
3616b653 1092void ide_complete_pm_rq(ide_drive_t *, struct request *);
e2984c62
BZ
1093void ide_check_pm_state(ide_drive_t *, struct request *);
1094
1da177e4
LT
1095/*
1096 * Subdrivers support.
4ef3b8f4
LR
1097 *
1098 * The gendriver.owner field should be set to the module owner of this driver.
1099 * The gendriver.name field should be set to the name of this driver
1da177e4 1100 */
7f3c868b 1101struct ide_driver {
1da177e4 1102 const char *version;
1da177e4 1103 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1da177e4 1104 struct device_driver gen_driver;
4031bbe4
RK
1105 int (*probe)(ide_drive_t *);
1106 void (*remove)(ide_drive_t *);
0d2157f7 1107 void (*resume)(ide_drive_t *);
4031bbe4 1108 void (*shutdown)(ide_drive_t *);
7662d046 1109#ifdef CONFIG_IDE_PROC_FS
79cb3803
BZ
1110 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1111 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
7662d046
BZ
1112#endif
1113};
1da177e4 1114
7f3c868b 1115#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
4031bbe4 1116
08da591e
BZ
1117int ide_device_get(ide_drive_t *);
1118void ide_device_put(ide_drive_t *);
1119
aa768773
BZ
1120struct ide_ioctl_devset {
1121 unsigned int get_ioctl;
1122 unsigned int set_ioctl;
92f1f8fd 1123 const struct ide_devset *setting;
aa768773
BZ
1124};
1125
1126int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1127 unsigned long, const struct ide_ioctl_devset *);
1128
1bddd9e6 1129int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1da177e4 1130
ebae41a5
BZ
1131extern int ide_vlb_clk;
1132extern int ide_pci_clk;
1133
327fa1c2
BZ
1134int ide_end_request(ide_drive_t *, int, int);
1135int ide_end_dequeued_request(ide_drive_t *, struct request *, int, int);
1136void ide_kill_rq(ide_drive_t *, struct request *);
1137
1138void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int,
1139 ide_expiry_t *);
1140void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int,
1141 ide_expiry_t *);
1da177e4 1142
cd2a2d96
BZ
1143void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
1144 ide_expiry_t *);
1da177e4 1145
1fc14258
BZ
1146void ide_execute_pkt_cmd(ide_drive_t *);
1147
9f87abe8
BZ
1148void ide_pad_transfer(ide_drive_t *, int, int);
1149
9892ec54 1150ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
1da177e4 1151
4dde4492 1152void ide_fix_driveid(u16 *);
01745112 1153
1da177e4
LT
1154extern void ide_fixstring(u8 *, const int, const int);
1155
b163f46d
BZ
1156int ide_busy_sleep(ide_hwif_t *, unsigned long, int);
1157
74af21cf 1158int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1159
c4e66c36 1160ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
11938c92 1161ide_startstop_t ide_do_devset(ide_drive_t *, struct request *);
c4e66c36 1162
1da177e4
LT
1163extern ide_startstop_t ide_do_reset (ide_drive_t *);
1164
92f1f8fd
EO
1165extern int ide_devset_execute(ide_drive_t *drive,
1166 const struct ide_devset *setting, int arg);
1167
22aa4b32 1168void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8);
a09485df 1169void ide_complete_rq(ide_drive_t *, u8);
1da177e4 1170
089c5c7e 1171void ide_tf_dump(const char *, struct ide_taskfile *);
1da177e4 1172
374e042c
BZ
1173void ide_exec_command(ide_hwif_t *, u8);
1174u8 ide_read_status(ide_hwif_t *);
1175u8 ide_read_altstatus(ide_hwif_t *);
374e042c
BZ
1176
1177void ide_set_irq(ide_hwif_t *, int);
1178
22aa4b32
BZ
1179void ide_tf_load(ide_drive_t *, struct ide_cmd *);
1180void ide_tf_read(ide_drive_t *, struct ide_cmd *);
374e042c 1181
adb1af98
BZ
1182void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1183void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
374e042c 1184
acaa0f5f
BZ
1185int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int);
1186
1da177e4 1187extern void SELECT_DRIVE(ide_drive_t *);
ed4af48f 1188void SELECT_MASK(ide_drive_t *, int);
1da177e4 1189
92eb4380 1190u8 ide_read_error(ide_drive_t *);
1823649b 1191void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1192
51509eec
BZ
1193int ide_check_atapi_device(ide_drive_t *, const char *);
1194
7bf7420a
BZ
1195void ide_init_pc(struct ide_atapi_pc *);
1196
4abdc6ee
EO
1197/* Disk head parking */
1198extern wait_queue_head_t ide_park_wq;
1199ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1200 char *buf);
1201ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1202 const char *buf, size_t len);
1203
7645c151
BZ
1204/*
1205 * Special requests for ide-tape block device strategy routine.
1206 *
1207 * In order to service a character device command, we add special requests to
1208 * the tail of our block device request queue and wait for their completion.
1209 */
1210enum {
1211 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1212 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1213 REQ_IDETAPE_READ = (1 << 2),
1214 REQ_IDETAPE_WRITE = (1 << 3),
1215};
1216
2ac07d92 1217int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
7645c151 1218
de699ad5 1219int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1220int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1221int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b
BZ
1222void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1223void ide_retry_pc(ide_drive_t *, struct gendisk *);
0578042d 1224
4cad085e 1225int ide_cd_expiry(ide_drive_t *);
844b9468 1226
392de1d5
BP
1227int ide_cd_get_xferlen(struct request *);
1228
28ad91db 1229ide_startstop_t ide_issue_pc(ide_drive_t *);
594c16d8 1230
22aa4b32 1231ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *);
1da177e4 1232
adb1af98 1233void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8);
4d7a984b 1234
22aa4b32
BZ
1235int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16);
1236int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *);
9a3c49be 1237
22aa4b32 1238int ide_taskfile_ioctl(ide_drive_t *, unsigned long);
1da177e4 1239
2ebe1d9e
BZ
1240int ide_dev_read_id(ide_drive_t *, u8, u16 *);
1241
1da177e4 1242extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1243extern int ide_config_drive_speed(ide_drive_t *, u8);
1244extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1245extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1246
1247extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1248
1da177e4
LT
1249extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1250
1da177e4 1251extern void ide_timer_expiry(unsigned long);
7d12e780 1252extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1253extern void do_ide_request(struct request_queue *);
1da177e4
LT
1254
1255void ide_init_disk(struct gendisk *, ide_drive_t *);
1256
6d208b39 1257#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1258extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1259#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1260#else
1261#define ide_pci_register_driver(d) pci_register_driver(d)
1262#endif
1263
6636487e
BZ
1264static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1265{
1266 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1267 return 1;
1268 return 0;
1269}
1270
86ccf37c 1271void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *,
48c3c107 1272 hw_regs_t *, hw_regs_t **);
85620436 1273void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1274
8e882ba1 1275#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1276int ide_pci_set_master(struct pci_dev *, const char *);
1277unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1278int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1279int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1280#else
b123f56e
BZ
1281static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1282 const struct ide_port_info *d)
1283{
1284 return -EINVAL;
1285}
c413b9b9
BZ
1286#endif
1287
c0ae5023 1288struct ide_pci_enablebit {
1da177e4
LT
1289 u8 reg; /* byte pci reg holding the enable-bit */
1290 u8 mask; /* mask to isolate the enable-bit */
1291 u8 val; /* value of masked reg when "enabled" */
c0ae5023 1292};
1da177e4
LT
1293
1294enum {
1295 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1296 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1297 /* single port device */
a5d8c5c8 1298 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1299 /* don't use legacy PIO blacklist */
1300 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1301 /* set for the second port of QD65xx */
1302 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1303 /* use PIO8/9 for prefetch off/on */
1304 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1305 /* use PIO6/7 for fast-devsel off/on */
1306 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1307 /* use 100-102 and 200-202 PIO values to set DMA modes */
1308 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1309 /*
1310 * keep DMA setting when programming PIO mode, may be used only
1311 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1312 */
1313 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1314 /* program host for the transfer mode after programming device */
1315 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1316 /* don't program host/device for the transfer mode ("smart" hosts) */
1317 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1318 /* trust BIOS for programming chipset/device for DMA */
1319 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1320 /* host is CS5510/CS5520 */
1321 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1322 /* ATAPI DMA is unsupported */
1323 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1324 /* set if host is a "non-bootable" controller */
1325 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1326 /* host doesn't support DMA */
1327 IDE_HFLAG_NO_DMA = (1 << 14),
1328 /* check if host is PCI IDE device before allowing DMA */
1329 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1330 /* host uses MMIO */
1331 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1332 /* no LBA48 */
1333 IDE_HFLAG_NO_LBA48 = (1 << 17),
1334 /* no LBA48 DMA */
1335 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1336 /* data FIFO is cleared by an error */
1337 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1338 /* serialize ports */
1339 IDE_HFLAG_SERIALIZE = (1 << 20),
2787cb8a
BZ
1340 /* host is DTC2278 */
1341 IDE_HFLAG_DTC2278 = (1 << 21),
c094ea07
BZ
1342 /* 4 devices on a single set of I/O ports */
1343 IDE_HFLAG_4DRIVES = (1 << 22),
1f66019b
BZ
1344 /* host is TRM290 */
1345 IDE_HFLAG_TRM290 = (1 << 23),
caea7602
BZ
1346 /* use 32-bit I/O ops */
1347 IDE_HFLAG_IO_32BIT = (1 << 24),
1348 /* unmask IRQs */
1349 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
6636487e 1350 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
1fd18905
BZ
1351 /* serialize ports if DMA is possible (for sl82c105) */
1352 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1353 /* force host out of "simplex" mode */
1354 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1355 /* DSC overlap is unsupported */
1356 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1357 /* never use 32-bit I/O ops */
1358 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1359 /* never unmask IRQs */
1360 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1361};
1362
7cab14a7 1363#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1364# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1365#else
1366# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1367#endif
1368
039788e1 1369struct ide_port_info {
1da177e4 1370 char *name;
e354c1d8 1371
2ed0ef54 1372 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
1373
1374 void (*get_lock)(irq_handler_t, void *);
1375 void (*release_lock)(void);
1376
1da177e4
LT
1377 void (*init_iops)(ide_hwif_t *);
1378 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1379 int (*init_dma)(ide_hwif_t *,
1380 const struct ide_port_info *);
ac95beed 1381
374e042c 1382 const struct ide_tp_ops *tp_ops;
ac95beed 1383 const struct ide_port_ops *port_ops;
f37afdac 1384 const struct ide_dma_ops *dma_ops;
ac95beed 1385
c0ae5023
BZ
1386 struct ide_pci_enablebit enablebits[2];
1387
528a572d 1388 hwif_chipset_t chipset;
6b492496
BZ
1389
1390 u16 max_sectors; /* if < than the default one */
1391
9ffcf364 1392 u32 host_flags;
255115fb
BZ
1393
1394 int irq_flags;
1395
4099d143 1396 u8 pio_mask;
5f8b6c34
BZ
1397 u8 swdma_mask;
1398 u8 mwdma_mask;
18137207 1399 u8 udma_mask;
039788e1 1400};
1da177e4 1401
6cdf6eb3
BZ
1402int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1403int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1404 const struct ide_port_info *, void *);
ef0b0427 1405void ide_pci_remove(struct pci_dev *);
1da177e4 1406
feb22b7f
BZ
1407#ifdef CONFIG_PM
1408int ide_pci_suspend(struct pci_dev *, pm_message_t);
1409int ide_pci_resume(struct pci_dev *);
1410#else
1411#define ide_pci_suspend NULL
1412#define ide_pci_resume NULL
1413#endif
1414
1da177e4 1415void ide_map_sg(ide_drive_t *, struct request *);
b6308ee0 1416void ide_init_sg_cmd(struct ide_cmd *, int);
1da177e4
LT
1417
1418#define BAD_DMA_DRIVE 0
1419#define GOOD_DMA_DRIVE 1
1420
65e5f2e3
JC
1421struct drive_list_entry {
1422 const char *id_model;
1423 const char *id_firmware;
1424};
1425
4dde4492 1426int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1427
1428#ifdef CONFIG_BLK_DEV_IDEDMA
2dbe7e91 1429int ide_dma_good_drive(ide_drive_t *);
1da177e4 1430int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1431int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1432
1433u8 ide_find_dma_mode(ide_drive_t *, u8);
1434
1435static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1436{
1437 return ide_find_dma_mode(drive, XFER_UDMA_6);
1438}
1439
4a546e04 1440void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1441void ide_dma_off(ide_drive_t *);
4a546e04 1442void ide_dma_on(ide_drive_t *);
3608b5d7 1443int ide_set_dma(ide_drive_t *);
578cfa0d 1444void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1445ide_startstop_t ide_dma_intr(ide_drive_t *);
1446
2bbd57ca
BZ
1447int ide_allocate_dma_engine(ide_hwif_t *);
1448void ide_release_dma_engine(ide_hwif_t *);
1449
062f9f02
BZ
1450int ide_build_sglist(ide_drive_t *, struct request *);
1451void ide_destroy_dmatable(ide_drive_t *);
1452
8e882ba1 1453#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
2dbe7e91 1454int config_drive_for_dma(ide_drive_t *);
1da177e4 1455extern int ide_build_dmatable(ide_drive_t *, struct request *);
15ce926a 1456void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1457extern int ide_dma_setup(ide_drive_t *);
f37afdac 1458void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4 1459extern void ide_dma_start(ide_drive_t *);
653bcf52 1460int ide_dma_end(ide_drive_t *);
f37afdac 1461int ide_dma_test_irq(ide_drive_t *);
592b5315 1462u8 ide_dma_sff_read_status(ide_hwif_t *);
71fc9fcc 1463extern const struct ide_dma_ops sff_dma_ops;
2dbe7e91
BZ
1464#else
1465static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
8e882ba1 1466#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4 1467
de23ec9c 1468void ide_dma_lost_irq(ide_drive_t *);
ffa15a69 1469void ide_dma_timeout(ide_drive_t *);
65ca5377 1470ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
de23ec9c 1471
1da177e4 1472#else
3ab7efe8 1473static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1474static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1475static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1476static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1477static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1478static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1479static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1480static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1481static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
65ca5377 1482static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; }
0d1bad21 1483static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
e6830a86
BZ
1484static inline int ide_build_sglist(ide_drive_t *drive,
1485 struct request *rq) { return 0; }
2bbd57ca 1486#endif /* CONFIG_BLK_DEV_IDEDMA */
1da177e4 1487
e3a59b4d 1488#ifdef CONFIG_BLK_DEV_IDEACPI
8b803bd1 1489int ide_acpi_init(void);
e3a59b4d
HR
1490extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1491extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1492extern void ide_acpi_push_timing(ide_hwif_t *hwif);
8b803bd1 1493void ide_acpi_init_port(ide_hwif_t *);
eafd88a3 1494void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1495extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d 1496#else
8b803bd1 1497static inline int ide_acpi_init(void) { return 0; }
e3a59b4d
HR
1498static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1499static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1500static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
8b803bd1 1501static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; }
eafd88a3 1502static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1503static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1504#endif
1505
1da177e4
LT
1506void ide_register_region(struct gendisk *);
1507void ide_unregister_region(struct gendisk *);
1508
f01393e4 1509void ide_undecoded_slave(ide_drive_t *);
1da177e4 1510
9fd91d95 1511void ide_port_apply_params(ide_hwif_t *);
ebdab07d 1512int ide_sysfs_register_port(ide_hwif_t *);
9fd91d95 1513
48c3c107 1514struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **);
8a69580e 1515void ide_host_free(struct ide_host *);
48c3c107
BZ
1516int ide_host_register(struct ide_host *, const struct ide_port_info *,
1517 hw_regs_t **);
6f904d01
BZ
1518int ide_host_add(const struct ide_port_info *, hw_regs_t **,
1519 struct ide_host **);
48c3c107 1520void ide_host_remove(struct ide_host *);
0bfeee7d 1521int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1522void ide_port_unregister_devices(ide_hwif_t *);
1523void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1524
1525static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1526{
1527 return hwif->hwif_data;
1528}
1529
1530static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1531{
1532 hwif->hwif_data = data;
1533}
1534
1da177e4 1535extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1da177e4 1536
a501633c 1537u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1538u8 ide_dump_status(ide_drive_t *, const char *, u8);
1539
3be53f3f
BZ
1540struct ide_timing {
1541 u8 mode;
1542 u8 setup; /* t1 */
1543 u16 act8b; /* t2 for 8-bit io */
1544 u16 rec8b; /* t2i for 8-bit io */
1545 u16 cyc8b; /* t0 for 8-bit io */
1546 u16 active; /* t2 or tD */
1547 u16 recover; /* t2i or tK */
1548 u16 cycle; /* t0 */
1549 u16 udma; /* t2CYCTYP/2 */
1550};
1551
1552enum {
1553 IDE_TIMING_SETUP = (1 << 0),
1554 IDE_TIMING_ACT8B = (1 << 1),
1555 IDE_TIMING_REC8B = (1 << 2),
1556 IDE_TIMING_CYC8B = (1 << 3),
1557 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1558 IDE_TIMING_CYC8B,
1559 IDE_TIMING_ACTIVE = (1 << 4),
1560 IDE_TIMING_RECOVER = (1 << 5),
1561 IDE_TIMING_CYCLE = (1 << 6),
1562 IDE_TIMING_UDMA = (1 << 7),
1563 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1564 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1565 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1566};
1567
f06ab340 1568struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1569u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1570void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1571 struct ide_timing *, unsigned int);
1572int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1573
7eeaaaa5 1574#ifdef CONFIG_IDE_XFER_MODE
9ad54093 1575int ide_scan_pio_blacklist(char *);
7eeaaaa5 1576const char *ide_xfer_verbose(u8);
2134758d 1577u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
88b2b32b
BZ
1578int ide_set_pio_mode(ide_drive_t *, u8);
1579int ide_set_dma_mode(ide_drive_t *, u8);
26bcb879 1580void ide_set_pio(ide_drive_t *, u8);
7eeaaaa5
BZ
1581int ide_set_xfer_rate(ide_drive_t *, u8);
1582#else
1583static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; }
1584static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; }
1585#endif
26bcb879
BZ
1586
1587static inline void ide_set_max_pio(ide_drive_t *drive)
1588{
1589 ide_set_pio(drive, 255);
1590}
1da177e4 1591
ebdab07d
BZ
1592char *ide_media_string(ide_drive_t *);
1593
1594extern struct device_attribute ide_dev_attrs[];
1da177e4 1595extern struct bus_type ide_bus_type;
f74c9141 1596extern struct class *ide_port_class;
1da177e4 1597
7b9f25b5
BZ
1598static inline void ide_dump_identify(u8 *id)
1599{
1600 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1601}
1602
86b37860
CL
1603static inline int hwif_to_node(ide_hwif_t *hwif)
1604{
96f80219 1605 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1606}
1607
7e59ea21 1608static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1609{
5e7f3a46 1610 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
1b678347 1611
97100fc8 1612 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1613}
2bd24a1c
BZ
1614
1615#define ide_port_for_each_dev(i, dev, port) \
1616 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
1617
7ed5b157
BZ
1618#define ide_port_for_each_present_dev(i, dev, port) \
1619 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \
1620 if ((dev)->dev_flags & IDE_DFLAG_PRESENT)
1621
2bd24a1c
BZ
1622#define ide_host_for_each_port(i, port, host) \
1623 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
1624
1da177e4 1625#endif /* _IDE_H */