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Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6
[mirror_ubuntu-artful-kernel.git] / include / linux / ide.h
CommitLineData
1da177e4
LT		 1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT		 9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
12#include <linux/hdsmart.h>
13#include <linux/blkdev.h>
14#include <linux/proc_fs.h>
15#include <linux/interrupt.h>
16#include <linux/bitops.h>
17#include <linux/bio.h>
18#include <linux/device.h>
19#include <linux/pci.h>
f36d4024 20#include <linux/completion.h>
e3a59b4d
HR		 21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT		 24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
27#include <asm/semaphore.h>
28
1da177e4
LT		 29/******************************************************************************
30 * IDE driver configuration options (play with these as desired):
31 *
32 * REALLY_SLOW_IO can be defined in ide.c and ide-cd.c, if necessary
33 */
34#define INITIAL_MULT_COUNT 0 /* off=0; on=2,4,8,16,32, etc.. */
35
36#ifndef SUPPORT_SLOW_DATA_PORTS /* 1 to support slow data ports */
37#define SUPPORT_SLOW_DATA_PORTS 1 /* 0 to reduce kernel size */
38#endif
39#ifndef SUPPORT_VLB_SYNC /* 1 to support weird 32-bit chips */
40#define SUPPORT_VLB_SYNC 1 /* 0 to reduce kernel size */
41#endif
42#ifndef OK_TO_RESET_CONTROLLER /* 1 needed for good error recovery */
43#define OK_TO_RESET_CONTROLLER 1 /* 0 for use with AH2372A/B interface */
44#endif
45
46#ifndef DISABLE_IRQ_NOSYNC
47#define DISABLE_IRQ_NOSYNC 0
48#endif
49
50/*
51 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
52 * number.
53 */
54
55#define IDE_NO_IRQ (-1)
56
57/*
58 * "No user-serviceable parts" beyond this point :)
59 *****************************************************************************/
60
61typedef unsigned char byte; /* used everywhere */
62
63/*
64 * Probably not wise to fiddle with these
65 */
66#define ERROR_MAX 8 /* Max read/write errors per sector */
67#define ERROR_RESET 3 /* Reset controller every 4th retry */
68#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
69
70/*
71 * Tune flags
72 */
73#define IDE_TUNE_NOAUTO 2
74#define IDE_TUNE_AUTO 1
75#define IDE_TUNE_DEFAULT 0
76
77/*
78 * state flags
79 */
80
81#define DMA_PIO_RETRY 1 /* retrying in PIO */
82
83#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
84#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
85
86/*
87 * Definitions for accessing IDE controller registers
88 */
89#define IDE_NR_PORTS (10)
90
91#define IDE_DATA_OFFSET (0)
92#define IDE_ERROR_OFFSET (1)
93#define IDE_NSECTOR_OFFSET (2)
94#define IDE_SECTOR_OFFSET (3)
95#define IDE_LCYL_OFFSET (4)
96#define IDE_HCYL_OFFSET (5)
97#define IDE_SELECT_OFFSET (6)
98#define IDE_STATUS_OFFSET (7)
99#define IDE_CONTROL_OFFSET (8)
100#define IDE_IRQ_OFFSET (9)
101
102#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
103#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
104
105#define IDE_CONTROL_OFFSET_HOB (7)
106
107#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
108#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
109#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
110#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
111#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
112#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
113#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
114#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
115#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
116#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
117
118#define IDE_FEATURE_REG IDE_ERROR_REG
119#define IDE_COMMAND_REG IDE_STATUS_REG
120#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
121#define IDE_IREASON_REG IDE_NSECTOR_REG
122#define IDE_BCOUNTL_REG IDE_LCYL_REG
123#define IDE_BCOUNTH_REG IDE_HCYL_REG
124
125#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
126#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
127#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
128#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
129#define DRIVE_READY (READY_STAT | SEEK_STAT)
130#define DATA_READY (DRQ_STAT)
131
132#define BAD_CRC (ABRT_ERR | ICRC_ERR)
133
134#define SATA_NR_PORTS (3) /* 16 possible ?? */
135
136#define SATA_STATUS_OFFSET (0)
137#define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
138#define SATA_ERROR_OFFSET (1)
139#define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
140#define SATA_CONTROL_OFFSET (2)
141#define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
142
143#define SATA_MISC_OFFSET (0)
144#define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
145#define SATA_PHY_OFFSET (1)
146#define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
147#define SATA_IEN_OFFSET (2)
148#define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
149
150/*
151 * Our Physical Region Descriptor (PRD) table should be large enough
152 * to handle the biggest I/O request we are likely to see. Since requests
153 * can have no more than 256 sectors, and since the typical blocksize is
154 * two or more sectors, we could get by with a limit of 128 entries here for
155 * the usual worst case. Most requests seem to include some contiguous blocks,
156 * further reducing the number of table entries required.
157 *
158 * The driver reverts to PIO mode for individual requests that exceed
159 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
160 * 100% of all crazy scenarios here is not necessary.
161 *
162 * As it turns out though, we must allocate a full 4KB page for this,
163 * so the two PRD tables (ide0 & ide1) will each get half of that,
164 * allowing each to have about 256 entries (8 bytes each) from this.
165 */
166#define PRD_BYTES 8
167#define PRD_ENTRIES 256
168
169/*
170 * Some more useful definitions
171 */
172#define PARTN_BITS 6 /* number of minor dev bits for partitions */
173#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
174#define SECTOR_SIZE 512
175#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
176#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
177
178/*
179 * Timeouts for various operations:
180 */
181#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
182#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
183#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
184#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
185#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
186#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
187
1da177e4
LT		 188/*
189 * Check for an interrupt and acknowledge the interrupt status
190 */
191struct hwif_s;
192typedef int (ide_ack_intr_t)(struct hwif_s *);
193
194#ifndef NO_DMA
195#define NO_DMA 255
196#endif
197
198/*
199 * hwif_chipset_t is used to keep track of the specific hardware
200 * chipset used by each IDE interface, if known.
201 */
202typedef enum { ide_unknown, ide_generic, ide_pci,
203 ide_cmd640, ide_dtc2278, ide_ali14xx,
204 ide_qd65xx, ide_umc8672, ide_ht6560b,
205 ide_rz1000, ide_trm290,
206 ide_cmd646, ide_cy82c693, ide_4drives,
207 ide_pmac, ide_etrax100, ide_acorn,
26a940e2 208 ide_au1xxx, ide_forced
1da177e4
LT		 209} hwif_chipset_t;
210
211/*
212 * Structure to hold all information about the location of this port
213 */
214typedef struct hw_regs_s {
215 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
216 int irq; /* our irq number */
217 int dma; /* our dma entry */
218 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
219 hwif_chipset_t chipset;
4349d5cd 220 struct device *dev;
1da177e4
LT		 221} hw_regs_t;
222
223/*
224 * Register new hardware with ide
225 */
869c56ee
BZ		 226int ide_register_hw(hw_regs_t *, int, struct hwif_s **);
227int ide_register_hw_with_fixup(hw_regs_t *, int, struct hwif_s **,
228 void (*)(struct hwif_s *));
1da177e4
LT		 229
230/*
231 * Set up hw_regs_t structure before calling ide_register_hw (optional)
232 */
233void ide_setup_ports( hw_regs_t *hw,
234 unsigned long base,
235 int *offsets,
236 unsigned long ctrl,
237 unsigned long intr,
238 ide_ack_intr_t *ack_intr,
239#if 0
240 ide_io_ops_t *iops,
241#endif
242 int irq);
243
244static inline void ide_std_init_ports(hw_regs_t *hw,
245 unsigned long io_addr,
246 unsigned long ctl_addr)
247{
248 unsigned int i;
249
250 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
251 hw->io_ports[i] = io_addr++;
252
253 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
254}
255
256#include <asm/ide.h>
257
83d7dbc4
MM		 258#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
259#undef MAX_HWIFS
83ae20c8
BH		 260#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
261#endif
262
1da177e4
LT		 263/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
264#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
265# define ide_default_io_base(index) (0)
266# define ide_default_irq(base) (0)
267# define ide_init_default_irq(base) (0)
268#endif
269
270/*
271 * ide_init_hwif_ports() is OBSOLETE and will be removed in 2.7 series.
272 * New ports shouldn't define IDE_ARCH_OBSOLETE_INIT in <asm/ide.h>.
273 */
274#ifdef IDE_ARCH_OBSOLETE_INIT
275static inline void ide_init_hwif_ports(hw_regs_t *hw,
276 unsigned long io_addr,
277 unsigned long ctl_addr,
278 int *irq)
279{
280 if (!ctl_addr)
281 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
282 else
283 ide_std_init_ports(hw, io_addr, ctl_addr);
284
285 if (irq)
286 *irq = 0;
287
288 hw->io_ports[IDE_IRQ_OFFSET] = 0;
289
290#ifdef CONFIG_PPC32
291 if (ppc_ide_md.ide_init_hwif)
292 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
293#endif
294}
295#else
296static inline void ide_init_hwif_ports(hw_regs_t *hw,
297 unsigned long io_addr,
298 unsigned long ctl_addr,
299 int *irq)
300{
301 if (io_addr || ctl_addr)
302 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
303}
304#endif /* IDE_ARCH_OBSOLETE_INIT */
305
306/* Currently only m68k, apus and m8xx need it */
307#ifndef IDE_ARCH_ACK_INTR
308# define ide_ack_intr(hwif) (1)
309#endif
310
311/* Currently only Atari needs it */
312#ifndef IDE_ARCH_LOCK
313# define ide_release_lock() do {} while (0)
314# define ide_get_lock(hdlr, data) do {} while (0)
315#endif /* IDE_ARCH_LOCK */
316
317/*
318 * Now for the data we need to maintain per-drive: ide_drive_t
319 */
320
321#define ide_scsi 0x21
322#define ide_disk 0x20
323#define ide_optical 0x7
324#define ide_cdrom 0x5
325#define ide_tape 0x1
326#define ide_floppy 0x0
327
328/*
329 * Special Driver Flags
330 *
331 * set_geometry : respecify drive geometry
332 * recalibrate : seek to cyl 0
333 * set_multmode : set multmode count
334 * set_tune : tune interface for drive
335 * serviced : service command
336 * reserved : unused
337 */
338typedef union {
339 unsigned all : 8;
340 struct {
341#if defined(__LITTLE_ENDIAN_BITFIELD)
342 unsigned set_geometry : 1;
343 unsigned recalibrate : 1;
344 unsigned set_multmode : 1;
345 unsigned set_tune : 1;
346 unsigned serviced : 1;
347 unsigned reserved : 3;
348#elif defined(__BIG_ENDIAN_BITFIELD)
349 unsigned reserved : 3;
350 unsigned serviced : 1;
351 unsigned set_tune : 1;
352 unsigned set_multmode : 1;
353 unsigned recalibrate : 1;
354 unsigned set_geometry : 1;
355#else
356#error "Please fix <asm/byteorder.h>"
357#endif
358 } b;
359} special_t;
360
361/*
362 * ATA DATA Register Special.
363 * ATA NSECTOR Count Register().
364 * ATAPI Byte Count Register.
365 * Channel index ordering pairs.
366 */
367typedef union {
368 unsigned all :16;
369 struct {
370#if defined(__LITTLE_ENDIAN_BITFIELD)
371 unsigned low :8; /* LSB */
372 unsigned high :8; /* MSB */
373#elif defined(__BIG_ENDIAN_BITFIELD)
374 unsigned high :8; /* MSB */
375 unsigned low :8; /* LSB */
376#else
377#error "Please fix <asm/byteorder.h>"
378#endif
379 } b;
380} ata_nsector_t, ata_data_t, atapi_bcount_t, ata_index_t;
381
1da177e4
LT		 382/*
383 * ATA-IDE Select Register, aka Device-Head
384 *
385 * head : always zeros here
386 * unit : drive select number: 0/1
387 * bit5 : always 1
388 * lba : using LBA instead of CHS
389 * bit7 : always 1
390 */
391typedef union {
392 unsigned all : 8;
393 struct {
394#if defined(__LITTLE_ENDIAN_BITFIELD)
395 unsigned head : 4;
396 unsigned unit : 1;
397 unsigned bit5 : 1;
398 unsigned lba : 1;
399 unsigned bit7 : 1;
400#elif defined(__BIG_ENDIAN_BITFIELD)
401 unsigned bit7 : 1;
402 unsigned lba : 1;
403 unsigned bit5 : 1;
404 unsigned unit : 1;
405 unsigned head : 4;
406#else
407#error "Please fix <asm/byteorder.h>"
408#endif
409 } b;
410} select_t, ata_select_t;
411
412/*
413 * The ATA-IDE Status Register.
414 * The ATAPI Status Register.
415 *
416 * check : Error occurred
417 * idx : Index Error
418 * corr : Correctable error occurred
419 * drq : Data is request by the device
420 * dsc : Disk Seek Complete : ata
421 * : Media access command finished : atapi
422 * df : Device Fault : ata
423 * : Reserved : atapi
424 * drdy : Ready, Command Mode Capable : ata
425 * : Ignored for ATAPI commands : atapi
426 * bsy : Disk is Busy
427 * : The device has access to the command block
428 */
429typedef union {
430 unsigned all :8;
431 struct {
432#if defined(__LITTLE_ENDIAN_BITFIELD)
433 unsigned check :1;
434 unsigned idx :1;
435 unsigned corr :1;
436 unsigned drq :1;
437 unsigned dsc :1;
438 unsigned df :1;
439 unsigned drdy :1;
440 unsigned bsy :1;
441#elif defined(__BIG_ENDIAN_BITFIELD)
442 unsigned bsy :1;
443 unsigned drdy :1;
444 unsigned df :1;
445 unsigned dsc :1;
446 unsigned drq :1;
447 unsigned corr :1;
448 unsigned idx :1;
449 unsigned check :1;
450#else
451#error "Please fix <asm/byteorder.h>"
452#endif
453 } b;
454} ata_status_t, atapi_status_t;
455
1da177e4
LT		 456/*
457 * ATAPI Feature Register
458 *
459 * dma : Using DMA or PIO
460 * reserved321 : Reserved
461 * reserved654 : Reserved (Tag Type)
462 * reserved7 : Reserved
463 */
464typedef union {
465 unsigned all :8;
466 struct {
467#if defined(__LITTLE_ENDIAN_BITFIELD)
468 unsigned dma :1;
469 unsigned reserved321 :3;
470 unsigned reserved654 :3;
471 unsigned reserved7 :1;
472#elif defined(__BIG_ENDIAN_BITFIELD)
473 unsigned reserved7 :1;
474 unsigned reserved654 :3;
475 unsigned reserved321 :3;
476 unsigned dma :1;
477#else
478#error "Please fix <asm/byteorder.h>"
479#endif
480 } b;
481} atapi_feature_t;
482
483/*
484 * ATAPI Interrupt Reason Register.
485 *
486 * cod : Information transferred is command (1) or data (0)
487 * io : The device requests us to read (1) or write (0)
488 * reserved : Reserved
489 */
490typedef union {
491 unsigned all :8;
492 struct {
493#if defined(__LITTLE_ENDIAN_BITFIELD)
494 unsigned cod :1;
495 unsigned io :1;
496 unsigned reserved :6;
497#elif defined(__BIG_ENDIAN_BITFIELD)
498 unsigned reserved :6;
499 unsigned io :1;
500 unsigned cod :1;
501#else
502#error "Please fix <asm/byteorder.h>"
503#endif
504 } b;
505} atapi_ireason_t;
506
507/*
508 * The ATAPI error register.
509 *
510 * ili : Illegal Length Indication
511 * eom : End Of Media Detected
512 * abrt : Aborted command - As defined by ATA
513 * mcr : Media Change Requested - As defined by ATA
514 * sense_key : Sense key of the last failed packet command
515 */
516typedef union {
517 unsigned all :8;
518 struct {
519#if defined(__LITTLE_ENDIAN_BITFIELD)
520 unsigned ili :1;
521 unsigned eom :1;
522 unsigned abrt :1;
523 unsigned mcr :1;
524 unsigned sense_key :4;
525#elif defined(__BIG_ENDIAN_BITFIELD)
526 unsigned sense_key :4;
527 unsigned mcr :1;
528 unsigned abrt :1;
529 unsigned eom :1;
530 unsigned ili :1;
531#else
532#error "Please fix <asm/byteorder.h>"
533#endif
534 } b;
535} atapi_error_t;
536
1da177e4
LT		 537/*
538 * Status returned from various ide_ functions
539 */
540typedef enum {
541 ide_stopped, /* no drive operation was started */
542 ide_started, /* a drive operation was started, handler was set */
543} ide_startstop_t;
544
545struct ide_driver_s;
546struct ide_settings_s;
547
e3a59b4d
HR		 548#ifdef CONFIG_BLK_DEV_IDEACPI
549struct ide_acpi_drive_link;
550struct ide_acpi_hwif_link;
551#endif
552
1da177e4
LT		 553typedef struct ide_drive_s {
554 char name[4]; /* drive name, such as "hda" */
555 char driver_req[10]; /* requests specific driver */
556
557 request_queue_t *queue; /* request queue */
558
559 struct request *rq; /* current request */
560 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT		 561 void *driver_data; /* extra driver data */
562 struct hd_driveid *id; /* drive model identification info */
7662d046 563#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT		 564 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
565 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 566#endif
1da177e4
LT		 567 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
568
569 unsigned long sleep; /* sleep until this time */
570 unsigned long service_start; /* time we started last request */
571 unsigned long service_time; /* service time of last request */
572 unsigned long timeout; /* max time to wait for irq */
573
574 special_t special; /* special action flags */
575 select_t select; /* basic drive/head select reg value */
576
577 u8 keep_settings; /* restore settings after drive reset */
578 u8 autodma; /* device can safely use dma on host */
579 u8 using_dma; /* disk is using dma for read/write */
580 u8 retry_pio; /* retrying dma capable host in pio */
581 u8 state; /* retry state */
582 u8 waiting_for_dma; /* dma currently in progress */
583 u8 unmask; /* okay to unmask other irqs */
584 u8 bswap; /* byte swap data */
36193484 585 u8 noflush; /* don't attempt flushes */
1da177e4
LT		 586 u8 dsc_overlap; /* DSC overlap */
587 u8 nice1; /* give potential excess bandwidth */
588
589 unsigned present : 1; /* drive is physically present */
590 unsigned dead : 1; /* device ejected hint */
591 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
592 unsigned noprobe : 1; /* from: hdx=noprobe */
593 unsigned removable : 1; /* 1 if need to do check_media_change */
594 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT		 595 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
596 unsigned no_unmask : 1; /* disallow setting unmask bit */
597 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
598 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
599 unsigned nice0 : 1; /* give obvious excess bandwidth */
600 unsigned nice2 : 1; /* give a share in our own bandwidth */
601 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
602 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
603 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
604 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
605 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT		 606 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
607 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
608 unsigned post_reset : 1;
7f8f48af 609 unsigned udma33_warned : 1;
1da177e4 610
1497943e 611 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT		 612 u8 quirk_list; /* considered quirky, set for a specific host */
613 u8 init_speed; /* transfer rate set at boot */
1da177e4 614 u8 current_speed; /* current transfer rate set */
513daadd 615 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT		 616 u8 dn; /* now wide spread use */
617 u8 wcache; /* status of write cache */
618 u8 acoustic; /* acoustic management */
619 u8 media; /* disk, cdrom, tape, floppy, ... */
620 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
621 u8 ready_stat; /* min status value for drive ready */
622 u8 mult_count; /* current multiple sector setting */
623 u8 mult_req; /* requested multiple sector setting */
624 u8 tune_req; /* requested drive tuning setting */
625 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
626 u8 bad_wstat; /* used for ignoring WRERR_STAT */
627 u8 nowerr; /* used for ignoring WRERR_STAT */
628 u8 sect0; /* offset of first sector for DM6:DDO */
629 u8 head; /* "real" number of heads */
630 u8 sect; /* "real" sectors per track */
631 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
632 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
633
634 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
635 unsigned int cyl; /* "real" number of cyls */
636 unsigned int drive_data; /* use by tuneproc/selectproc */
1da177e4
LT		 637 unsigned int failures; /* current failure count */
638 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 639 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT		 640
641 u64 capacity64; /* total number of sectors */
642
643 int lun; /* logical unit */
644 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR		 645#ifdef CONFIG_BLK_DEV_IDEACPI
646 struct ide_acpi_drive_link *acpidata;
647#endif
1da177e4
LT		 648 struct list_head list;
649 struct device gendev;
f36d4024 650 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT		 651} ide_drive_t;
652
8604affd
BZ		 653#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
654
1da177e4
LT		 655#define IDE_CHIPSET_PCI_MASK \
656 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
657#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
658
659struct ide_pci_device_s;
660
661typedef struct hwif_s {
662 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
663 struct hwif_s *mate; /* other hwif from same PCI chip */
664 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
665 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
666
667 char name[6]; /* name of interface, eg. "ide0" */
668
669 /* task file registers for pata and sata */
670 unsigned long io_ports[IDE_NR_PORTS];
671 unsigned long sata_scr[SATA_NR_PORTS];
672 unsigned long sata_misc[SATA_NR_PORTS];
673
674 hw_regs_t hw; /* Hardware info */
675 ide_drive_t drives[MAX_DRIVES]; /* drive info */
676
677 u8 major; /* our major number */
678 u8 index; /* 0 for ide0; 1 for ide1; ... */
679 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
680 u8 straight8; /* Alan's straight 8 check */
681 u8 bus_state; /* power state of the IDE bus */
682
683 u8 atapi_dma; /* host supports atapi_dma */
684 u8 ultra_mask;
685 u8 mwdma_mask;
686 u8 swdma_mask;
687
688 hwif_chipset_t chipset; /* sub-module for tuning.. */
689
690 struct pci_dev *pci_dev; /* for pci chipsets */
691 struct ide_pci_device_s *cds; /* chipset device struct */
692
693 void (*rw_disk)(ide_drive_t *, struct request *);
694
695#if 0
696 ide_hwif_ops_t *hwifops;
697#else
698 /* routine to tune PIO mode for drives */
699 void (*tuneproc)(ide_drive_t *, u8);
700 /* routine to retune DMA modes for drives */
701 int (*speedproc)(ide_drive_t *, u8);
702 /* tweaks hardware to select drive */
703 void (*selectproc)(ide_drive_t *);
704 /* chipset polling based on hba specifics */
705 int (*reset_poll)(ide_drive_t *);
706 /* chipset specific changes to default for device-hba resets */
707 void (*pre_reset)(ide_drive_t *);
708 /* routine to reset controller after a disk reset */
709 void (*resetproc)(ide_drive_t *);
710 /* special interrupt handling for shared pci interrupts */
711 void (*intrproc)(ide_drive_t *);
712 /* special host masking for drive selection */
713 void (*maskproc)(ide_drive_t *, int);
714 /* check host's drive quirk list */
715 int (*quirkproc)(ide_drive_t *);
716 /* driver soft-power interface */
717 int (*busproc)(ide_drive_t *, int);
1da177e4 718#endif
2d5eaa6d 719 u8 (*udma_filter)(ide_drive_t *);
1da177e4
LT		 720
721 void (*ata_input_data)(ide_drive_t *, void *, u32);
722 void (*ata_output_data)(ide_drive_t *, void *, u32);
723
724 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
725 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
726
727 int (*dma_setup)(ide_drive_t *);
728 void (*dma_exec_cmd)(ide_drive_t *, u8);
729 void (*dma_start)(ide_drive_t *);
730 int (*ide_dma_end)(ide_drive_t *drive);
731 int (*ide_dma_check)(ide_drive_t *drive);
732 int (*ide_dma_on)(ide_drive_t *drive);
7469aaf6 733 void (*dma_off_quietly)(ide_drive_t *drive);
1da177e4 734 int (*ide_dma_test_irq)(ide_drive_t *drive);
f0dd8712 735 void (*ide_dma_clear_irq)(ide_drive_t *drive);
ccf35289 736 void (*dma_host_on)(ide_drive_t *drive);
7469aaf6 737 void (*dma_host_off)(ide_drive_t *drive);
1da177e4
LT		 738 int (*ide_dma_lostirq)(ide_drive_t *drive);
739 int (*ide_dma_timeout)(ide_drive_t *drive);
740
741 void (*OUTB)(u8 addr, unsigned long port);
742 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
743 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT		 744 void (*OUTSW)(unsigned long port, void *addr, u32 count);
745 void (*OUTSL)(unsigned long port, void *addr, u32 count);
746
747 u8 (*INB)(unsigned long port);
748 u16 (*INW)(unsigned long port);
1da177e4
LT		 749 void (*INSW)(unsigned long port, void *addr, u32 count);
750 void (*INSL)(unsigned long port, void *addr, u32 count);
751
752 /* dma physical region descriptor table (cpu view) */
753 unsigned int *dmatable_cpu;
754 /* dma physical region descriptor table (dma view) */
755 dma_addr_t dmatable_dma;
756 /* Scatter-gather list used to build the above */
757 struct scatterlist *sg_table;
758 int sg_max_nents; /* Maximum number of entries in it */
759 int sg_nents; /* Current number of entries in it */
760 int sg_dma_direction; /* dma transfer direction */
761
762 /* data phase of the active command (currently only valid for PIO/DMA) */
763 int data_phase;
764
765 unsigned int nsect;
766 unsigned int nleft;
767 unsigned int cursg;
768 unsigned int cursg_ofs;
769
1da177e4
LT		 770 int rqsize; /* max sectors per request */
771 int irq; /* our irq number */
772
773 unsigned long dma_master; /* reference base addr dmabase */
774 unsigned long dma_base; /* base addr for dma ports */
775 unsigned long dma_command; /* dma command register */
776 unsigned long dma_vendor1; /* dma vendor 1 register */
777 unsigned long dma_status; /* dma status register */
778 unsigned long dma_vendor3; /* dma vendor 3 register */
779 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 780
1da177e4
LT		 781 unsigned long config_data; /* for use by chipset-specific code */
782 unsigned long select_data; /* for use by chipset-specific code */
783
020e322d
SS		 784 unsigned long extra_base; /* extra addr for dma ports */
785 unsigned extra_ports; /* number of extra dma ports */
786
1da177e4
LT		 787 unsigned noprobe : 1; /* don't probe for this interface */
788 unsigned present : 1; /* this interface exists */
789 unsigned hold : 1; /* this interface is always present */
790 unsigned serialized : 1; /* serialized all channel operation */
791 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
792 unsigned reset : 1; /* reset after probe */
793 unsigned autodma : 1; /* auto-attempt using DMA at boot */
794 unsigned udma_four : 1; /* 1=ATA-66 capable, 0=default */
795 unsigned no_lba48 : 1; /* 1 = cannot do LBA48 */
796 unsigned no_lba48_dma : 1; /* 1 = cannot do LBA48 DMA */
1da177e4
LT		 797 unsigned auto_poll : 1; /* supports nop auto-poll */
798 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
208a08f7 799 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
da574af7 800 unsigned err_stops_fifo : 1; /* 1=data FIFO is cleared by an error */
2ad1e558 801 unsigned mmio : 1; /* host uses MMIO */
1da177e4
LT		 802
803 struct device gendev;
f36d4024 804 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT		 805
806 void *hwif_data; /* extra hwif data */
807
808 unsigned dma;
e3a59b4d
HR		 809
810#ifdef CONFIG_BLK_DEV_IDEACPI
811 struct ide_acpi_hwif_link *acpidata;
812#endif
22fc6ecc 813} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT		 814
815/*
816 * internal ide interrupt handler type
817 */
818typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
819typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
820typedef int (ide_expiry_t)(ide_drive_t *);
821
822typedef struct hwgroup_s {
823 /* irq handler, if active */
824 ide_startstop_t (*handler)(ide_drive_t *);
825 /* irq handler, suspended if active */
826 ide_startstop_t (*handler_save)(ide_drive_t *);
827 /* BOOL: protects all fields below */
828 volatile int busy;
829 /* BOOL: wake us up on timer expiry */
830 unsigned int sleeping : 1;
831 /* BOOL: polling active & poll_timeout field valid */
832 unsigned int polling : 1;
913759ac
AC		 833 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
834 unsigned int resetting : 1;
835
1da177e4
LT		 836 /* current drive */
837 ide_drive_t *drive;
838 /* ptr to current hwif in linked-list */
839 ide_hwif_t *hwif;
840
841 /* for pci chipsets */
842 struct pci_dev *pci_dev;
843 /* chipset device struct */
844 struct ide_pci_device_s *cds;
845
846 /* current request */
847 struct request *rq;
848 /* failsafe timer */
849 struct timer_list timer;
850 /* local copy of current write rq */
851 struct request wrq;
852 /* timeout value during long polls */
853 unsigned long poll_timeout;
854 /* queried upon timeouts */
855 int (*expiry)(ide_drive_t *);
856 /* ide_system_bus_speed */
857 int pio_clock;
23450319
SS		 858 int req_gen;
859 int req_gen_timer;
1da177e4
LT		 860
861 unsigned char cmd_buf[4];
862} ide_hwgroup_t;
863
7662d046
BZ		 864typedef struct ide_driver_s ide_driver_t;
865
866extern struct semaphore ide_setting_sem;
1da177e4 867
7662d046
BZ		 868int set_io_32bit(ide_drive_t *, int);
869int set_pio_mode(ide_drive_t *, int);
870int set_using_dma(ide_drive_t *, int);
871
872#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT		 873/*
874 * configurable drive settings
875 */
876
877#define TYPE_INT 0
1497943e
BZ		 878#define TYPE_BYTE 1
879#define TYPE_SHORT 2
1da177e4
LT		 880
881#define SETTING_READ (1 << 0)
882#define SETTING_WRITE (1 << 1)
883#define SETTING_RW (SETTING_READ | SETTING_WRITE)
884
885typedef int (ide_procset_t)(ide_drive_t *, int);
886typedef struct ide_settings_s {
887 char *name;
888 int rw;
1da177e4
LT		 889 int data_type;
890 int min;
891 int max;
892 int mul_factor;
893 int div_factor;
894 void *data;
895 ide_procset_t *set;
896 int auto_remove;
897 struct ide_settings_s *next;
898} ide_settings_t;
899
1497943e 900int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT		 901
902/*
903 * /proc/ide interface
904 */
905typedef struct {
906 const char *name;
907 mode_t mode;
908 read_proc_t *read_proc;
909 write_proc_t *write_proc;
910} ide_proc_entry_t;
911
ecfd80e4
BZ		 912void proc_ide_create(void);
913void proc_ide_destroy(void);
5cbf79cd
BZ		 914void ide_proc_register_port(ide_hwif_t *);
915void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ		 916void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
917void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
918
919void ide_add_generic_settings(ide_drive_t *);
920
1da177e4
LT		 921read_proc_t proc_ide_read_capacity;
922read_proc_t proc_ide_read_geometry;
923
924#ifdef CONFIG_BLK_DEV_IDEPCI
925void ide_pci_create_host_proc(const char *, get_info_t *);
926#endif
927
928/*
929 * Standard exit stuff:
930 */
931#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
932{ \
933 len -= off; \
934 if (len < count) { \
935 *eof = 1; \
936 if (len <= 0) \
937 return 0; \
938 } else \
939 len = count; \
940 *start = page + off; \
941 return len; \
942}
943#else
ecfd80e4
BZ		 944static inline void proc_ide_create(void) { ; }
945static inline void proc_ide_destroy(void) { ; }
5cbf79cd
BZ		 946static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
947static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ		 948static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
949static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
950static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT		 951#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
952#endif
953
954/*
955 * Power Management step value (rq->pm->pm_step).
956 *
957 * The step value starts at 0 (ide_pm_state_start_suspend) for a
958 * suspend operation or 1000 (ide_pm_state_start_resume) for a
959 * resume operation.
960 *
961 * For each step, the core calls the subdriver start_power_step() first.
962 * This can return:
963 * - ide_stopped : In this case, the core calls us back again unless
964 * step have been set to ide_power_state_completed.
965 * - ide_started : In this case, the channel is left busy until an
966 * async event (interrupt) occurs.
967 * Typically, start_power_step() will issue a taskfile request with
968 * do_rw_taskfile().
969 *
970 * Upon reception of the interrupt, the core will call complete_power_step()
971 * with the error code if any. This routine should update the step value
972 * and return. It should not start a new request. The core will call
973 * start_power_step for the new step value, unless step have been set to
974 * ide_power_state_completed.
975 *
976 * Subdrivers are expected to define their own additional power
977 * steps from 1..999 for suspend and from 1001..1999 for resume,
978 * other values are reserved for future use.
979 */
980
981enum {
982 ide_pm_state_completed = -1,
983 ide_pm_state_start_suspend = 0,
984 ide_pm_state_start_resume = 1000,
985};
986
987/*
988 * Subdrivers support.
4ef3b8f4
LR		 989 *
990 * The gendriver.owner field should be set to the module owner of this driver.
991 * The gendriver.name field should be set to the name of this driver
1da177e4 992 */
7662d046 993struct ide_driver_s {
1da177e4
LT		 994 const char *version;
995 u8 media;
1da177e4 996 unsigned supports_dsc_overlap : 1;
1da177e4
LT		 997 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
998 int (*end_request)(ide_drive_t *, int, int);
999 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1000 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 1001 struct device_driver gen_driver;
4031bbe4
RK		 1002 int (*probe)(ide_drive_t *);
1003 void (*remove)(ide_drive_t *);
1004 void (*shutdown)(ide_drive_t *);
7662d046
BZ		 1005#ifdef CONFIG_IDE_PROC_FS
1006 ide_proc_entry_t *proc;
1007#endif
1008};
1da177e4 1009
4031bbe4
RK		 1010#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
1011
1da177e4
LT		 1012int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
1013
1014/*
1015 * ide_hwifs[] is the master data structure used to keep track
1016 * of just about everything in ide.c. Whenever possible, routines
1017 * should be using pointers to a drive (ide_drive_t *) or
1018 * pointers to a hwif (ide_hwif_t *), rather than indexing this
1019 * structure directly (the allocation/layout may change!).
1020 *
1021 */
1022#ifndef _IDE_C
1023extern ide_hwif_t ide_hwifs[]; /* master data repository */
1024#endif
1025extern int noautodma;
1026
1027extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC		 1028int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1029 int uptodate, int nr_sectors);
1da177e4
LT		 1030
1031/*
1032 * This is used on exit from the driver to designate the next irq handler
1033 * and also to start the safety timer.
1034 */
1035extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1036
1037/*
1038 * This is used on exit from the driver to designate the next irq handler
1039 * and start the safety time safely and atomically from the IRQ handler
1040 * with respect to the command issue (which it also does)
1041 */
1042extern void ide_execute_command(ide_drive_t *, task_ioreg_t cmd, ide_handler_t *, unsigned int, ide_expiry_t *);
1043
1044ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1045
1046/*
1047 * ide_error() takes action based on the error returned by the controller.
1048 * The caller should return immediately after invoking this.
1049 *
1050 * (drive, msg, status)
1051 */
1052ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1053
1054ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
1055
1056/*
1057 * Abort a running command on the controller triggering the abort
1058 * from a host side, non error situation
1059 * (drive, msg)
1060 */
1061extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
1062
1063extern void ide_fix_driveid(struct hd_driveid *);
1064/*
1065 * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
1066 * removing leading/trailing blanks and compressing internal blanks.
1067 * It is primarily used to tidy up the model name/number fields as
1068 * returned by the WIN_[P]IDENTIFY commands.
1069 *
1070 * (s, bytecount, byteswap)
1071 */
1072extern void ide_fixstring(u8 *, const int, const int);
1073
1074/*
1075 * This routine busy-waits for the drive status to be not "busy".
1076 * It then checks the status for all of the "good" bits and none
1077 * of the "bad" bits, and if all is okay it returns 0. All other
1078 * cases return 1 after doing "*startstop = ide_error()", and the
1079 * caller should return the updated value of "startstop" in this case.
1080 * "startstop" is unchanged when the function returns 0;
1081 * (startstop, drive, good, bad, timeout)
1082 */
1083extern int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1084
1085/*
1086 * Start a reset operation for an IDE interface.
1087 * The caller should return immediately after invoking this.
1088 */
1089extern ide_startstop_t ide_do_reset (ide_drive_t *);
1090
1091/*
1092 * This function is intended to be used prior to invoking ide_do_drive_cmd().
1093 */
1094extern void ide_init_drive_cmd (struct request *rq);
1095
1096/*
1097 * this function returns error location sector offset in case of a write error
1098 */
1099extern u64 ide_get_error_location(ide_drive_t *, char *);
1100
1101/*
1102 * "action" parameter type for ide_do_drive_cmd() below.
1103 */
1104typedef enum {
1105 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT		 1106 ide_preempt, /* insert rq in front of current request */
1107 ide_head_wait, /* insert rq in front of current request and wait for it */
1108 ide_end /* insert rq at end of list, but don't wait for it */
1109} ide_action_t;
1110
1da177e4
LT		 1111extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
1112
1113/*
1114 * Clean up after success/failure of an explicit drive cmd.
1115 * stat/err are used only when (HWGROUP(drive)->rq->cmd == IDE_DRIVE_CMD).
1116 * stat/err are used only when (HWGROUP(drive)->rq->cmd == IDE_DRIVE_TASK_MASK).
1117 *
1118 * (ide_drive_t *drive, u8 stat, u8 err)
1119 */
1120extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1121
1122/*
1123 * Issue ATA command and wait for completion.
1124 * Use for implementing commands in kernel
1125 *
1126 * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
1127 */
1128extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
1129
1130typedef struct ide_task_s {
1131/*
1132 * struct hd_drive_task_hdr tf;
1133 * task_struct_t tf;
1134 * struct hd_drive_hob_hdr hobf;
1135 * hob_struct_t hobf;
1136 */
1137 task_ioreg_t tfRegister[8];
1138 task_ioreg_t hobRegister[8];
1139 ide_reg_valid_t tf_out_flags;
1140 ide_reg_valid_t tf_in_flags;
1141 int data_phase;
1142 int command_type;
1143 ide_pre_handler_t *prehandler;
1144 ide_handler_t *handler;
1145 struct request *rq; /* copy of request */
1146 void *special; /* valid_t generally */
1147} ide_task_t;
1148
1149extern u32 ide_read_24(ide_drive_t *);
1150
1151extern void SELECT_DRIVE(ide_drive_t *);
1152extern void SELECT_INTERRUPT(ide_drive_t *);
1153extern void SELECT_MASK(ide_drive_t *, int);
1154extern void QUIRK_LIST(ide_drive_t *);
1155
1156extern int drive_is_ready(ide_drive_t *);
1157extern int wait_for_ready(ide_drive_t *, int /* timeout */);
1158
1159/*
1160 * taskfile io for disks for now...and builds request from ide_ioctl
1161 */
1162extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1163
1164/*
1165 * Special Flagged Register Validation Caller
1166 */
1167extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *);
1168
1169extern ide_startstop_t set_multmode_intr(ide_drive_t *);
1170extern ide_startstop_t set_geometry_intr(ide_drive_t *);
1171extern ide_startstop_t recal_intr(ide_drive_t *);
1172extern ide_startstop_t task_no_data_intr(ide_drive_t *);
1173extern ide_startstop_t task_in_intr(ide_drive_t *);
1174extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *);
1175
1176extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *);
1177
1178int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1179int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
1180int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
1181
1182extern int system_bus_clock(void);
1183
1184extern int ide_driveid_update(ide_drive_t *);
1185extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
1186extern int ide_config_drive_speed(ide_drive_t *, u8);
1187extern u8 eighty_ninty_three (ide_drive_t *);
1188extern int set_transfer(ide_drive_t *, ide_task_t *);
1189extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1190
1191extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1192
1193/*
1194 * ide_stall_queue() can be used by a drive to give excess bandwidth back
1195 * to the hwgroup by sleeping for timeout jiffies.
1196 */
1197extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1198
1199extern int ide_spin_wait_hwgroup(ide_drive_t *);
1200extern void ide_timer_expiry(unsigned long);
7d12e780 1201extern irqreturn_t ide_intr(int irq, void *dev_id);
1da177e4 1202extern void do_ide_request(request_queue_t *);
1da177e4
LT		 1203
1204void ide_init_disk(struct gendisk *, ide_drive_t *);
1205
1da177e4
LT		 1206extern int ideprobe_init(void);
1207
6d208b39 1208#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1da177e4 1209extern void ide_scan_pcibus(int scan_direction) __init;
725522b5
GKH		 1210extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1211#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ		 1212#else
1213#define ide_pci_register_driver(d) pci_register_driver(d)
1214#endif
1215
1da177e4
LT		 1216void ide_pci_setup_ports(struct pci_dev *, struct ide_pci_device_s *, int, ata_index_t *);
1217extern void ide_setup_pci_noise (struct pci_dev *dev, struct ide_pci_device_s *d);
1218
1219extern void default_hwif_iops(ide_hwif_t *);
1220extern void default_hwif_mmiops(ide_hwif_t *);
1221extern void default_hwif_transport(ide_hwif_t *);
1222
1da177e4
LT		 1223#define ON_BOARD 1
1224#define NEVER_BOARD 0
1225
1226#ifdef CONFIG_BLK_DEV_OFFBOARD
1227# define OFF_BOARD ON_BOARD
1228#else /* CONFIG_BLK_DEV_OFFBOARD */
1229# define OFF_BOARD NEVER_BOARD
1230#endif /* CONFIG_BLK_DEV_OFFBOARD */
1231
1232#define NODMA 0
1233#define NOAUTODMA 1
1234#define AUTODMA 2
1235
1236typedef struct ide_pci_enablebit_s {
1237 u8 reg; /* byte pci reg holding the enable-bit */
1238 u8 mask; /* mask to isolate the enable-bit */
1239 u8 val; /* value of masked reg when "enabled" */
1240} ide_pci_enablebit_t;
1241
1242enum {
1243 /* Uses ISA control ports not PCI ones. */
1244 IDEPCI_FLAG_ISA_PORTS = (1 << 0),
1da177e4
LT		 1245};
1246
1247typedef struct ide_pci_device_s {
1248 char *name;
1249 int (*init_setup)(struct pci_dev *, struct ide_pci_device_s *);
1250 void (*init_setup_dma)(struct pci_dev *, struct ide_pci_device_s *, ide_hwif_t *);
1251 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1252 void (*init_iops)(ide_hwif_t *);
1253 void (*init_hwif)(ide_hwif_t *);
1254 void (*init_dma)(ide_hwif_t *, unsigned long);
1255 void (*fixup)(ide_hwif_t *);
1256 u8 channels;
1257 u8 autodma;
1258 ide_pci_enablebit_t enablebits[2];
1259 u8 bootable;
1260 unsigned int extra;
1261 struct ide_pci_device_s *next;
1262 u8 flags;
18137207 1263 u8 udma_mask;
1da177e4
LT		 1264} ide_pci_device_t;
1265
1266extern int ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
1267extern int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, ide_pci_device_t *);
1268
1269void ide_map_sg(ide_drive_t *, struct request *);
1270void ide_init_sg_cmd(ide_drive_t *, struct request *);
1271
1272#define BAD_DMA_DRIVE 0
1273#define GOOD_DMA_DRIVE 1
1274
1275#ifdef CONFIG_BLK_DEV_IDEDMA
65e5f2e3
JC		 1276struct drive_list_entry {
1277 const char *id_model;
1278 const char *id_firmware;
1279};
1280
1281int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1da177e4
LT		 1282int __ide_dma_bad_drive(ide_drive_t *);
1283int __ide_dma_good_drive(ide_drive_t *);
1284int ide_use_dma(ide_drive_t *);
2d5eaa6d 1285u8 ide_max_dma_mode(ide_drive_t *);
29e744d0 1286int ide_tune_dma(ide_drive_t *);
7469aaf6 1287void ide_dma_off(ide_drive_t *);
1da177e4 1288void ide_dma_verbose(ide_drive_t *);
3608b5d7 1289int ide_set_dma(ide_drive_t *);
1da177e4
LT		 1290ide_startstop_t ide_dma_intr(ide_drive_t *);
1291
1292#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1293extern int ide_build_sglist(ide_drive_t *, struct request *);
1294extern int ide_build_dmatable(ide_drive_t *, struct request *);
1295extern void ide_destroy_dmatable(ide_drive_t *);
1296extern int ide_release_dma(ide_hwif_t *);
1297extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
1298
7469aaf6
BZ		 1299void ide_dma_host_off(ide_drive_t *);
1300void ide_dma_off_quietly(ide_drive_t *);
ccf35289 1301void ide_dma_host_on(ide_drive_t *);
1da177e4
LT		 1302extern int __ide_dma_on(ide_drive_t *);
1303extern int __ide_dma_check(ide_drive_t *);
1304extern int ide_dma_setup(ide_drive_t *);
1305extern void ide_dma_start(ide_drive_t *);
1306extern int __ide_dma_end(ide_drive_t *);
1307extern int __ide_dma_lostirq(ide_drive_t *);
1308extern int __ide_dma_timeout(ide_drive_t *);
1309#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1310
1311#else
1312static inline int ide_use_dma(ide_drive_t *drive) { return 0; }
2d5eaa6d 1313static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
29e744d0 1314static inline int ide_tune_dma(ide_drive_t *drive) { return 0; }
7469aaf6 1315static inline void ide_dma_off(ide_drive_t *drive) { ; }
1da177e4 1316static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1317static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1da177e4
LT		 1318#endif /* CONFIG_BLK_DEV_IDEDMA */
1319
1320#ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1321static inline void ide_release_dma(ide_hwif_t *drive) {;}
1322#endif
1323
e3a59b4d
HR		 1324#ifdef CONFIG_BLK_DEV_IDEACPI
1325extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1326extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1327extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1328extern void ide_acpi_init(ide_hwif_t *hwif);
1329#else
1330static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1331static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1332static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1333static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1334#endif
1335
1da177e4
LT		 1336extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1337extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1338extern void ide_unregister (unsigned int index);
1339
1340void ide_register_region(struct gendisk *);
1341void ide_unregister_region(struct gendisk *);
1342
1343void ide_undecoded_slave(ide_hwif_t *);
1344
1345int probe_hwif_init_with_fixup(ide_hwif_t *, void (*)(ide_hwif_t *));
1346extern int probe_hwif_init(ide_hwif_t *);
1347
1348static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1349{
1350 return hwif->hwif_data;
1351}
1352
1353static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1354{
1355 hwif->hwif_data = data;
1356}
1357
1358/* ide-lib.c */
2d5eaa6d 1359u8 ide_rate_filter(ide_drive_t *, u8);
1da177e4
LT		 1360extern int ide_dma_enable(ide_drive_t *drive);
1361extern char *ide_xfer_verbose(u8 xfer_rate);
1362extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1363extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
7569e8dc 1364int ide_use_fast_pio(ide_drive_t *);
1da177e4
LT		 1365
1366u8 ide_dump_status(ide_drive_t *, const char *, u8);
1367
1368typedef struct ide_pio_timings_s {
1369 int setup_time; /* Address setup (ns) minimum */
1370 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS		 1371 int cycle_time; /* Cycle time (ns) minimum = */
1372 /* active + recovery (+ setup for some chips) */
1da177e4
LT		 1373} ide_pio_timings_t;
1374
1375typedef struct ide_pio_data_s {
1376 u8 pio_mode;
1377 u8 use_iordy;
1378 u8 overridden;
1da177e4
LT		 1379 unsigned int cycle_time;
1380} ide_pio_data_t;
1381
1382extern u8 ide_get_best_pio_mode (ide_drive_t *drive, u8 mode_wanted, u8 max_mode, ide_pio_data_t *d);
1383extern const ide_pio_timings_t ide_pio_timings[6];
1384
1385
1386extern spinlock_t ide_lock;
1387extern struct semaphore ide_cfg_sem;
1388/*
1389 * Structure locking:
1390 *
1391 * ide_cfg_sem and ide_lock together protect changes to
1392 * ide_hwif_t->{next,hwgroup}
1393 * ide_drive_t->next
1394 *
1395 * ide_hwgroup_t->busy: ide_lock
1396 * ide_hwgroup_t->hwif: ide_lock
1397 * ide_hwif_t->mate: constant, no locking
1398 * ide_drive_t->hwif: constant, no locking
1399 */
1400
366c7f55 1401#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT		 1402
1403extern struct bus_type ide_bus_type;
1404
1405/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1406#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1407
1408/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1409#define ide_id_has_flush_cache_ext(id) \
1410 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1411
86b37860
CL		 1412static inline int hwif_to_node(ide_hwif_t *hwif)
1413{
1414 struct pci_dev *dev = hwif->pci_dev;
1415 return dev ? pcibus_to_node(dev->bus) : -1;
1416}
1417
1da177e4 1418#endif /* _IDE_H */
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