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1da177e4 LT |
1 | #ifndef _IDE_H |
2 | #define _IDE_H | |
3 | /* | |
4 | * linux/include/linux/ide.h | |
5 | * | |
6 | * Copyright (C) 1994-2002 Linus Torvalds & authors | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/init.h> |
10 | #include <linux/ioport.h> | |
3ceca727 | 11 | #include <linux/ata.h> |
1da177e4 LT |
12 | #include <linux/blkdev.h> |
13 | #include <linux/proc_fs.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/bitops.h> | |
16 | #include <linux/bio.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/pci.h> | |
f36d4024 | 19 | #include <linux/completion.h> |
feb22b7f | 20 | #include <linux/pm.h> |
e3a59b4d HR |
21 | #ifdef CONFIG_BLK_DEV_IDEACPI |
22 | #include <acpi/acpi.h> | |
23 | #endif | |
1da177e4 LT |
24 | #include <asm/byteorder.h> |
25 | #include <asm/system.h> | |
26 | #include <asm/io.h> | |
f9383c42 | 27 | #include <asm/mutex.h> |
1da177e4 | 28 | |
a1df5169 BP |
29 | /* for request_sense */ |
30 | #include <linux/cdrom.h> | |
31 | ||
d45b70ab | 32 | #if defined(CONFIG_CRIS) || defined(CONFIG_FRV) || defined(CONFIG_MN10300) |
4ee06b7e BZ |
33 | # define SUPPORT_VLB_SYNC 0 |
34 | #else | |
35 | # define SUPPORT_VLB_SYNC 1 | |
1da177e4 LT |
36 | #endif |
37 | ||
1da177e4 LT |
38 | /* |
39 | * Probably not wise to fiddle with these | |
40 | */ | |
b40d1b88 | 41 | #define IDE_DEFAULT_MAX_FAILURES 1 |
1da177e4 LT |
42 | #define ERROR_MAX 8 /* Max read/write errors per sector */ |
43 | #define ERROR_RESET 3 /* Reset controller every 4th retry */ | |
44 | #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ | |
45 | ||
c152cc1a BZ |
46 | /* Error codes returned in rq->errors to the higher part of the driver. */ |
47 | enum { | |
48 | IDE_DRV_ERROR_GENERAL = 101, | |
49 | IDE_DRV_ERROR_FILEMARK = 102, | |
50 | IDE_DRV_ERROR_EOD = 103, | |
51 | }; | |
52 | ||
1da177e4 LT |
53 | /* |
54 | * Definitions for accessing IDE controller registers | |
55 | */ | |
56 | #define IDE_NR_PORTS (10) | |
57 | ||
4c3032d8 BZ |
58 | struct ide_io_ports { |
59 | unsigned long data_addr; | |
60 | ||
61 | union { | |
62 | unsigned long error_addr; /* read: error */ | |
63 | unsigned long feature_addr; /* write: feature */ | |
64 | }; | |
65 | ||
66 | unsigned long nsect_addr; | |
67 | unsigned long lbal_addr; | |
68 | unsigned long lbam_addr; | |
69 | unsigned long lbah_addr; | |
70 | ||
71 | unsigned long device_addr; | |
72 | ||
73 | union { | |
74 | unsigned long status_addr; /* read: status */ | |
75 | unsigned long command_addr; /* write: command */ | |
76 | }; | |
77 | ||
78 | unsigned long ctl_addr; | |
79 | ||
80 | unsigned long irq_addr; | |
81 | }; | |
1da177e4 LT |
82 | |
83 | #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) | |
1da177e4 | 84 | |
3a7d2484 BZ |
85 | #define BAD_R_STAT (ATA_BUSY | ATA_ERR) |
86 | #define BAD_W_STAT (BAD_R_STAT | ATA_DF) | |
87 | #define BAD_STAT (BAD_R_STAT | ATA_DRQ) | |
88 | #define DRIVE_READY (ATA_DRDY | ATA_DSC) | |
89 | ||
90 | #define BAD_CRC (ATA_ABORTED | ATA_ICRC) | |
1da177e4 LT |
91 | |
92 | #define SATA_NR_PORTS (3) /* 16 possible ?? */ | |
93 | ||
94 | #define SATA_STATUS_OFFSET (0) | |
1da177e4 | 95 | #define SATA_ERROR_OFFSET (1) |
1da177e4 | 96 | #define SATA_CONTROL_OFFSET (2) |
1da177e4 | 97 | |
1da177e4 LT |
98 | /* |
99 | * Our Physical Region Descriptor (PRD) table should be large enough | |
100 | * to handle the biggest I/O request we are likely to see. Since requests | |
101 | * can have no more than 256 sectors, and since the typical blocksize is | |
102 | * two or more sectors, we could get by with a limit of 128 entries here for | |
103 | * the usual worst case. Most requests seem to include some contiguous blocks, | |
104 | * further reducing the number of table entries required. | |
105 | * | |
106 | * The driver reverts to PIO mode for individual requests that exceed | |
107 | * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling | |
108 | * 100% of all crazy scenarios here is not necessary. | |
109 | * | |
110 | * As it turns out though, we must allocate a full 4KB page for this, | |
111 | * so the two PRD tables (ide0 & ide1) will each get half of that, | |
112 | * allowing each to have about 256 entries (8 bytes each) from this. | |
113 | */ | |
114 | #define PRD_BYTES 8 | |
115 | #define PRD_ENTRIES 256 | |
116 | ||
117 | /* | |
118 | * Some more useful definitions | |
119 | */ | |
120 | #define PARTN_BITS 6 /* number of minor dev bits for partitions */ | |
121 | #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ | |
122 | #define SECTOR_SIZE 512 | |
151a6701 | 123 | |
1da177e4 LT |
124 | /* |
125 | * Timeouts for various operations: | |
126 | */ | |
d6e2955a BZ |
127 | enum { |
128 | /* spec allows up to 20ms */ | |
129 | WAIT_DRQ = HZ / 10, /* 100ms */ | |
130 | /* some laptops are very slow */ | |
131 | WAIT_READY = 5 * HZ, /* 5s */ | |
132 | /* should be less than 3ms (?), if all ATAPI CD is closed at boot */ | |
133 | WAIT_PIDENTIFY = 10 * HZ, /* 10s */ | |
134 | /* worst case when spinning up */ | |
135 | WAIT_WORSTCASE = 30 * HZ, /* 30s */ | |
136 | /* maximum wait for an IRQ to happen */ | |
137 | WAIT_CMD = 10 * HZ, /* 10s */ | |
138 | /* Some drives require a longer IRQ timeout. */ | |
139 | WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */ | |
140 | /* | |
141 | * Some drives (for example, Seagate STT3401A Travan) require a very | |
142 | * long timeout, because they don't return an interrupt or clear their | |
143 | * BSY bit until after the command completes (even retension commands). | |
144 | */ | |
145 | WAIT_TAPE_CMD = 900 * HZ, /* 900s */ | |
146 | /* minimum sleep time */ | |
147 | WAIT_MIN_SLEEP = HZ / 50, /* 20ms */ | |
148 | }; | |
1da177e4 | 149 | |
79e36a9f EO |
150 | /* |
151 | * Op codes for special requests to be handled by ide_special_rq(). | |
152 | * Values should be in the range of 0x20 to 0x3f. | |
153 | */ | |
154 | #define REQ_DRIVE_RESET 0x20 | |
92f1f8fd | 155 | #define REQ_DEVSET_EXEC 0x21 |
4abdc6ee EO |
156 | #define REQ_PARK_HEADS 0x22 |
157 | #define REQ_UNPARK_HEADS 0x23 | |
79e36a9f | 158 | |
1da177e4 LT |
159 | /* |
160 | * Check for an interrupt and acknowledge the interrupt status | |
161 | */ | |
162 | struct hwif_s; | |
163 | typedef int (ide_ack_intr_t)(struct hwif_s *); | |
164 | ||
1da177e4 LT |
165 | /* |
166 | * hwif_chipset_t is used to keep track of the specific hardware | |
167 | * chipset used by each IDE interface, if known. | |
168 | */ | |
528a572d | 169 | enum { ide_unknown, ide_generic, ide_pci, |
1da177e4 LT |
170 | ide_cmd640, ide_dtc2278, ide_ali14xx, |
171 | ide_qd65xx, ide_umc8672, ide_ht6560b, | |
b7876a6f | 172 | ide_4drives, ide_pmac, ide_acorn, |
9a0e77f2 | 173 | ide_au1xxx, ide_palm3710 |
528a572d BZ |
174 | }; |
175 | ||
176 | typedef u8 hwif_chipset_t; | |
1da177e4 LT |
177 | |
178 | /* | |
179 | * Structure to hold all information about the location of this port | |
180 | */ | |
181 | typedef struct hw_regs_s { | |
4c3032d8 BZ |
182 | union { |
183 | struct ide_io_ports io_ports; | |
184 | unsigned long io_ports_array[IDE_NR_PORTS]; | |
185 | }; | |
186 | ||
1da177e4 | 187 | int irq; /* our irq number */ |
1da177e4 LT |
188 | ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ |
189 | hwif_chipset_t chipset; | |
c56c5648 | 190 | struct device *dev, *parent; |
d6276b5f | 191 | unsigned long config; |
1da177e4 LT |
192 | } hw_regs_t; |
193 | ||
1da177e4 LT |
194 | static inline void ide_std_init_ports(hw_regs_t *hw, |
195 | unsigned long io_addr, | |
196 | unsigned long ctl_addr) | |
197 | { | |
198 | unsigned int i; | |
199 | ||
4c3032d8 BZ |
200 | for (i = 0; i <= 7; i++) |
201 | hw->io_ports_array[i] = io_addr++; | |
1da177e4 | 202 | |
4c3032d8 | 203 | hw->io_ports.ctl_addr = ctl_addr; |
1da177e4 LT |
204 | } |
205 | ||
c5bfc375 | 206 | #define MAX_HWIFS 10 |
83ae20c8 | 207 | |
1da177e4 LT |
208 | /* |
209 | * Now for the data we need to maintain per-drive: ide_drive_t | |
210 | */ | |
211 | ||
212 | #define ide_scsi 0x21 | |
213 | #define ide_disk 0x20 | |
214 | #define ide_optical 0x7 | |
215 | #define ide_cdrom 0x5 | |
216 | #define ide_tape 0x1 | |
217 | #define ide_floppy 0x0 | |
218 | ||
219 | /* | |
220 | * Special Driver Flags | |
221 | * | |
222 | * set_geometry : respecify drive geometry | |
223 | * recalibrate : seek to cyl 0 | |
224 | * set_multmode : set multmode count | |
1da177e4 LT |
225 | * reserved : unused |
226 | */ | |
227 | typedef union { | |
228 | unsigned all : 8; | |
229 | struct { | |
1da177e4 LT |
230 | unsigned set_geometry : 1; |
231 | unsigned recalibrate : 1; | |
232 | unsigned set_multmode : 1; | |
6982daf7 | 233 | unsigned reserved : 5; |
1da177e4 LT |
234 | } b; |
235 | } special_t; | |
236 | ||
1da177e4 LT |
237 | /* |
238 | * Status returned from various ide_ functions | |
239 | */ | |
240 | typedef enum { | |
241 | ide_stopped, /* no drive operation was started */ | |
242 | ide_started, /* a drive operation was started, handler was set */ | |
243 | } ide_startstop_t; | |
244 | ||
60f85019 SS |
245 | enum { |
246 | IDE_VALID_ERROR = (1 << 1), | |
247 | IDE_VALID_FEATURE = IDE_VALID_ERROR, | |
248 | IDE_VALID_NSECT = (1 << 2), | |
249 | IDE_VALID_LBAL = (1 << 3), | |
250 | IDE_VALID_LBAM = (1 << 4), | |
251 | IDE_VALID_LBAH = (1 << 5), | |
252 | IDE_VALID_DEVICE = (1 << 6), | |
253 | IDE_VALID_LBA = IDE_VALID_LBAL | | |
254 | IDE_VALID_LBAM | | |
255 | IDE_VALID_LBAH, | |
256 | IDE_VALID_OUT_TF = IDE_VALID_FEATURE | | |
257 | IDE_VALID_NSECT | | |
258 | IDE_VALID_LBA, | |
259 | IDE_VALID_IN_TF = IDE_VALID_NSECT | | |
260 | IDE_VALID_LBA, | |
261 | IDE_VALID_OUT_HOB = IDE_VALID_OUT_TF, | |
262 | IDE_VALID_IN_HOB = IDE_VALID_ERROR | | |
263 | IDE_VALID_NSECT | | |
264 | IDE_VALID_LBA, | |
265 | }; | |
266 | ||
d6ff9f64 BZ |
267 | enum { |
268 | IDE_TFLAG_LBA48 = (1 << 0), | |
60f85019 SS |
269 | IDE_TFLAG_WRITE = (1 << 1), |
270 | IDE_TFLAG_CUSTOM_HANDLER = (1 << 2), | |
271 | IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 3), | |
d6ff9f64 | 272 | /* force 16-bit I/O operations */ |
60f85019 | 273 | IDE_TFLAG_IO_16BIT = (1 << 4), |
22aa4b32 | 274 | /* struct ide_cmd was allocated using kmalloc() */ |
60f85019 SS |
275 | IDE_TFLAG_DYN = (1 << 5), |
276 | IDE_TFLAG_FS = (1 << 6), | |
277 | IDE_TFLAG_MULTI_PIO = (1 << 7), | |
19710d25 BZ |
278 | }; |
279 | ||
280 | enum { | |
281 | IDE_FTFLAG_FLAGGED = (1 << 0), | |
282 | IDE_FTFLAG_SET_IN_FLAGS = (1 << 1), | |
283 | IDE_FTFLAG_OUT_DATA = (1 << 2), | |
284 | IDE_FTFLAG_IN_DATA = (1 << 3), | |
d6ff9f64 BZ |
285 | }; |
286 | ||
287 | struct ide_taskfile { | |
745483f1 SS |
288 | u8 data; /* 0: data byte (for TASKFILE ioctl) */ |
289 | union { /* 1: */ | |
290 | u8 error; /* read: error */ | |
291 | u8 feature; /* write: feature */ | |
d6ff9f64 | 292 | }; |
745483f1 SS |
293 | u8 nsect; /* 2: number of sectors */ |
294 | u8 lbal; /* 3: LBA low */ | |
295 | u8 lbam; /* 4: LBA mid */ | |
296 | u8 lbah; /* 5: LBA high */ | |
297 | u8 device; /* 6: device select */ | |
298 | union { /* 7: */ | |
299 | u8 status; /* read: status */ | |
d6ff9f64 BZ |
300 | u8 command; /* write: command */ |
301 | }; | |
302 | }; | |
303 | ||
22aa4b32 | 304 | struct ide_cmd { |
745483f1 SS |
305 | struct ide_taskfile tf; |
306 | struct ide_taskfile hob; | |
60f85019 SS |
307 | struct { |
308 | struct { | |
309 | u8 tf; | |
310 | u8 hob; | |
311 | } out, in; | |
312 | } valid; | |
313 | ||
314 | u8 tf_flags; | |
19710d25 | 315 | u8 ftf_flags; /* for TASKFILE ioctl */ |
0dfb991c | 316 | int protocol; |
b6308ee0 BZ |
317 | |
318 | int sg_nents; /* number of sg entries */ | |
319 | int orig_sg_nents; | |
320 | int sg_dma_direction; /* DMA transfer direction */ | |
321 | ||
bf717c0a | 322 | unsigned int nbytes; |
b6308ee0 | 323 | unsigned int nleft; |
a08915ba BZ |
324 | unsigned int last_xfer_len; |
325 | ||
b6308ee0 BZ |
326 | struct scatterlist *cursg; |
327 | unsigned int cursg_ofs; | |
328 | ||
d6ff9f64 | 329 | struct request *rq; /* copy of request */ |
22aa4b32 | 330 | }; |
d6ff9f64 | 331 | |
67c56364 BZ |
332 | /* ATAPI packet command flags */ |
333 | enum { | |
334 | /* set when an error is considered normal - no retry (ide-tape) */ | |
335 | PC_FLAG_ABORT = (1 << 0), | |
336 | PC_FLAG_SUPPRESS_ERROR = (1 << 1), | |
337 | PC_FLAG_WAIT_FOR_DSC = (1 << 2), | |
338 | PC_FLAG_DMA_OK = (1 << 3), | |
339 | PC_FLAG_DMA_IN_PROGRESS = (1 << 4), | |
340 | PC_FLAG_DMA_ERROR = (1 << 5), | |
341 | PC_FLAG_WRITING = (1 << 6), | |
67c56364 BZ |
342 | }; |
343 | ||
344 | /* | |
345 | * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes. | |
346 | * This is used for several packet commands (not for READ/WRITE commands). | |
347 | */ | |
41fa9f86 | 348 | #define IDE_PC_BUFFER_SIZE 64 |
4cad085e | 349 | #define ATAPI_WAIT_PC (60 * HZ) |
67c56364 BZ |
350 | |
351 | struct ide_atapi_pc { | |
352 | /* actual packet bytes */ | |
353 | u8 c[12]; | |
354 | /* incremented on each retry */ | |
355 | int retries; | |
356 | int error; | |
357 | ||
358 | /* bytes to transfer */ | |
359 | int req_xfer; | |
360 | /* bytes actually transferred */ | |
361 | int xferred; | |
362 | ||
363 | /* data buffer */ | |
364 | u8 *buf; | |
67c56364 | 365 | int buf_size; |
67c56364 BZ |
366 | |
367 | /* the corresponding request */ | |
368 | struct request *rq; | |
369 | ||
370 | unsigned long flags; | |
371 | ||
372 | /* | |
373 | * those are more or less driver-specific and some of them are subject | |
374 | * to change/removal later. | |
375 | */ | |
376 | u8 pc_buf[IDE_PC_BUFFER_SIZE]; | |
377 | ||
67c56364 BZ |
378 | unsigned long timeout; |
379 | }; | |
380 | ||
8185d5aa | 381 | struct ide_devset; |
7f3c868b | 382 | struct ide_driver; |
1da177e4 | 383 | |
e3a59b4d HR |
384 | #ifdef CONFIG_BLK_DEV_IDEACPI |
385 | struct ide_acpi_drive_link; | |
386 | struct ide_acpi_hwif_link; | |
387 | #endif | |
388 | ||
806f80a6 BZ |
389 | struct ide_drive_s; |
390 | ||
391 | struct ide_disk_ops { | |
392 | int (*check)(struct ide_drive_s *, const char *); | |
393 | int (*get_capacity)(struct ide_drive_s *); | |
394 | void (*setup)(struct ide_drive_s *); | |
395 | void (*flush)(struct ide_drive_s *); | |
396 | int (*init_media)(struct ide_drive_s *, struct gendisk *); | |
397 | int (*set_doorlock)(struct ide_drive_s *, struct gendisk *, | |
398 | int); | |
399 | ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *, | |
400 | sector_t); | |
badf8082 AV |
401 | int (*ioctl)(struct ide_drive_s *, struct block_device *, |
402 | fmode_t, unsigned int, unsigned long); | |
806f80a6 BZ |
403 | }; |
404 | ||
3b8ac539 BP |
405 | /* ATAPI device flags */ |
406 | enum { | |
407 | IDE_AFLAG_DRQ_INTERRUPT = (1 << 0), | |
0578042d BZ |
408 | |
409 | /* ide-cd */ | |
3b8ac539 | 410 | /* Drive cannot eject the disc. */ |
bf64741f | 411 | IDE_AFLAG_NO_EJECT = (1 << 1), |
3b8ac539 | 412 | /* Drive is a pre ATAPI 1.2 drive. */ |
bf64741f | 413 | IDE_AFLAG_PRE_ATAPI12 = (1 << 2), |
3b8ac539 | 414 | /* TOC addresses are in BCD. */ |
bf64741f | 415 | IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3), |
3b8ac539 | 416 | /* TOC track numbers are in BCD. */ |
bf64741f | 417 | IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4), |
3b8ac539 | 418 | /* Saved TOC information is current. */ |
bf64741f | 419 | IDE_AFLAG_TOC_VALID = (1 << 6), |
3b8ac539 | 420 | /* We think that the drive door is locked. */ |
bf64741f | 421 | IDE_AFLAG_DOOR_LOCKED = (1 << 7), |
3b8ac539 | 422 | /* SET_CD_SPEED command is unsupported. */ |
bf64741f BP |
423 | IDE_AFLAG_NO_SPEED_SELECT = (1 << 8), |
424 | IDE_AFLAG_VERTOS_300_SSD = (1 << 9), | |
425 | IDE_AFLAG_VERTOS_600_ESD = (1 << 10), | |
426 | IDE_AFLAG_SANYO_3CD = (1 << 11), | |
427 | IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12), | |
428 | IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13), | |
429 | IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14), | |
3b8ac539 BP |
430 | |
431 | /* ide-floppy */ | |
3b8ac539 | 432 | /* Avoid commands not supported in Clik drive */ |
bf64741f | 433 | IDE_AFLAG_CLIK_DRIVE = (1 << 15), |
3b8ac539 | 434 | /* Requires BH algorithm for packets */ |
bf64741f | 435 | IDE_AFLAG_ZIP_DRIVE = (1 << 16), |
49cac39e | 436 | /* Supports format progress report */ |
bf64741f | 437 | IDE_AFLAG_SRFP = (1 << 17), |
3b8ac539 BP |
438 | |
439 | /* ide-tape */ | |
bf64741f | 440 | IDE_AFLAG_IGNORE_DSC = (1 << 18), |
3b8ac539 | 441 | /* 0 When the tape position is unknown */ |
bf64741f | 442 | IDE_AFLAG_ADDRESS_VALID = (1 << 19), |
3b8ac539 | 443 | /* Device already opened */ |
bf64741f | 444 | IDE_AFLAG_BUSY = (1 << 20), |
3b8ac539 | 445 | /* Attempt to auto-detect the current user block size */ |
bf64741f | 446 | IDE_AFLAG_DETECT_BS = (1 << 21), |
3b8ac539 | 447 | /* Currently on a filemark */ |
bf64741f | 448 | IDE_AFLAG_FILEMARK = (1 << 22), |
3b8ac539 | 449 | /* 0 = no tape is loaded, so we don't rewind after ejecting */ |
bf64741f | 450 | IDE_AFLAG_MEDIUM_PRESENT = (1 << 23), |
f20f2586 | 451 | |
bf64741f | 452 | IDE_AFLAG_NO_AUTOCLOSE = (1 << 24), |
3b8ac539 BP |
453 | }; |
454 | ||
97100fc8 BZ |
455 | /* device flags */ |
456 | enum { | |
457 | /* restore settings after device reset */ | |
458 | IDE_DFLAG_KEEP_SETTINGS = (1 << 0), | |
459 | /* device is using DMA for read/write */ | |
460 | IDE_DFLAG_USING_DMA = (1 << 1), | |
461 | /* okay to unmask other IRQs */ | |
462 | IDE_DFLAG_UNMASK = (1 << 2), | |
463 | /* don't attempt flushes */ | |
464 | IDE_DFLAG_NOFLUSH = (1 << 3), | |
465 | /* DSC overlap */ | |
466 | IDE_DFLAG_DSC_OVERLAP = (1 << 4), | |
467 | /* give potential excess bandwidth */ | |
468 | IDE_DFLAG_NICE1 = (1 << 5), | |
469 | /* device is physically present */ | |
470 | IDE_DFLAG_PRESENT = (1 << 6), | |
97100fc8 BZ |
471 | /* id read from device (synthetic if not set) */ |
472 | IDE_DFLAG_ID_READ = (1 << 8), | |
473 | IDE_DFLAG_NOPROBE = (1 << 9), | |
474 | /* need to do check_media_change() */ | |
475 | IDE_DFLAG_REMOVABLE = (1 << 10), | |
476 | /* needed for removable devices */ | |
477 | IDE_DFLAG_ATTACH = (1 << 11), | |
478 | IDE_DFLAG_FORCED_GEOM = (1 << 12), | |
479 | /* disallow setting unmask bit */ | |
480 | IDE_DFLAG_NO_UNMASK = (1 << 13), | |
481 | /* disallow enabling 32-bit I/O */ | |
482 | IDE_DFLAG_NO_IO_32BIT = (1 << 14), | |
483 | /* for removable only: door lock/unlock works */ | |
484 | IDE_DFLAG_DOORLOCKING = (1 << 15), | |
485 | /* disallow DMA */ | |
486 | IDE_DFLAG_NODMA = (1 << 16), | |
487 | /* powermanagment told us not to do anything, so sleep nicely */ | |
488 | IDE_DFLAG_BLOCKED = (1 << 17), | |
97100fc8 | 489 | /* sleeping & sleep field valid */ |
5317464d BP |
490 | IDE_DFLAG_SLEEPING = (1 << 18), |
491 | IDE_DFLAG_POST_RESET = (1 << 19), | |
492 | IDE_DFLAG_UDMA33_WARNED = (1 << 20), | |
493 | IDE_DFLAG_LBA48 = (1 << 21), | |
97100fc8 | 494 | /* status of write cache */ |
5317464d | 495 | IDE_DFLAG_WCACHE = (1 << 22), |
97100fc8 | 496 | /* used for ignoring ATA_DF */ |
5317464d | 497 | IDE_DFLAG_NOWERR = (1 << 23), |
c3922048 | 498 | /* retrying in PIO */ |
5317464d BP |
499 | IDE_DFLAG_DMA_PIO_RETRY = (1 << 24), |
500 | IDE_DFLAG_LBA = (1 << 25), | |
4abdc6ee | 501 | /* don't unload heads */ |
5317464d | 502 | IDE_DFLAG_NO_UNLOAD = (1 << 26), |
4abdc6ee | 503 | /* heads unloaded, please don't reset port */ |
5317464d BP |
504 | IDE_DFLAG_PARKED = (1 << 27), |
505 | IDE_DFLAG_MEDIA_CHANGED = (1 << 28), | |
da167876 | 506 | /* write protect */ |
5317464d BP |
507 | IDE_DFLAG_WP = (1 << 29), |
508 | IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30), | |
97100fc8 BZ |
509 | }; |
510 | ||
d7c26ebb | 511 | struct ide_drive_s { |
1da177e4 LT |
512 | char name[4]; /* drive name, such as "hda" */ |
513 | char driver_req[10]; /* requests specific driver */ | |
514 | ||
165125e1 | 515 | struct request_queue *queue; /* request queue */ |
1da177e4 LT |
516 | |
517 | struct request *rq; /* current request */ | |
1da177e4 | 518 | void *driver_data; /* extra driver data */ |
48fb2688 | 519 | u16 *id; /* identification info */ |
7662d046 | 520 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 | 521 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
92f1f8fd | 522 | const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */ |
7662d046 | 523 | #endif |
1da177e4 LT |
524 | struct hwif_s *hwif; /* actually (ide_hwif_t *) */ |
525 | ||
806f80a6 BZ |
526 | const struct ide_disk_ops *disk_ops; |
527 | ||
97100fc8 BZ |
528 | unsigned long dev_flags; |
529 | ||
1da177e4 | 530 | unsigned long sleep; /* sleep until this time */ |
1da177e4 LT |
531 | unsigned long timeout; /* max time to wait for irq */ |
532 | ||
533 | special_t special; /* special action flags */ | |
1da177e4 | 534 | |
7f612f27 | 535 | u8 select; /* basic drive/head select reg value */ |
1da177e4 | 536 | u8 retry_pio; /* retrying dma capable host in pio */ |
1da177e4 | 537 | u8 waiting_for_dma; /* dma currently in progress */ |
0a9b6f88 | 538 | u8 dma; /* atapi dma flag */ |
1da177e4 | 539 | |
1da177e4 LT |
540 | u8 quirk_list; /* considered quirky, set for a specific host */ |
541 | u8 init_speed; /* transfer rate set at boot */ | |
1da177e4 | 542 | u8 current_speed; /* current transfer rate set */ |
513daadd | 543 | u8 desired_speed; /* desired transfer rate set */ |
1da177e4 | 544 | u8 dn; /* now wide spread use */ |
1da177e4 LT |
545 | u8 acoustic; /* acoustic management */ |
546 | u8 media; /* disk, cdrom, tape, floppy, ... */ | |
1da177e4 LT |
547 | u8 ready_stat; /* min status value for drive ready */ |
548 | u8 mult_count; /* current multiple sector setting */ | |
549 | u8 mult_req; /* requested multiple sector setting */ | |
1da177e4 | 550 | u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ |
3a7d2484 | 551 | u8 bad_wstat; /* used for ignoring ATA_DF */ |
1da177e4 LT |
552 | u8 head; /* "real" number of heads */ |
553 | u8 sect; /* "real" sectors per track */ | |
554 | u8 bios_head; /* BIOS/fdisk/LILO number of heads */ | |
555 | u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ | |
556 | ||
baf08f0b BZ |
557 | /* delay this long before sending packet command */ |
558 | u8 pc_delay; | |
559 | ||
1da177e4 LT |
560 | unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ |
561 | unsigned int cyl; /* "real" number of cyls */ | |
abb596b2 | 562 | unsigned int drive_data; /* used by set_pio_mode/dev_select() */ |
1da177e4 LT |
563 | unsigned int failures; /* current failure count */ |
564 | unsigned int max_failures; /* maximum allowed failure count */ | |
dbe217af | 565 | u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ |
1da177e4 LT |
566 | |
567 | u64 capacity64; /* total number of sectors */ | |
568 | ||
569 | int lun; /* logical unit */ | |
570 | int crc_count; /* crc counter to reduce drive speed */ | |
b22b2ca4 BP |
571 | |
572 | unsigned long debug_mask; /* debugging levels switch */ | |
573 | ||
e3a59b4d HR |
574 | #ifdef CONFIG_BLK_DEV_IDEACPI |
575 | struct ide_acpi_drive_link *acpidata; | |
576 | #endif | |
1da177e4 LT |
577 | struct list_head list; |
578 | struct device gendev; | |
f36d4024 | 579 | struct completion gendev_rel_comp; /* to deal with device release() */ |
d7c26ebb | 580 | |
2b9efba4 BZ |
581 | /* current packet command */ |
582 | struct ide_atapi_pc *pc; | |
583 | ||
5e2040fd BZ |
584 | /* last failed packet command */ |
585 | struct ide_atapi_pc *failed_pc; | |
586 | ||
d7c26ebb | 587 | /* callback for packet commands */ |
03a2faae | 588 | int (*pc_callback)(struct ide_drive_s *, int); |
3b8ac539 | 589 | |
d6251d44 BP |
590 | ide_startstop_t (*irq_handler)(struct ide_drive_s *); |
591 | ||
3b8ac539 | 592 | unsigned long atapi_flags; |
67c56364 BZ |
593 | |
594 | struct ide_atapi_pc request_sense_pc; | |
a1df5169 BP |
595 | |
596 | /* current sense rq and buffer */ | |
597 | bool sense_rq_armed; | |
598 | struct request sense_rq; | |
599 | struct request_sense sense_data; | |
d7c26ebb BP |
600 | }; |
601 | ||
602 | typedef struct ide_drive_s ide_drive_t; | |
1da177e4 | 603 | |
5aeddf90 BP |
604 | #define to_ide_device(dev) container_of(dev, ide_drive_t, gendev) |
605 | ||
606 | #define to_ide_drv(obj, cont_type) \ | |
8fed4368 | 607 | container_of(obj, struct cont_type, dev) |
5aeddf90 BP |
608 | |
609 | #define ide_drv_g(disk, cont_type) \ | |
610 | container_of((disk)->private_data, struct cont_type, driver) | |
8604affd | 611 | |
039788e1 | 612 | struct ide_port_info; |
1da177e4 | 613 | |
374e042c BZ |
614 | struct ide_tp_ops { |
615 | void (*exec_command)(struct hwif_s *, u8); | |
616 | u8 (*read_status)(struct hwif_s *); | |
617 | u8 (*read_altstatus)(struct hwif_s *); | |
ecf3a31d | 618 | void (*write_devctl)(struct hwif_s *, u8); |
374e042c | 619 | |
abb596b2 | 620 | void (*dev_select)(ide_drive_t *); |
c9ff9e7b | 621 | void (*tf_load)(ide_drive_t *, struct ide_taskfile *, u8); |
3153c26b | 622 | void (*tf_read)(ide_drive_t *, struct ide_taskfile *, u8); |
374e042c | 623 | |
adb1af98 BZ |
624 | void (*input_data)(ide_drive_t *, struct ide_cmd *, |
625 | void *, unsigned int); | |
626 | void (*output_data)(ide_drive_t *, struct ide_cmd *, | |
627 | void *, unsigned int); | |
374e042c BZ |
628 | }; |
629 | ||
630 | extern const struct ide_tp_ops default_tp_ops; | |
631 | ||
39b986a6 BZ |
632 | /** |
633 | * struct ide_port_ops - IDE port operations | |
634 | * | |
635 | * @init_dev: host specific initialization of a device | |
636 | * @set_pio_mode: routine to program host for PIO mode | |
637 | * @set_dma_mode: routine to program host for DMA mode | |
39b986a6 BZ |
638 | * @reset_poll: chipset polling based on hba specifics |
639 | * @pre_reset: chipset specific changes to default for device-hba resets | |
640 | * @resetproc: routine to reset controller after a disk reset | |
641 | * @maskproc: special host masking for drive selection | |
642 | * @quirkproc: check host's drive quirk list | |
bfa7d8e5 | 643 | * @clear_irq: clear IRQ |
39b986a6 BZ |
644 | * |
645 | * @mdma_filter: filter MDMA modes | |
646 | * @udma_filter: filter UDMA modes | |
647 | * | |
648 | * @cable_detect: detect cable type | |
649 | */ | |
ac95beed | 650 | struct ide_port_ops { |
e6d95bd1 | 651 | void (*init_dev)(ide_drive_t *); |
ac95beed | 652 | void (*set_pio_mode)(ide_drive_t *, const u8); |
ac95beed | 653 | void (*set_dma_mode)(ide_drive_t *, const u8); |
ac95beed | 654 | int (*reset_poll)(ide_drive_t *); |
ac95beed | 655 | void (*pre_reset)(ide_drive_t *); |
ac95beed | 656 | void (*resetproc)(ide_drive_t *); |
ac95beed | 657 | void (*maskproc)(ide_drive_t *, int); |
ac95beed | 658 | void (*quirkproc)(ide_drive_t *); |
bfa7d8e5 | 659 | void (*clear_irq)(ide_drive_t *); |
ac95beed BZ |
660 | |
661 | u8 (*mdma_filter)(ide_drive_t *); | |
662 | u8 (*udma_filter)(ide_drive_t *); | |
663 | ||
664 | u8 (*cable_detect)(struct hwif_s *); | |
665 | }; | |
666 | ||
5e37bdc0 BZ |
667 | struct ide_dma_ops { |
668 | void (*dma_host_set)(struct ide_drive_s *, int); | |
22981694 | 669 | int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *); |
5e37bdc0 BZ |
670 | void (*dma_start)(struct ide_drive_s *); |
671 | int (*dma_end)(struct ide_drive_s *); | |
672 | int (*dma_test_irq)(struct ide_drive_s *); | |
673 | void (*dma_lost_irq)(struct ide_drive_s *); | |
35c9b4da | 674 | /* below ones are optional */ |
8a4a5738 | 675 | int (*dma_check)(struct ide_drive_s *, struct ide_cmd *); |
22117d6e | 676 | int (*dma_timer_expiry)(struct ide_drive_s *); |
35c9b4da | 677 | void (*dma_clear)(struct ide_drive_s *); |
592b5315 SS |
678 | /* |
679 | * The following method is optional and only required to be | |
680 | * implemented for the SFF-8038i compatible controllers. | |
681 | */ | |
682 | u8 (*dma_sff_read_status)(struct hwif_s *); | |
5e37bdc0 BZ |
683 | }; |
684 | ||
08da591e BZ |
685 | struct ide_host; |
686 | ||
1da177e4 | 687 | typedef struct hwif_s { |
1da177e4 | 688 | struct hwif_s *mate; /* other hwif from same PCI chip */ |
1da177e4 LT |
689 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
690 | ||
08da591e BZ |
691 | struct ide_host *host; |
692 | ||
1da177e4 LT |
693 | char name[6]; /* name of interface, eg. "ide0" */ |
694 | ||
4c3032d8 BZ |
695 | struct ide_io_ports io_ports; |
696 | ||
1da177e4 | 697 | unsigned long sata_scr[SATA_NR_PORTS]; |
1da177e4 | 698 | |
2bd24a1c | 699 | ide_drive_t *devices[MAX_DRIVES + 1]; |
1da177e4 LT |
700 | |
701 | u8 major; /* our major number */ | |
702 | u8 index; /* 0 for ide0; 1 for ide1; ... */ | |
703 | u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ | |
1da177e4 | 704 | |
e95d9c6b | 705 | u32 host_flags; |
6a824c92 | 706 | |
4099d143 BZ |
707 | u8 pio_mask; |
708 | ||
1da177e4 LT |
709 | u8 ultra_mask; |
710 | u8 mwdma_mask; | |
711 | u8 swdma_mask; | |
712 | ||
49521f97 BZ |
713 | u8 cbl; /* cable type */ |
714 | ||
1da177e4 LT |
715 | hwif_chipset_t chipset; /* sub-module for tuning.. */ |
716 | ||
36501650 BZ |
717 | struct device *dev; |
718 | ||
18e181fe BZ |
719 | ide_ack_intr_t *ack_intr; |
720 | ||
1da177e4 LT |
721 | void (*rw_disk)(ide_drive_t *, struct request *); |
722 | ||
374e042c | 723 | const struct ide_tp_ops *tp_ops; |
ac95beed | 724 | const struct ide_port_ops *port_ops; |
f37afdac | 725 | const struct ide_dma_ops *dma_ops; |
bfa14b42 | 726 | |
1da177e4 LT |
727 | /* dma physical region descriptor table (cpu view) */ |
728 | unsigned int *dmatable_cpu; | |
729 | /* dma physical region descriptor table (dma view) */ | |
730 | dma_addr_t dmatable_dma; | |
2bbd57ca BZ |
731 | |
732 | /* maximum number of PRD table entries */ | |
733 | int prd_max_nents; | |
734 | /* PRD entry size in bytes */ | |
735 | int prd_ent_size; | |
736 | ||
1da177e4 LT |
737 | /* Scatter-gather list used to build the above */ |
738 | struct scatterlist *sg_table; | |
739 | int sg_max_nents; /* Maximum number of entries in it */ | |
1da177e4 | 740 | |
22aa4b32 | 741 | struct ide_cmd cmd; /* current command */ |
d6ff9f64 | 742 | |
1da177e4 LT |
743 | int rqsize; /* max sectors per request */ |
744 | int irq; /* our irq number */ | |
745 | ||
1da177e4 | 746 | unsigned long dma_base; /* base addr for dma ports */ |
1da177e4 | 747 | |
1da177e4 LT |
748 | unsigned long config_data; /* for use by chipset-specific code */ |
749 | unsigned long select_data; /* for use by chipset-specific code */ | |
750 | ||
020e322d SS |
751 | unsigned long extra_base; /* extra addr for dma ports */ |
752 | unsigned extra_ports; /* number of extra dma ports */ | |
753 | ||
1da177e4 | 754 | unsigned present : 1; /* this interface exists */ |
5b31f855 | 755 | unsigned busy : 1; /* serializes devices on a port */ |
1da177e4 | 756 | |
f74c9141 BZ |
757 | struct device gendev; |
758 | struct device *portdev; | |
759 | ||
f36d4024 | 760 | struct completion gendev_rel_comp; /* To deal with device release() */ |
1da177e4 LT |
761 | |
762 | void *hwif_data; /* extra hwif data */ | |
763 | ||
e3a59b4d HR |
764 | #ifdef CONFIG_BLK_DEV_IDEACPI |
765 | struct ide_acpi_hwif_link *acpidata; | |
766 | #endif | |
b65fac32 BZ |
767 | |
768 | /* IRQ handler, if active */ | |
769 | ide_startstop_t (*handler)(ide_drive_t *); | |
770 | ||
771 | /* BOOL: polling active & poll_timeout field valid */ | |
772 | unsigned int polling : 1; | |
773 | ||
774 | /* current drive */ | |
775 | ide_drive_t *cur_dev; | |
776 | ||
777 | /* current request */ | |
778 | struct request *rq; | |
779 | ||
780 | /* failsafe timer */ | |
781 | struct timer_list timer; | |
782 | /* timeout value during long polls */ | |
783 | unsigned long poll_timeout; | |
784 | /* queried upon timeouts */ | |
785 | int (*expiry)(ide_drive_t *); | |
786 | ||
787 | int req_gen; | |
788 | int req_gen_timer; | |
789 | ||
790 | spinlock_t lock; | |
22fc6ecc | 791 | } ____cacheline_internodealigned_in_smp ide_hwif_t; |
1da177e4 | 792 | |
a36223b0 BZ |
793 | #define MAX_HOST_PORTS 4 |
794 | ||
48c3c107 | 795 | struct ide_host { |
2bd24a1c | 796 | ide_hwif_t *ports[MAX_HOST_PORTS + 1]; |
48c3c107 | 797 | unsigned int n_ports; |
6cdf6eb3 | 798 | struct device *dev[2]; |
e354c1d8 | 799 | |
2ed0ef54 | 800 | int (*init_chipset)(struct pci_dev *); |
e354c1d8 BZ |
801 | |
802 | void (*get_lock)(irq_handler_t, void *); | |
803 | void (*release_lock)(void); | |
804 | ||
849d7130 | 805 | irq_handler_t irq_handler; |
e354c1d8 | 806 | |
ef0b0427 | 807 | unsigned long host_flags; |
255115fb BZ |
808 | |
809 | int irq_flags; | |
810 | ||
6cdf6eb3 | 811 | void *host_priv; |
bd53cbcc | 812 | ide_hwif_t *cur_port; /* for hosts requiring serialization */ |
5b31f855 BZ |
813 | |
814 | /* used for hosts requiring serialization */ | |
e720b9e4 | 815 | volatile unsigned long host_busy; |
48c3c107 BZ |
816 | }; |
817 | ||
5b31f855 BZ |
818 | #define IDE_HOST_BUSY 0 |
819 | ||
1da177e4 LT |
820 | /* |
821 | * internal ide interrupt handler type | |
822 | */ | |
1da177e4 LT |
823 | typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); |
824 | typedef int (ide_expiry_t)(ide_drive_t *); | |
825 | ||
0eea6458 | 826 | /* used by ide-cd, ide-floppy, etc. */ |
adb1af98 | 827 | typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned); |
0eea6458 | 828 | |
f9383c42 | 829 | extern struct mutex ide_setting_mtx; |
1da177e4 | 830 | |
92f1f8fd EO |
831 | /* |
832 | * configurable drive settings | |
833 | */ | |
834 | ||
835 | #define DS_SYNC (1 << 0) | |
836 | ||
837 | struct ide_devset { | |
838 | int (*get)(ide_drive_t *); | |
839 | int (*set)(ide_drive_t *, int); | |
840 | unsigned int flags; | |
841 | }; | |
842 | ||
843 | #define __DEVSET(_flags, _get, _set) { \ | |
844 | .flags = _flags, \ | |
845 | .get = _get, \ | |
846 | .set = _set, \ | |
847 | } | |
7662d046 | 848 | |
8185d5aa | 849 | #define ide_devset_get(name, field) \ |
92f1f8fd | 850 | static int get_##name(ide_drive_t *drive) \ |
8185d5aa BZ |
851 | { \ |
852 | return drive->field; \ | |
853 | } | |
854 | ||
855 | #define ide_devset_set(name, field) \ | |
92f1f8fd | 856 | static int set_##name(ide_drive_t *drive, int arg) \ |
8185d5aa BZ |
857 | { \ |
858 | drive->field = arg; \ | |
859 | return 0; \ | |
860 | } | |
861 | ||
97100fc8 BZ |
862 | #define ide_devset_get_flag(name, flag) \ |
863 | static int get_##name(ide_drive_t *drive) \ | |
864 | { \ | |
865 | return !!(drive->dev_flags & flag); \ | |
866 | } | |
867 | ||
868 | #define ide_devset_set_flag(name, flag) \ | |
869 | static int set_##name(ide_drive_t *drive, int arg) \ | |
870 | { \ | |
871 | if (arg) \ | |
872 | drive->dev_flags |= flag; \ | |
873 | else \ | |
874 | drive->dev_flags &= ~flag; \ | |
875 | return 0; \ | |
876 | } | |
877 | ||
92f1f8fd EO |
878 | #define __IDE_DEVSET(_name, _flags, _get, _set) \ |
879 | const struct ide_devset ide_devset_##_name = \ | |
880 | __DEVSET(_flags, _get, _set) | |
881 | ||
882 | #define IDE_DEVSET(_name, _flags, _get, _set) \ | |
883 | static __IDE_DEVSET(_name, _flags, _get, _set) | |
884 | ||
885 | #define ide_devset_rw(_name, _func) \ | |
886 | IDE_DEVSET(_name, 0, get_##_func, set_##_func) | |
887 | ||
888 | #define ide_devset_w(_name, _func) \ | |
889 | IDE_DEVSET(_name, 0, NULL, set_##_func) | |
890 | ||
f8790489 BZ |
891 | #define ide_ext_devset_rw(_name, _func) \ |
892 | __IDE_DEVSET(_name, 0, get_##_func, set_##_func) | |
893 | ||
894 | #define ide_ext_devset_rw_sync(_name, _func) \ | |
895 | __IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func) | |
92f1f8fd EO |
896 | |
897 | #define ide_decl_devset(_name) \ | |
898 | extern const struct ide_devset ide_devset_##_name | |
899 | ||
900 | ide_decl_devset(io_32bit); | |
901 | ide_decl_devset(keepsettings); | |
902 | ide_decl_devset(pio_mode); | |
903 | ide_decl_devset(unmaskirq); | |
904 | ide_decl_devset(using_dma); | |
905 | ||
7662d046 | 906 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 | 907 | /* |
92f1f8fd | 908 | * /proc/ide interface |
1da177e4 LT |
909 | */ |
910 | ||
92f1f8fd EO |
911 | #define ide_devset_rw_field(_name, _field) \ |
912 | ide_devset_get(_name, _field); \ | |
913 | ide_devset_set(_name, _field); \ | |
914 | IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) | |
915 | ||
97100fc8 BZ |
916 | #define ide_devset_rw_flag(_name, _field) \ |
917 | ide_devset_get_flag(_name, _field); \ | |
918 | ide_devset_set_flag(_name, _field); \ | |
919 | IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) | |
920 | ||
92f1f8fd EO |
921 | struct ide_proc_devset { |
922 | const char *name; | |
923 | const struct ide_devset *setting; | |
924 | int min, max; | |
925 | int (*mulf)(ide_drive_t *); | |
926 | int (*divf)(ide_drive_t *); | |
8185d5aa BZ |
927 | }; |
928 | ||
92f1f8fd EO |
929 | #define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \ |
930 | .name = __stringify(_name), \ | |
931 | .setting = &ide_devset_##_name, \ | |
932 | .min = _min, \ | |
933 | .max = _max, \ | |
934 | .mulf = _mulf, \ | |
935 | .divf = _divf, \ | |
8185d5aa BZ |
936 | } |
937 | ||
92f1f8fd EO |
938 | #define IDE_PROC_DEVSET(_name, _min, _max) \ |
939 | __IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL) | |
8185d5aa | 940 | |
1da177e4 LT |
941 | typedef struct { |
942 | const char *name; | |
943 | mode_t mode; | |
944 | read_proc_t *read_proc; | |
945 | write_proc_t *write_proc; | |
946 | } ide_proc_entry_t; | |
947 | ||
ecfd80e4 BZ |
948 | void proc_ide_create(void); |
949 | void proc_ide_destroy(void); | |
5cbf79cd | 950 | void ide_proc_register_port(ide_hwif_t *); |
d9270a3f | 951 | void ide_proc_port_register_devices(ide_hwif_t *); |
5b0c4b30 | 952 | void ide_proc_unregister_device(ide_drive_t *); |
5cbf79cd | 953 | void ide_proc_unregister_port(ide_hwif_t *); |
7f3c868b BZ |
954 | void ide_proc_register_driver(ide_drive_t *, struct ide_driver *); |
955 | void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *); | |
7662d046 | 956 | |
1da177e4 LT |
957 | read_proc_t proc_ide_read_capacity; |
958 | read_proc_t proc_ide_read_geometry; | |
959 | ||
1da177e4 LT |
960 | /* |
961 | * Standard exit stuff: | |
962 | */ | |
963 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \ | |
964 | { \ | |
965 | len -= off; \ | |
966 | if (len < count) { \ | |
967 | *eof = 1; \ | |
968 | if (len <= 0) \ | |
969 | return 0; \ | |
970 | } else \ | |
971 | len = count; \ | |
972 | *start = page + off; \ | |
973 | return len; \ | |
974 | } | |
975 | #else | |
ecfd80e4 BZ |
976 | static inline void proc_ide_create(void) { ; } |
977 | static inline void proc_ide_destroy(void) { ; } | |
5cbf79cd | 978 | static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } |
d9270a3f | 979 | static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; } |
5b0c4b30 | 980 | static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; } |
5cbf79cd | 981 | static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } |
7f3c868b BZ |
982 | static inline void ide_proc_register_driver(ide_drive_t *drive, |
983 | struct ide_driver *driver) { ; } | |
984 | static inline void ide_proc_unregister_driver(ide_drive_t *drive, | |
985 | struct ide_driver *driver) { ; } | |
1da177e4 LT |
986 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0; |
987 | #endif | |
988 | ||
e1c7c464 BP |
989 | enum { |
990 | /* enter/exit functions */ | |
991 | IDE_DBG_FUNC = (1 << 0), | |
992 | /* sense key/asc handling */ | |
993 | IDE_DBG_SENSE = (1 << 1), | |
994 | /* packet commands handling */ | |
995 | IDE_DBG_PC = (1 << 2), | |
996 | /* request handling */ | |
997 | IDE_DBG_RQ = (1 << 3), | |
998 | /* driver probing/setup */ | |
999 | IDE_DBG_PROBE = (1 << 4), | |
1000 | }; | |
1001 | ||
1002 | /* DRV_NAME has to be defined in the driver before using the macro below */ | |
088b1b88 BP |
1003 | #define __ide_debug_log(lvl, fmt, args...) \ |
1004 | { \ | |
1005 | if (unlikely(drive->debug_mask & lvl)) \ | |
1006 | printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \ | |
1007 | __func__, ## args); \ | |
e1c7c464 BP |
1008 | } |
1009 | ||
1da177e4 | 1010 | /* |
0d346ba0 | 1011 | * Power Management state machine (rq->pm->pm_step). |
1da177e4 | 1012 | * |
0d346ba0 | 1013 | * For each step, the core calls ide_start_power_step() first. |
1da177e4 LT |
1014 | * This can return: |
1015 | * - ide_stopped : In this case, the core calls us back again unless | |
1016 | * step have been set to ide_power_state_completed. | |
1017 | * - ide_started : In this case, the channel is left busy until an | |
1018 | * async event (interrupt) occurs. | |
0d346ba0 | 1019 | * Typically, ide_start_power_step() will issue a taskfile request with |
1da177e4 LT |
1020 | * do_rw_taskfile(). |
1021 | * | |
0d346ba0 | 1022 | * Upon reception of the interrupt, the core will call ide_complete_power_step() |
1da177e4 LT |
1023 | * with the error code if any. This routine should update the step value |
1024 | * and return. It should not start a new request. The core will call | |
0d346ba0 BZ |
1025 | * ide_start_power_step() for the new step value, unless step have been |
1026 | * set to IDE_PM_COMPLETED. | |
1da177e4 | 1027 | */ |
1da177e4 | 1028 | enum { |
0d346ba0 BZ |
1029 | IDE_PM_START_SUSPEND, |
1030 | IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND, | |
1031 | IDE_PM_STANDBY, | |
1032 | ||
1033 | IDE_PM_START_RESUME, | |
1034 | IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME, | |
1035 | IDE_PM_IDLE, | |
1036 | IDE_PM_RESTORE_DMA, | |
1037 | ||
1038 | IDE_PM_COMPLETED, | |
1da177e4 LT |
1039 | }; |
1040 | ||
e2984c62 BZ |
1041 | int generic_ide_suspend(struct device *, pm_message_t); |
1042 | int generic_ide_resume(struct device *); | |
1043 | ||
1044 | void ide_complete_power_step(ide_drive_t *, struct request *); | |
1045 | ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *); | |
3616b653 | 1046 | void ide_complete_pm_rq(ide_drive_t *, struct request *); |
e2984c62 BZ |
1047 | void ide_check_pm_state(ide_drive_t *, struct request *); |
1048 | ||
1da177e4 LT |
1049 | /* |
1050 | * Subdrivers support. | |
4ef3b8f4 LR |
1051 | * |
1052 | * The gendriver.owner field should be set to the module owner of this driver. | |
1053 | * The gendriver.name field should be set to the name of this driver | |
1da177e4 | 1054 | */ |
7f3c868b | 1055 | struct ide_driver { |
1da177e4 | 1056 | const char *version; |
1da177e4 | 1057 | ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); |
1da177e4 | 1058 | struct device_driver gen_driver; |
4031bbe4 RK |
1059 | int (*probe)(ide_drive_t *); |
1060 | void (*remove)(ide_drive_t *); | |
0d2157f7 | 1061 | void (*resume)(ide_drive_t *); |
4031bbe4 | 1062 | void (*shutdown)(ide_drive_t *); |
7662d046 | 1063 | #ifdef CONFIG_IDE_PROC_FS |
79cb3803 BZ |
1064 | ide_proc_entry_t * (*proc_entries)(ide_drive_t *); |
1065 | const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *); | |
7662d046 BZ |
1066 | #endif |
1067 | }; | |
1da177e4 | 1068 | |
7f3c868b | 1069 | #define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver) |
4031bbe4 | 1070 | |
08da591e BZ |
1071 | int ide_device_get(ide_drive_t *); |
1072 | void ide_device_put(ide_drive_t *); | |
1073 | ||
aa768773 BZ |
1074 | struct ide_ioctl_devset { |
1075 | unsigned int get_ioctl; | |
1076 | unsigned int set_ioctl; | |
92f1f8fd | 1077 | const struct ide_devset *setting; |
aa768773 BZ |
1078 | }; |
1079 | ||
1080 | int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int, | |
1081 | unsigned long, const struct ide_ioctl_devset *); | |
1082 | ||
1bddd9e6 | 1083 | int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long); |
1da177e4 | 1084 | |
ebae41a5 BZ |
1085 | extern int ide_vlb_clk; |
1086 | extern int ide_pci_clk; | |
1087 | ||
130e8867 | 1088 | unsigned int ide_rq_bytes(struct request *); |
1caf236d | 1089 | int ide_end_rq(ide_drive_t *, struct request *, int, unsigned int); |
327fa1c2 BZ |
1090 | void ide_kill_rq(ide_drive_t *, struct request *); |
1091 | ||
60c0cd02 BZ |
1092 | void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int); |
1093 | void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int); | |
1da177e4 | 1094 | |
35b5d0be BZ |
1095 | void ide_execute_command(ide_drive_t *, struct ide_cmd *, ide_handler_t *, |
1096 | unsigned int); | |
1fc14258 | 1097 | |
9f87abe8 BZ |
1098 | void ide_pad_transfer(ide_drive_t *, int, int); |
1099 | ||
9892ec54 | 1100 | ide_startstop_t ide_error(ide_drive_t *, const char *, u8); |
1da177e4 | 1101 | |
4dde4492 | 1102 | void ide_fix_driveid(u16 *); |
01745112 | 1103 | |
1da177e4 LT |
1104 | extern void ide_fixstring(u8 *, const int, const int); |
1105 | ||
b163f46d BZ |
1106 | int ide_busy_sleep(ide_hwif_t *, unsigned long, int); |
1107 | ||
74af21cf | 1108 | int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); |
1da177e4 | 1109 | |
c4e66c36 | 1110 | ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *); |
11938c92 | 1111 | ide_startstop_t ide_do_devset(ide_drive_t *, struct request *); |
c4e66c36 | 1112 | |
1da177e4 LT |
1113 | extern ide_startstop_t ide_do_reset (ide_drive_t *); |
1114 | ||
92f1f8fd EO |
1115 | extern int ide_devset_execute(ide_drive_t *drive, |
1116 | const struct ide_devset *setting, int arg); | |
1117 | ||
22aa4b32 | 1118 | void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8); |
f974b196 | 1119 | int ide_complete_rq(ide_drive_t *, int, unsigned int); |
1da177e4 | 1120 | |
3153c26b | 1121 | void ide_tf_readback(ide_drive_t *drive, struct ide_cmd *cmd); |
745483f1 | 1122 | void ide_tf_dump(const char *, struct ide_cmd *); |
1da177e4 | 1123 | |
374e042c BZ |
1124 | void ide_exec_command(ide_hwif_t *, u8); |
1125 | u8 ide_read_status(ide_hwif_t *); | |
1126 | u8 ide_read_altstatus(ide_hwif_t *); | |
ecf3a31d | 1127 | void ide_write_devctl(ide_hwif_t *, u8); |
374e042c | 1128 | |
abb596b2 | 1129 | void ide_dev_select(ide_drive_t *); |
c9ff9e7b | 1130 | void ide_tf_load(ide_drive_t *, struct ide_taskfile *, u8); |
3153c26b | 1131 | void ide_tf_read(ide_drive_t *, struct ide_taskfile *, u8); |
374e042c | 1132 | |
adb1af98 BZ |
1133 | void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int); |
1134 | void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int); | |
374e042c | 1135 | |
ed4af48f | 1136 | void SELECT_MASK(ide_drive_t *, int); |
1da177e4 | 1137 | |
92eb4380 | 1138 | u8 ide_read_error(ide_drive_t *); |
1823649b | 1139 | void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *); |
92eb4380 | 1140 | |
51509eec BZ |
1141 | int ide_check_atapi_device(ide_drive_t *, const char *); |
1142 | ||
7bf7420a BZ |
1143 | void ide_init_pc(struct ide_atapi_pc *); |
1144 | ||
4abdc6ee EO |
1145 | /* Disk head parking */ |
1146 | extern wait_queue_head_t ide_park_wq; | |
1147 | ssize_t ide_park_show(struct device *dev, struct device_attribute *attr, | |
1148 | char *buf); | |
1149 | ssize_t ide_park_store(struct device *dev, struct device_attribute *attr, | |
1150 | const char *buf, size_t len); | |
1151 | ||
7645c151 BZ |
1152 | /* |
1153 | * Special requests for ide-tape block device strategy routine. | |
1154 | * | |
1155 | * In order to service a character device command, we add special requests to | |
1156 | * the tail of our block device request queue and wait for their completion. | |
1157 | */ | |
1158 | enum { | |
1159 | REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */ | |
1160 | REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */ | |
1161 | REQ_IDETAPE_READ = (1 << 2), | |
1162 | REQ_IDETAPE_WRITE = (1 << 3), | |
1163 | }; | |
1164 | ||
2ac07d92 | 1165 | int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *); |
7645c151 | 1166 | |
de699ad5 | 1167 | int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *); |
0c8a6c7a | 1168 | int ide_do_start_stop(ide_drive_t *, struct gendisk *, int); |
0578042d | 1169 | int ide_set_media_lock(ide_drive_t *, struct gendisk *, int); |
6b0da28b | 1170 | void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *); |
6b544fcc | 1171 | void ide_retry_pc(ide_drive_t *drive); |
0578042d | 1172 | |
a1df5169 | 1173 | void ide_prep_sense(ide_drive_t *drive, struct request *rq); |
5c4be572 | 1174 | int ide_queue_sense_rq(ide_drive_t *drive, void *special); |
a1df5169 | 1175 | |
4cad085e | 1176 | int ide_cd_expiry(ide_drive_t *); |
844b9468 | 1177 | |
392de1d5 BP |
1178 | int ide_cd_get_xferlen(struct request *); |
1179 | ||
b788ee9c | 1180 | ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_cmd *); |
594c16d8 | 1181 | |
22aa4b32 | 1182 | ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *); |
1da177e4 | 1183 | |
a08915ba BZ |
1184 | void ide_pio_bytes(ide_drive_t *, struct ide_cmd *, unsigned int, unsigned int); |
1185 | ||
adb1af98 | 1186 | void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8); |
4d7a984b | 1187 | |
22aa4b32 BZ |
1188 | int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16); |
1189 | int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *); | |
9a3c49be | 1190 | |
22aa4b32 | 1191 | int ide_taskfile_ioctl(ide_drive_t *, unsigned long); |
1da177e4 | 1192 | |
2ebe1d9e BZ |
1193 | int ide_dev_read_id(ide_drive_t *, u8, u16 *); |
1194 | ||
1da177e4 | 1195 | extern int ide_driveid_update(ide_drive_t *); |
1da177e4 LT |
1196 | extern int ide_config_drive_speed(ide_drive_t *, u8); |
1197 | extern u8 eighty_ninty_three (ide_drive_t *); | |
1da177e4 LT |
1198 | extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); |
1199 | ||
1200 | extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); | |
1201 | ||
1da177e4 LT |
1202 | extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); |
1203 | ||
1da177e4 | 1204 | extern void ide_timer_expiry(unsigned long); |
7d12e780 | 1205 | extern irqreturn_t ide_intr(int irq, void *dev_id); |
165125e1 | 1206 | extern void do_ide_request(struct request_queue *); |
1da177e4 LT |
1207 | |
1208 | void ide_init_disk(struct gendisk *, ide_drive_t *); | |
1209 | ||
6d208b39 | 1210 | #ifdef CONFIG_IDEPCI_PCIBUS_ORDER |
725522b5 GKH |
1211 | extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); |
1212 | #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) | |
6d208b39 BZ |
1213 | #else |
1214 | #define ide_pci_register_driver(d) pci_register_driver(d) | |
1215 | #endif | |
1216 | ||
6636487e BZ |
1217 | static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev) |
1218 | { | |
1219 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) | |
1220 | return 1; | |
1221 | return 0; | |
1222 | } | |
1223 | ||
86ccf37c | 1224 | void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, |
48c3c107 | 1225 | hw_regs_t *, hw_regs_t **); |
85620436 | 1226 | void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); |
1da177e4 | 1227 | |
8e882ba1 | 1228 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI |
b123f56e BZ |
1229 | int ide_pci_set_master(struct pci_dev *, const char *); |
1230 | unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *); | |
ebb00fb5 | 1231 | int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *); |
b123f56e | 1232 | int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *); |
c413b9b9 | 1233 | #else |
b123f56e BZ |
1234 | static inline int ide_hwif_setup_dma(ide_hwif_t *hwif, |
1235 | const struct ide_port_info *d) | |
1236 | { | |
1237 | return -EINVAL; | |
1238 | } | |
c413b9b9 BZ |
1239 | #endif |
1240 | ||
c0ae5023 | 1241 | struct ide_pci_enablebit { |
1da177e4 LT |
1242 | u8 reg; /* byte pci reg holding the enable-bit */ |
1243 | u8 mask; /* mask to isolate the enable-bit */ | |
1244 | u8 val; /* value of masked reg when "enabled" */ | |
c0ae5023 | 1245 | }; |
1da177e4 LT |
1246 | |
1247 | enum { | |
1248 | /* Uses ISA control ports not PCI ones. */ | |
a5d8c5c8 | 1249 | IDE_HFLAG_ISA_PORTS = (1 << 0), |
6a824c92 | 1250 | /* single port device */ |
a5d8c5c8 | 1251 | IDE_HFLAG_SINGLE = (1 << 1), |
6a824c92 BZ |
1252 | /* don't use legacy PIO blacklist */ |
1253 | IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), | |
e277f91f BZ |
1254 | /* set for the second port of QD65xx */ |
1255 | IDE_HFLAG_QD_2ND_PORT = (1 << 3), | |
26bcb879 BZ |
1256 | /* use PIO8/9 for prefetch off/on */ |
1257 | IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), | |
1258 | /* use PIO6/7 for fast-devsel off/on */ | |
1259 | IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), | |
1260 | /* use 100-102 and 200-202 PIO values to set DMA modes */ | |
1261 | IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), | |
aedea591 BZ |
1262 | /* |
1263 | * keep DMA setting when programming PIO mode, may be used only | |
1264 | * for hosts which have separate PIO and DMA timings (ie. PMAC) | |
1265 | */ | |
1266 | IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), | |
88b2b32b BZ |
1267 | /* program host for the transfer mode after programming device */ |
1268 | IDE_HFLAG_POST_SET_MODE = (1 << 8), | |
1269 | /* don't program host/device for the transfer mode ("smart" hosts) */ | |
1270 | IDE_HFLAG_NO_SET_MODE = (1 << 9), | |
0ae2e178 BZ |
1271 | /* trust BIOS for programming chipset/device for DMA */ |
1272 | IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), | |
cafa027b BZ |
1273 | /* host is CS5510/CS5520 */ |
1274 | IDE_HFLAG_CS5520 = (1 << 11), | |
33c1002e BZ |
1275 | /* ATAPI DMA is unsupported */ |
1276 | IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), | |
5e71d9c5 BZ |
1277 | /* set if host is a "non-bootable" controller */ |
1278 | IDE_HFLAG_NON_BOOTABLE = (1 << 13), | |
47b68788 BZ |
1279 | /* host doesn't support DMA */ |
1280 | IDE_HFLAG_NO_DMA = (1 << 14), | |
1281 | /* check if host is PCI IDE device before allowing DMA */ | |
1282 | IDE_HFLAG_NO_AUTODMA = (1 << 15), | |
c5dd43ec BZ |
1283 | /* host uses MMIO */ |
1284 | IDE_HFLAG_MMIO = (1 << 16), | |
238e4f14 BZ |
1285 | /* no LBA48 */ |
1286 | IDE_HFLAG_NO_LBA48 = (1 << 17), | |
1287 | /* no LBA48 DMA */ | |
1288 | IDE_HFLAG_NO_LBA48_DMA = (1 << 18), | |
ed67b923 BZ |
1289 | /* data FIFO is cleared by an error */ |
1290 | IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), | |
1c51361a BZ |
1291 | /* serialize ports */ |
1292 | IDE_HFLAG_SERIALIZE = (1 << 20), | |
2787cb8a BZ |
1293 | /* host is DTC2278 */ |
1294 | IDE_HFLAG_DTC2278 = (1 << 21), | |
c094ea07 BZ |
1295 | /* 4 devices on a single set of I/O ports */ |
1296 | IDE_HFLAG_4DRIVES = (1 << 22), | |
1f66019b BZ |
1297 | /* host is TRM290 */ |
1298 | IDE_HFLAG_TRM290 = (1 << 23), | |
caea7602 BZ |
1299 | /* use 32-bit I/O ops */ |
1300 | IDE_HFLAG_IO_32BIT = (1 << 24), | |
1301 | /* unmask IRQs */ | |
1302 | IDE_HFLAG_UNMASK_IRQS = (1 << 25), | |
6636487e | 1303 | IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26), |
1fd18905 BZ |
1304 | /* serialize ports if DMA is possible (for sl82c105) */ |
1305 | IDE_HFLAG_SERIALIZE_DMA = (1 << 27), | |
8ac2b42a BZ |
1306 | /* force host out of "simplex" mode */ |
1307 | IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28), | |
4166c199 BZ |
1308 | /* DSC overlap is unsupported */ |
1309 | IDE_HFLAG_NO_DSC = (1 << 29), | |
807b90d0 BZ |
1310 | /* never use 32-bit I/O ops */ |
1311 | IDE_HFLAG_NO_IO_32BIT = (1 << 30), | |
1312 | /* never unmask IRQs */ | |
1313 | IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31), | |
1da177e4 LT |
1314 | }; |
1315 | ||
7cab14a7 | 1316 | #ifdef CONFIG_BLK_DEV_OFFBOARD |
7cab14a7 | 1317 | # define IDE_HFLAG_OFF_BOARD 0 |
5e71d9c5 BZ |
1318 | #else |
1319 | # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE | |
7cab14a7 BZ |
1320 | #endif |
1321 | ||
039788e1 | 1322 | struct ide_port_info { |
1da177e4 | 1323 | char *name; |
e354c1d8 | 1324 | |
2ed0ef54 | 1325 | int (*init_chipset)(struct pci_dev *); |
e354c1d8 BZ |
1326 | |
1327 | void (*get_lock)(irq_handler_t, void *); | |
1328 | void (*release_lock)(void); | |
1329 | ||
1da177e4 LT |
1330 | void (*init_iops)(ide_hwif_t *); |
1331 | void (*init_hwif)(ide_hwif_t *); | |
b123f56e BZ |
1332 | int (*init_dma)(ide_hwif_t *, |
1333 | const struct ide_port_info *); | |
ac95beed | 1334 | |
374e042c | 1335 | const struct ide_tp_ops *tp_ops; |
ac95beed | 1336 | const struct ide_port_ops *port_ops; |
f37afdac | 1337 | const struct ide_dma_ops *dma_ops; |
ac95beed | 1338 | |
c0ae5023 BZ |
1339 | struct ide_pci_enablebit enablebits[2]; |
1340 | ||
528a572d | 1341 | hwif_chipset_t chipset; |
6b492496 BZ |
1342 | |
1343 | u16 max_sectors; /* if < than the default one */ | |
1344 | ||
9ffcf364 | 1345 | u32 host_flags; |
255115fb BZ |
1346 | |
1347 | int irq_flags; | |
1348 | ||
4099d143 | 1349 | u8 pio_mask; |
5f8b6c34 BZ |
1350 | u8 swdma_mask; |
1351 | u8 mwdma_mask; | |
18137207 | 1352 | u8 udma_mask; |
039788e1 | 1353 | }; |
1da177e4 | 1354 | |
6cdf6eb3 BZ |
1355 | int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *); |
1356 | int ide_pci_init_two(struct pci_dev *, struct pci_dev *, | |
1357 | const struct ide_port_info *, void *); | |
ef0b0427 | 1358 | void ide_pci_remove(struct pci_dev *); |
1da177e4 | 1359 | |
feb22b7f BZ |
1360 | #ifdef CONFIG_PM |
1361 | int ide_pci_suspend(struct pci_dev *, pm_message_t); | |
1362 | int ide_pci_resume(struct pci_dev *); | |
1363 | #else | |
1364 | #define ide_pci_suspend NULL | |
1365 | #define ide_pci_resume NULL | |
1366 | #endif | |
1367 | ||
22981694 | 1368 | void ide_map_sg(ide_drive_t *, struct ide_cmd *); |
bf717c0a | 1369 | void ide_init_sg_cmd(struct ide_cmd *, unsigned int); |
1da177e4 LT |
1370 | |
1371 | #define BAD_DMA_DRIVE 0 | |
1372 | #define GOOD_DMA_DRIVE 1 | |
1373 | ||
65e5f2e3 JC |
1374 | struct drive_list_entry { |
1375 | const char *id_model; | |
1376 | const char *id_firmware; | |
1377 | }; | |
1378 | ||
4dde4492 | 1379 | int ide_in_drive_list(u16 *, const struct drive_list_entry *); |
a5b7e70d BZ |
1380 | |
1381 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
2dbe7e91 | 1382 | int ide_dma_good_drive(ide_drive_t *); |
1da177e4 | 1383 | int __ide_dma_bad_drive(ide_drive_t *); |
3ab7efe8 | 1384 | int ide_id_dma_bug(ide_drive_t *); |
7670df73 BZ |
1385 | |
1386 | u8 ide_find_dma_mode(ide_drive_t *, u8); | |
1387 | ||
1388 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) | |
1389 | { | |
1390 | return ide_find_dma_mode(drive, XFER_UDMA_6); | |
1391 | } | |
1392 | ||
4a546e04 | 1393 | void ide_dma_off_quietly(ide_drive_t *); |
7469aaf6 | 1394 | void ide_dma_off(ide_drive_t *); |
4a546e04 | 1395 | void ide_dma_on(ide_drive_t *); |
3608b5d7 | 1396 | int ide_set_dma(ide_drive_t *); |
578cfa0d | 1397 | void ide_check_dma_crc(ide_drive_t *); |
1da177e4 LT |
1398 | ide_startstop_t ide_dma_intr(ide_drive_t *); |
1399 | ||
2bbd57ca BZ |
1400 | int ide_allocate_dma_engine(ide_hwif_t *); |
1401 | void ide_release_dma_engine(ide_hwif_t *); | |
1402 | ||
5ae5412d | 1403 | int ide_dma_prepare(ide_drive_t *, struct ide_cmd *); |
f094d4d8 | 1404 | void ide_dma_unmap_sg(ide_drive_t *, struct ide_cmd *); |
062f9f02 | 1405 | |
8e882ba1 | 1406 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF |
2dbe7e91 | 1407 | int config_drive_for_dma(ide_drive_t *); |
22981694 | 1408 | int ide_build_dmatable(ide_drive_t *, struct ide_cmd *); |
15ce926a | 1409 | void ide_dma_host_set(ide_drive_t *, int); |
22981694 | 1410 | int ide_dma_setup(ide_drive_t *, struct ide_cmd *); |
1da177e4 | 1411 | extern void ide_dma_start(ide_drive_t *); |
653bcf52 | 1412 | int ide_dma_end(ide_drive_t *); |
f37afdac | 1413 | int ide_dma_test_irq(ide_drive_t *); |
22117d6e | 1414 | int ide_dma_sff_timer_expiry(ide_drive_t *); |
592b5315 | 1415 | u8 ide_dma_sff_read_status(ide_hwif_t *); |
71fc9fcc | 1416 | extern const struct ide_dma_ops sff_dma_ops; |
2dbe7e91 BZ |
1417 | #else |
1418 | static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; } | |
8e882ba1 | 1419 | #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ |
1da177e4 | 1420 | |
de23ec9c | 1421 | void ide_dma_lost_irq(ide_drive_t *); |
65ca5377 | 1422 | ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int); |
de23ec9c | 1423 | |
1da177e4 | 1424 | #else |
3ab7efe8 | 1425 | static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; } |
7670df73 | 1426 | static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } |
2d5eaa6d | 1427 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } |
4a546e04 | 1428 | static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; } |
7469aaf6 | 1429 | static inline void ide_dma_off(ide_drive_t *drive) { ; } |
4a546e04 | 1430 | static inline void ide_dma_on(ide_drive_t *drive) { ; } |
1da177e4 | 1431 | static inline void ide_dma_verbose(ide_drive_t *drive) { ; } |
3608b5d7 | 1432 | static inline int ide_set_dma(ide_drive_t *drive) { return 1; } |
578cfa0d | 1433 | static inline void ide_check_dma_crc(ide_drive_t *drive) { ; } |
22117d6e | 1434 | static inline ide_startstop_t ide_dma_intr(ide_drive_t *drive) { return ide_stopped; } |
65ca5377 | 1435 | static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; } |
0d1bad21 | 1436 | static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; } |
5ae5412d BZ |
1437 | static inline int ide_dma_prepare(ide_drive_t *drive, |
1438 | struct ide_cmd *cmd) { return 1; } | |
f094d4d8 BZ |
1439 | static inline void ide_dma_unmap_sg(ide_drive_t *drive, |
1440 | struct ide_cmd *cmd) { ; } | |
2bbd57ca | 1441 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
1da177e4 | 1442 | |
e3a59b4d | 1443 | #ifdef CONFIG_BLK_DEV_IDEACPI |
8b803bd1 | 1444 | int ide_acpi_init(void); |
e3a59b4d HR |
1445 | extern int ide_acpi_exec_tfs(ide_drive_t *drive); |
1446 | extern void ide_acpi_get_timing(ide_hwif_t *hwif); | |
1447 | extern void ide_acpi_push_timing(ide_hwif_t *hwif); | |
8b803bd1 | 1448 | void ide_acpi_init_port(ide_hwif_t *); |
eafd88a3 | 1449 | void ide_acpi_port_init_devices(ide_hwif_t *); |
5e32132b | 1450 | extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); |
e3a59b4d | 1451 | #else |
8b803bd1 | 1452 | static inline int ide_acpi_init(void) { return 0; } |
e3a59b4d HR |
1453 | static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } |
1454 | static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } | |
1455 | static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } | |
8b803bd1 | 1456 | static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; } |
eafd88a3 | 1457 | static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; } |
5e32132b | 1458 | static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} |
e3a59b4d HR |
1459 | #endif |
1460 | ||
1da177e4 LT |
1461 | void ide_register_region(struct gendisk *); |
1462 | void ide_unregister_region(struct gendisk *); | |
1463 | ||
f01393e4 | 1464 | void ide_undecoded_slave(ide_drive_t *); |
1da177e4 | 1465 | |
9fd91d95 | 1466 | void ide_port_apply_params(ide_hwif_t *); |
ebdab07d | 1467 | int ide_sysfs_register_port(ide_hwif_t *); |
9fd91d95 | 1468 | |
48c3c107 | 1469 | struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **); |
8a69580e | 1470 | void ide_host_free(struct ide_host *); |
48c3c107 BZ |
1471 | int ide_host_register(struct ide_host *, const struct ide_port_info *, |
1472 | hw_regs_t **); | |
6f904d01 BZ |
1473 | int ide_host_add(const struct ide_port_info *, hw_regs_t **, |
1474 | struct ide_host **); | |
48c3c107 | 1475 | void ide_host_remove(struct ide_host *); |
0bfeee7d | 1476 | int ide_legacy_device_add(const struct ide_port_info *, unsigned long); |
2dde7861 BZ |
1477 | void ide_port_unregister_devices(ide_hwif_t *); |
1478 | void ide_port_scan(ide_hwif_t *); | |
1da177e4 LT |
1479 | |
1480 | static inline void *ide_get_hwifdata (ide_hwif_t * hwif) | |
1481 | { | |
1482 | return hwif->hwif_data; | |
1483 | } | |
1484 | ||
1485 | static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) | |
1486 | { | |
1487 | hwif->hwif_data = data; | |
1488 | } | |
1489 | ||
1da177e4 | 1490 | extern void ide_toggle_bounce(ide_drive_t *drive, int on); |
1da177e4 | 1491 | |
745483f1 | 1492 | u64 ide_get_lba_addr(struct ide_cmd *, int); |
1da177e4 LT |
1493 | u8 ide_dump_status(ide_drive_t *, const char *, u8); |
1494 | ||
3be53f3f BZ |
1495 | struct ide_timing { |
1496 | u8 mode; | |
1497 | u8 setup; /* t1 */ | |
1498 | u16 act8b; /* t2 for 8-bit io */ | |
1499 | u16 rec8b; /* t2i for 8-bit io */ | |
1500 | u16 cyc8b; /* t0 for 8-bit io */ | |
1501 | u16 active; /* t2 or tD */ | |
1502 | u16 recover; /* t2i or tK */ | |
1503 | u16 cycle; /* t0 */ | |
1504 | u16 udma; /* t2CYCTYP/2 */ | |
1505 | }; | |
1506 | ||
1507 | enum { | |
1508 | IDE_TIMING_SETUP = (1 << 0), | |
1509 | IDE_TIMING_ACT8B = (1 << 1), | |
1510 | IDE_TIMING_REC8B = (1 << 2), | |
1511 | IDE_TIMING_CYC8B = (1 << 3), | |
1512 | IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B | | |
1513 | IDE_TIMING_CYC8B, | |
1514 | IDE_TIMING_ACTIVE = (1 << 4), | |
1515 | IDE_TIMING_RECOVER = (1 << 5), | |
1516 | IDE_TIMING_CYCLE = (1 << 6), | |
1517 | IDE_TIMING_UDMA = (1 << 7), | |
1518 | IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT | | |
1519 | IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER | | |
1520 | IDE_TIMING_CYCLE | IDE_TIMING_UDMA, | |
1521 | }; | |
1522 | ||
f06ab340 | 1523 | struct ide_timing *ide_timing_find_mode(u8); |
c9d6c1a2 | 1524 | u16 ide_pio_cycle_time(ide_drive_t *, u8); |
f06ab340 BZ |
1525 | void ide_timing_merge(struct ide_timing *, struct ide_timing *, |
1526 | struct ide_timing *, unsigned int); | |
1527 | int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int); | |
1528 | ||
7eeaaaa5 | 1529 | #ifdef CONFIG_IDE_XFER_MODE |
9ad54093 | 1530 | int ide_scan_pio_blacklist(char *); |
7eeaaaa5 | 1531 | const char *ide_xfer_verbose(u8); |
2134758d | 1532 | u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); |
88b2b32b BZ |
1533 | int ide_set_pio_mode(ide_drive_t *, u8); |
1534 | int ide_set_dma_mode(ide_drive_t *, u8); | |
26bcb879 | 1535 | void ide_set_pio(ide_drive_t *, u8); |
7eeaaaa5 BZ |
1536 | int ide_set_xfer_rate(ide_drive_t *, u8); |
1537 | #else | |
1538 | static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; } | |
1539 | static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; } | |
1540 | #endif | |
26bcb879 BZ |
1541 | |
1542 | static inline void ide_set_max_pio(ide_drive_t *drive) | |
1543 | { | |
1544 | ide_set_pio(drive, 255); | |
1545 | } | |
1da177e4 | 1546 | |
ebdab07d BZ |
1547 | char *ide_media_string(ide_drive_t *); |
1548 | ||
1549 | extern struct device_attribute ide_dev_attrs[]; | |
1da177e4 | 1550 | extern struct bus_type ide_bus_type; |
f74c9141 | 1551 | extern struct class *ide_port_class; |
1da177e4 | 1552 | |
7b9f25b5 BZ |
1553 | static inline void ide_dump_identify(u8 *id) |
1554 | { | |
1555 | print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0); | |
1556 | } | |
1557 | ||
86b37860 CL |
1558 | static inline int hwif_to_node(ide_hwif_t *hwif) |
1559 | { | |
96f80219 | 1560 | return hwif->dev ? dev_to_node(hwif->dev) : -1; |
86b37860 CL |
1561 | } |
1562 | ||
7e59ea21 | 1563 | static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive) |
1b678347 | 1564 | { |
5e7f3a46 | 1565 | ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1]; |
1b678347 | 1566 | |
97100fc8 | 1567 | return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL; |
1b678347 | 1568 | } |
2bd24a1c BZ |
1569 | |
1570 | #define ide_port_for_each_dev(i, dev, port) \ | |
1571 | for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) | |
1572 | ||
7ed5b157 BZ |
1573 | #define ide_port_for_each_present_dev(i, dev, port) \ |
1574 | for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \ | |
1575 | if ((dev)->dev_flags & IDE_DFLAG_PRESENT) | |
1576 | ||
2bd24a1c BZ |
1577 | #define ide_host_for_each_port(i, port, host) \ |
1578 | for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++) | |
1579 | ||
1da177e4 | 1580 | #endif /* _IDE_H */ |