]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - include/linux/ide.h
ide: use lock bitops for ports serialization (v2)
[mirror_ubuntu-bionic-kernel.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
3ceca727 11#include <linux/ata.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
feb22b7f 20#include <linux/pm.h>
e3a59b4d
HR
21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
729d4de9 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
4ee06b7e
BZ
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
1da177e4
LT
35typedef unsigned char byte; /* used everywhere */
36
37/*
38 * Probably not wise to fiddle with these
39 */
40#define ERROR_MAX 8 /* Max read/write errors per sector */
41#define ERROR_RESET 3 /* Reset controller every 4th retry */
42#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
43
1da177e4
LT
44#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
45#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
46
47/*
48 * Definitions for accessing IDE controller registers
49 */
50#define IDE_NR_PORTS (10)
51
4c3032d8
BZ
52struct ide_io_ports {
53 unsigned long data_addr;
54
55 union {
56 unsigned long error_addr; /* read: error */
57 unsigned long feature_addr; /* write: feature */
58 };
59
60 unsigned long nsect_addr;
61 unsigned long lbal_addr;
62 unsigned long lbam_addr;
63 unsigned long lbah_addr;
64
65 unsigned long device_addr;
66
67 union {
68 unsigned long status_addr; /*  read: status  */
69 unsigned long command_addr; /* write: command */
70 };
71
72 unsigned long ctl_addr;
73
74 unsigned long irq_addr;
75};
1da177e4
LT
76
77#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 78
3a7d2484
BZ
79#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
80#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
81#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
82#define DRIVE_READY (ATA_DRDY | ATA_DSC)
83
84#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
85
86#define SATA_NR_PORTS (3) /* 16 possible ?? */
87
88#define SATA_STATUS_OFFSET (0)
1da177e4 89#define SATA_ERROR_OFFSET (1)
1da177e4 90#define SATA_CONTROL_OFFSET (2)
1da177e4 91
1da177e4
LT
92/*
93 * Our Physical Region Descriptor (PRD) table should be large enough
94 * to handle the biggest I/O request we are likely to see. Since requests
95 * can have no more than 256 sectors, and since the typical blocksize is
96 * two or more sectors, we could get by with a limit of 128 entries here for
97 * the usual worst case. Most requests seem to include some contiguous blocks,
98 * further reducing the number of table entries required.
99 *
100 * The driver reverts to PIO mode for individual requests that exceed
101 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
102 * 100% of all crazy scenarios here is not necessary.
103 *
104 * As it turns out though, we must allocate a full 4KB page for this,
105 * so the two PRD tables (ide0 & ide1) will each get half of that,
106 * allowing each to have about 256 entries (8 bytes each) from this.
107 */
108#define PRD_BYTES 8
109#define PRD_ENTRIES 256
110
111/*
112 * Some more useful definitions
113 */
114#define PARTN_BITS 6 /* number of minor dev bits for partitions */
115#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
116#define SECTOR_SIZE 512
151a6701 117
1da177e4
LT
118/*
119 * Timeouts for various operations:
120 */
d6e2955a
BZ
121enum {
122 /* spec allows up to 20ms */
123 WAIT_DRQ = HZ / 10, /* 100ms */
124 /* some laptops are very slow */
125 WAIT_READY = 5 * HZ, /* 5s */
126 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
127 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
128 /* worst case when spinning up */
129 WAIT_WORSTCASE = 30 * HZ, /* 30s */
130 /* maximum wait for an IRQ to happen */
131 WAIT_CMD = 10 * HZ, /* 10s */
132 /* Some drives require a longer IRQ timeout. */
133 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
134 /*
135 * Some drives (for example, Seagate STT3401A Travan) require a very
136 * long timeout, because they don't return an interrupt or clear their
137 * BSY bit until after the command completes (even retension commands).
138 */
139 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
140 /* minimum sleep time */
141 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
142};
1da177e4 143
79e36a9f
EO
144/*
145 * Op codes for special requests to be handled by ide_special_rq().
146 * Values should be in the range of 0x20 to 0x3f.
147 */
148#define REQ_DRIVE_RESET 0x20
92f1f8fd 149#define REQ_DEVSET_EXEC 0x21
4abdc6ee
EO
150#define REQ_PARK_HEADS 0x22
151#define REQ_UNPARK_HEADS 0x23
79e36a9f 152
1da177e4
LT
153/*
154 * Check for an interrupt and acknowledge the interrupt status
155 */
156struct hwif_s;
157typedef int (ide_ack_intr_t)(struct hwif_s *);
158
1da177e4
LT
159/*
160 * hwif_chipset_t is used to keep track of the specific hardware
161 * chipset used by each IDE interface, if known.
162 */
528a572d 163enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
164 ide_cmd640, ide_dtc2278, ide_ali14xx,
165 ide_qd65xx, ide_umc8672, ide_ht6560b,
b7876a6f 166 ide_4drives, ide_pmac, ide_acorn,
9a0e77f2 167 ide_au1xxx, ide_palm3710
528a572d
BZ
168};
169
170typedef u8 hwif_chipset_t;
1da177e4
LT
171
172/*
173 * Structure to hold all information about the location of this port
174 */
175typedef struct hw_regs_s {
4c3032d8
BZ
176 union {
177 struct ide_io_ports io_ports;
178 unsigned long io_ports_array[IDE_NR_PORTS];
179 };
180
1da177e4 181 int irq; /* our irq number */
1da177e4
LT
182 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
183 hwif_chipset_t chipset;
c56c5648 184 struct device *dev, *parent;
d6276b5f 185 unsigned long config;
1da177e4
LT
186} hw_regs_t;
187
cbb010c1 188void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 189void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 190
1da177e4
LT
191static inline void ide_std_init_ports(hw_regs_t *hw,
192 unsigned long io_addr,
193 unsigned long ctl_addr)
194{
195 unsigned int i;
196
4c3032d8
BZ
197 for (i = 0; i <= 7; i++)
198 hw->io_ports_array[i] = io_addr++;
1da177e4 199
4c3032d8 200 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
201}
202
a861beb1
BZ
203/* for IDE PCI controllers in legacy mode, temporary */
204static inline int __ide_default_irq(unsigned long base)
205{
206 switch (base) {
207#ifdef CONFIG_IA64
208 case 0x1f0: return isa_irq_to_vector(14);
209 case 0x170: return isa_irq_to_vector(15);
210#else
211 case 0x1f0: return 14;
212 case 0x170: return 15;
213#endif
214 }
215 return 0;
216}
217
2a8f7450
BZ
218#if defined(CONFIG_ARM) || defined(CONFIG_FRV) || defined(CONFIG_M68K) || \
219 defined(CONFIG_MIPS) || defined(CONFIG_MN10300) || defined(CONFIG_PARISC) \
220 || defined(CONFIG_PPC) || defined(CONFIG_SPARC) || defined(CONFIG_SPARC64)
1da177e4 221#include <asm/ide.h>
2a8f7450
BZ
222#else
223#include <asm-generic/ide_iops.h>
224#endif
1da177e4 225
c5bfc375 226#define MAX_HWIFS 10
83ae20c8 227
1da177e4
LT
228/* Currently only m68k, apus and m8xx need it */
229#ifndef IDE_ARCH_ACK_INTR
230# define ide_ack_intr(hwif) (1)
231#endif
232
233/* Currently only Atari needs it */
234#ifndef IDE_ARCH_LOCK
235# define ide_release_lock() do {} while (0)
236# define ide_get_lock(hdlr, data) do {} while (0)
237#endif /* IDE_ARCH_LOCK */
238
239/*
240 * Now for the data we need to maintain per-drive: ide_drive_t
241 */
242
243#define ide_scsi 0x21
244#define ide_disk 0x20
245#define ide_optical 0x7
246#define ide_cdrom 0x5
247#define ide_tape 0x1
248#define ide_floppy 0x0
249
250/*
251 * Special Driver Flags
252 *
253 * set_geometry : respecify drive geometry
254 * recalibrate : seek to cyl 0
255 * set_multmode : set multmode count
1da177e4
LT
256 * reserved : unused
257 */
258typedef union {
259 unsigned all : 8;
260 struct {
1da177e4
LT
261 unsigned set_geometry : 1;
262 unsigned recalibrate : 1;
263 unsigned set_multmode : 1;
6982daf7 264 unsigned reserved : 5;
1da177e4
LT
265 } b;
266} special_t;
267
1da177e4
LT
268/*
269 * Status returned from various ide_ functions
270 */
271typedef enum {
272 ide_stopped, /* no drive operation was started */
273 ide_started, /* a drive operation was started, handler was set */
274} ide_startstop_t;
275
d6ff9f64
BZ
276enum {
277 IDE_TFLAG_LBA48 = (1 << 0),
278 IDE_TFLAG_FLAGGED = (1 << 2),
279 IDE_TFLAG_OUT_DATA = (1 << 3),
280 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
281 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
282 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
283 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
284 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
285 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
286 IDE_TFLAG_OUT_HOB_NSECT |
287 IDE_TFLAG_OUT_HOB_LBAL |
288 IDE_TFLAG_OUT_HOB_LBAM |
289 IDE_TFLAG_OUT_HOB_LBAH,
290 IDE_TFLAG_OUT_FEATURE = (1 << 9),
291 IDE_TFLAG_OUT_NSECT = (1 << 10),
292 IDE_TFLAG_OUT_LBAL = (1 << 11),
293 IDE_TFLAG_OUT_LBAM = (1 << 12),
294 IDE_TFLAG_OUT_LBAH = (1 << 13),
295 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
296 IDE_TFLAG_OUT_NSECT |
297 IDE_TFLAG_OUT_LBAL |
298 IDE_TFLAG_OUT_LBAM |
299 IDE_TFLAG_OUT_LBAH,
300 IDE_TFLAG_OUT_DEVICE = (1 << 14),
301 IDE_TFLAG_WRITE = (1 << 15),
302 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
303 IDE_TFLAG_IN_DATA = (1 << 17),
304 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
305 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
306 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
307 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
308 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
309 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
310 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
311 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
312 IDE_TFLAG_IN_HOB_LBAM |
313 IDE_TFLAG_IN_HOB_LBAH,
314 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
315 IDE_TFLAG_IN_HOB_NSECT |
316 IDE_TFLAG_IN_HOB_LBA,
317 IDE_TFLAG_IN_FEATURE = (1 << 1),
318 IDE_TFLAG_IN_NSECT = (1 << 25),
319 IDE_TFLAG_IN_LBAL = (1 << 26),
320 IDE_TFLAG_IN_LBAM = (1 << 27),
321 IDE_TFLAG_IN_LBAH = (1 << 28),
322 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
323 IDE_TFLAG_IN_LBAM |
324 IDE_TFLAG_IN_LBAH,
325 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
326 IDE_TFLAG_IN_LBA,
327 IDE_TFLAG_IN_DEVICE = (1 << 29),
328 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
329 IDE_TFLAG_IN_HOB,
330 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
331 IDE_TFLAG_IN_TF,
332 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
333 IDE_TFLAG_IN_DEVICE,
334 /* force 16-bit I/O operations */
335 IDE_TFLAG_IO_16BIT = (1 << 30),
336 /* ide_task_t was allocated using kmalloc() */
337 IDE_TFLAG_DYN = (1 << 31),
338};
339
340struct ide_taskfile {
341 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
342
343 u8 hob_feature; /* 1-5: additional data to support LBA48 */
344 u8 hob_nsect;
345 u8 hob_lbal;
346 u8 hob_lbam;
347 u8 hob_lbah;
348
349 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
350
351 union { /*  7: */
352 u8 error; /* read: error */
353 u8 feature; /* write: feature */
354 };
355
356 u8 nsect; /* 8: number of sectors */
357 u8 lbal; /* 9: LBA low */
358 u8 lbam; /* 10: LBA mid */
359 u8 lbah; /* 11: LBA high */
360
361 u8 device; /* 12: device select */
362
363 union { /* 13: */
364 u8 status; /*  read: status  */
365 u8 command; /* write: command */
366 };
367};
368
369typedef struct ide_task_s {
370 union {
371 struct ide_taskfile tf;
372 u8 tf_array[14];
373 };
374 u32 tf_flags;
375 int data_phase;
376 struct request *rq; /* copy of request */
377 void *special; /* valid_t generally */
378} ide_task_t;
379
67c56364
BZ
380/* ATAPI packet command flags */
381enum {
382 /* set when an error is considered normal - no retry (ide-tape) */
383 PC_FLAG_ABORT = (1 << 0),
384 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
385 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
386 PC_FLAG_DMA_OK = (1 << 3),
387 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
388 PC_FLAG_DMA_ERROR = (1 << 5),
389 PC_FLAG_WRITING = (1 << 6),
390 /* command timed out */
391 PC_FLAG_TIMEDOUT = (1 << 7),
392};
393
394/*
395 * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
396 * This is used for several packet commands (not for READ/WRITE commands).
397 */
398#define IDE_PC_BUFFER_SIZE 256
4cad085e 399#define ATAPI_WAIT_PC (60 * HZ)
67c56364
BZ
400
401struct ide_atapi_pc {
402 /* actual packet bytes */
403 u8 c[12];
404 /* incremented on each retry */
405 int retries;
406 int error;
407
408 /* bytes to transfer */
409 int req_xfer;
410 /* bytes actually transferred */
411 int xferred;
412
413 /* data buffer */
414 u8 *buf;
415 /* current buffer position */
416 u8 *cur_pos;
417 int buf_size;
418 /* missing/available data on the current buffer */
419 int b_count;
420
421 /* the corresponding request */
422 struct request *rq;
423
424 unsigned long flags;
425
426 /*
427 * those are more or less driver-specific and some of them are subject
428 * to change/removal later.
429 */
430 u8 pc_buf[IDE_PC_BUFFER_SIZE];
431
432 /* idetape only */
433 struct idetape_bh *bh;
434 char *b_data;
435
436 /* idescsi only for now */
437 struct scatterlist *sg;
438 unsigned int sg_cnt;
439
440 struct scsi_cmnd *scsi_cmd;
441 void (*done) (struct scsi_cmnd *);
442
443 unsigned long timeout;
444};
445
8185d5aa 446struct ide_devset;
1da177e4 447struct ide_driver_s;
1da177e4 448
e3a59b4d
HR
449#ifdef CONFIG_BLK_DEV_IDEACPI
450struct ide_acpi_drive_link;
451struct ide_acpi_hwif_link;
452#endif
453
806f80a6
BZ
454struct ide_drive_s;
455
456struct ide_disk_ops {
457 int (*check)(struct ide_drive_s *, const char *);
458 int (*get_capacity)(struct ide_drive_s *);
459 void (*setup)(struct ide_drive_s *);
460 void (*flush)(struct ide_drive_s *);
461 int (*init_media)(struct ide_drive_s *, struct gendisk *);
462 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
463 int);
464 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
465 sector_t);
466 int (*end_request)(struct ide_drive_s *, int, int);
badf8082
AV
467 int (*ioctl)(struct ide_drive_s *, struct block_device *,
468 fmode_t, unsigned int, unsigned long);
806f80a6
BZ
469};
470
3b8ac539
BP
471/* ATAPI device flags */
472enum {
473 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
0578042d
BZ
474
475 /* ide-cd */
3b8ac539 476 /* Drive cannot eject the disc. */
bf64741f 477 IDE_AFLAG_NO_EJECT = (1 << 1),
3b8ac539 478 /* Drive is a pre ATAPI 1.2 drive. */
bf64741f 479 IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
3b8ac539 480 /* TOC addresses are in BCD. */
bf64741f 481 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
3b8ac539 482 /* TOC track numbers are in BCD. */
bf64741f 483 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
3b8ac539
BP
484 /*
485 * Drive does not provide data in multiples of SECTOR_SIZE
486 * when more than one interrupt is needed.
487 */
bf64741f 488 IDE_AFLAG_LIMIT_NFRAMES = (1 << 5),
3b8ac539 489 /* Saved TOC information is current. */
bf64741f 490 IDE_AFLAG_TOC_VALID = (1 << 6),
3b8ac539 491 /* We think that the drive door is locked. */
bf64741f 492 IDE_AFLAG_DOOR_LOCKED = (1 << 7),
3b8ac539 493 /* SET_CD_SPEED command is unsupported. */
bf64741f
BP
494 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
495 IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
496 IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
497 IDE_AFLAG_SANYO_3CD = (1 << 11),
498 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
499 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
500 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
3b8ac539
BP
501
502 /* ide-floppy */
3b8ac539 503 /* Avoid commands not supported in Clik drive */
bf64741f 504 IDE_AFLAG_CLIK_DRIVE = (1 << 15),
3b8ac539 505 /* Requires BH algorithm for packets */
bf64741f 506 IDE_AFLAG_ZIP_DRIVE = (1 << 16),
49cac39e 507 /* Supports format progress report */
bf64741f 508 IDE_AFLAG_SRFP = (1 << 17),
3b8ac539
BP
509
510 /* ide-tape */
bf64741f 511 IDE_AFLAG_IGNORE_DSC = (1 << 18),
3b8ac539 512 /* 0 When the tape position is unknown */
bf64741f 513 IDE_AFLAG_ADDRESS_VALID = (1 << 19),
3b8ac539 514 /* Device already opened */
bf64741f 515 IDE_AFLAG_BUSY = (1 << 20),
3b8ac539 516 /* Attempt to auto-detect the current user block size */
bf64741f 517 IDE_AFLAG_DETECT_BS = (1 << 21),
3b8ac539 518 /* Currently on a filemark */
bf64741f 519 IDE_AFLAG_FILEMARK = (1 << 22),
3b8ac539 520 /* 0 = no tape is loaded, so we don't rewind after ejecting */
bf64741f 521 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
f20f2586 522
bf64741f 523 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
3b8ac539
BP
524};
525
97100fc8
BZ
526/* device flags */
527enum {
528 /* restore settings after device reset */
529 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
530 /* device is using DMA for read/write */
531 IDE_DFLAG_USING_DMA = (1 << 1),
532 /* okay to unmask other IRQs */
533 IDE_DFLAG_UNMASK = (1 << 2),
534 /* don't attempt flushes */
535 IDE_DFLAG_NOFLUSH = (1 << 3),
536 /* DSC overlap */
537 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
538 /* give potential excess bandwidth */
539 IDE_DFLAG_NICE1 = (1 << 5),
540 /* device is physically present */
541 IDE_DFLAG_PRESENT = (1 << 6),
542 /* device ejected hint */
543 IDE_DFLAG_DEAD = (1 << 7),
544 /* id read from device (synthetic if not set) */
545 IDE_DFLAG_ID_READ = (1 << 8),
546 IDE_DFLAG_NOPROBE = (1 << 9),
547 /* need to do check_media_change() */
548 IDE_DFLAG_REMOVABLE = (1 << 10),
549 /* needed for removable devices */
550 IDE_DFLAG_ATTACH = (1 << 11),
551 IDE_DFLAG_FORCED_GEOM = (1 << 12),
552 /* disallow setting unmask bit */
553 IDE_DFLAG_NO_UNMASK = (1 << 13),
554 /* disallow enabling 32-bit I/O */
555 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
556 /* for removable only: door lock/unlock works */
557 IDE_DFLAG_DOORLOCKING = (1 << 15),
558 /* disallow DMA */
559 IDE_DFLAG_NODMA = (1 << 16),
560 /* powermanagment told us not to do anything, so sleep nicely */
561 IDE_DFLAG_BLOCKED = (1 << 17),
97100fc8 562 /* sleeping & sleep field valid */
5317464d
BP
563 IDE_DFLAG_SLEEPING = (1 << 18),
564 IDE_DFLAG_POST_RESET = (1 << 19),
565 IDE_DFLAG_UDMA33_WARNED = (1 << 20),
566 IDE_DFLAG_LBA48 = (1 << 21),
97100fc8 567 /* status of write cache */
5317464d 568 IDE_DFLAG_WCACHE = (1 << 22),
97100fc8 569 /* used for ignoring ATA_DF */
5317464d 570 IDE_DFLAG_NOWERR = (1 << 23),
c3922048 571 /* retrying in PIO */
5317464d
BP
572 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
573 IDE_DFLAG_LBA = (1 << 25),
4abdc6ee 574 /* don't unload heads */
5317464d 575 IDE_DFLAG_NO_UNLOAD = (1 << 26),
4abdc6ee 576 /* heads unloaded, please don't reset port */
5317464d
BP
577 IDE_DFLAG_PARKED = (1 << 27),
578 IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
da167876 579 /* write protect */
5317464d
BP
580 IDE_DFLAG_WP = (1 << 29),
581 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
97100fc8
BZ
582};
583
d7c26ebb 584struct ide_drive_s {
1da177e4
LT
585 char name[4]; /* drive name, such as "hda" */
586 char driver_req[10]; /* requests specific driver */
587
165125e1 588 struct request_queue *queue; /* request queue */
1da177e4
LT
589
590 struct request *rq; /* current request */
1da177e4 591 void *driver_data; /* extra driver data */
48fb2688 592 u16 *id; /* identification info */
7662d046 593#ifdef CONFIG_IDE_PROC_FS
1da177e4 594 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 595 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 596#endif
1da177e4
LT
597 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
598
806f80a6
BZ
599 const struct ide_disk_ops *disk_ops;
600
97100fc8
BZ
601 unsigned long dev_flags;
602
1da177e4 603 unsigned long sleep; /* sleep until this time */
1da177e4
LT
604 unsigned long timeout; /* max time to wait for irq */
605
606 special_t special; /* special action flags */
1da177e4 607
7f612f27 608 u8 select; /* basic drive/head select reg value */
1da177e4 609 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 610 u8 waiting_for_dma; /* dma currently in progress */
0a9b6f88 611 u8 dma; /* atapi dma flag */
1da177e4 612
1da177e4
LT
613 u8 quirk_list; /* considered quirky, set for a specific host */
614 u8 init_speed; /* transfer rate set at boot */
1da177e4 615 u8 current_speed; /* current transfer rate set */
513daadd 616 u8 desired_speed; /* desired transfer rate set */
1da177e4 617 u8 dn; /* now wide spread use */
1da177e4
LT
618 u8 acoustic; /* acoustic management */
619 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
620 u8 ready_stat; /* min status value for drive ready */
621 u8 mult_count; /* current multiple sector setting */
622 u8 mult_req; /* requested multiple sector setting */
1da177e4 623 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 624 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
625 u8 head; /* "real" number of heads */
626 u8 sect; /* "real" sectors per track */
627 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
628 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
629
baf08f0b
BZ
630 /* delay this long before sending packet command */
631 u8 pc_delay;
632
1da177e4
LT
633 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
634 unsigned int cyl; /* "real" number of cyls */
26bcb879 635 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
636 unsigned int failures; /* current failure count */
637 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 638 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
639
640 u64 capacity64; /* total number of sectors */
641
642 int lun; /* logical unit */
643 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
644
645 unsigned long debug_mask; /* debugging levels switch */
646
e3a59b4d
HR
647#ifdef CONFIG_BLK_DEV_IDEACPI
648 struct ide_acpi_drive_link *acpidata;
649#endif
1da177e4
LT
650 struct list_head list;
651 struct device gendev;
f36d4024 652 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 653
2b9efba4
BZ
654 /* current packet command */
655 struct ide_atapi_pc *pc;
656
d7c26ebb 657 /* callback for packet commands */
b14c7212 658 void (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 659
85e39035
BZ
660 void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *);
661 int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *,
662 unsigned int, int);
663
3b8ac539 664 unsigned long atapi_flags;
67c56364
BZ
665
666 struct ide_atapi_pc request_sense_pc;
667 struct request request_sense_rq;
d7c26ebb
BP
668};
669
670typedef struct ide_drive_s ide_drive_t;
1da177e4 671
5aeddf90
BP
672#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
673
674#define to_ide_drv(obj, cont_type) \
675 container_of(obj, struct cont_type, kref)
676
677#define ide_drv_g(disk, cont_type) \
678 container_of((disk)->private_data, struct cont_type, driver)
8604affd 679
039788e1 680struct ide_port_info;
1da177e4 681
374e042c
BZ
682struct ide_tp_ops {
683 void (*exec_command)(struct hwif_s *, u8);
684 u8 (*read_status)(struct hwif_s *);
685 u8 (*read_altstatus)(struct hwif_s *);
686 u8 (*read_sff_dma_status)(struct hwif_s *);
687
688 void (*set_irq)(struct hwif_s *, int);
689
690 void (*tf_load)(ide_drive_t *, struct ide_task_s *);
691 void (*tf_read)(ide_drive_t *, struct ide_task_s *);
692
693 void (*input_data)(ide_drive_t *, struct request *, void *,
694 unsigned int);
695 void (*output_data)(ide_drive_t *, struct request *, void *,
696 unsigned int);
697};
698
699extern const struct ide_tp_ops default_tp_ops;
700
39b986a6
BZ
701/**
702 * struct ide_port_ops - IDE port operations
703 *
704 * @init_dev: host specific initialization of a device
705 * @set_pio_mode: routine to program host for PIO mode
706 * @set_dma_mode: routine to program host for DMA mode
707 * @selectproc: tweaks hardware to select drive
708 * @reset_poll: chipset polling based on hba specifics
709 * @pre_reset: chipset specific changes to default for device-hba resets
710 * @resetproc: routine to reset controller after a disk reset
711 * @maskproc: special host masking for drive selection
712 * @quirkproc: check host's drive quirk list
bfa7d8e5 713 * @clear_irq: clear IRQ
39b986a6
BZ
714 *
715 * @mdma_filter: filter MDMA modes
716 * @udma_filter: filter UDMA modes
717 *
718 * @cable_detect: detect cable type
719 */
ac95beed 720struct ide_port_ops {
e6d95bd1 721 void (*init_dev)(ide_drive_t *);
ac95beed 722 void (*set_pio_mode)(ide_drive_t *, const u8);
ac95beed 723 void (*set_dma_mode)(ide_drive_t *, const u8);
ac95beed 724 void (*selectproc)(ide_drive_t *);
ac95beed 725 int (*reset_poll)(ide_drive_t *);
ac95beed 726 void (*pre_reset)(ide_drive_t *);
ac95beed 727 void (*resetproc)(ide_drive_t *);
ac95beed 728 void (*maskproc)(ide_drive_t *, int);
ac95beed 729 void (*quirkproc)(ide_drive_t *);
bfa7d8e5 730 void (*clear_irq)(ide_drive_t *);
ac95beed
BZ
731
732 u8 (*mdma_filter)(ide_drive_t *);
733 u8 (*udma_filter)(ide_drive_t *);
734
735 u8 (*cable_detect)(struct hwif_s *);
736};
737
5e37bdc0
BZ
738struct ide_dma_ops {
739 void (*dma_host_set)(struct ide_drive_s *, int);
740 int (*dma_setup)(struct ide_drive_s *);
741 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
742 void (*dma_start)(struct ide_drive_s *);
743 int (*dma_end)(struct ide_drive_s *);
744 int (*dma_test_irq)(struct ide_drive_s *);
745 void (*dma_lost_irq)(struct ide_drive_s *);
746 void (*dma_timeout)(struct ide_drive_s *);
747};
748
08da591e
BZ
749struct ide_host;
750
1da177e4 751typedef struct hwif_s {
1da177e4
LT
752 struct hwif_s *mate; /* other hwif from same PCI chip */
753 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
754 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
755
08da591e
BZ
756 struct ide_host *host;
757
1da177e4
LT
758 char name[6]; /* name of interface, eg. "ide0" */
759
4c3032d8
BZ
760 struct ide_io_ports io_ports;
761
1da177e4 762 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 763
1da177e4
LT
764 ide_drive_t drives[MAX_DRIVES]; /* drive info */
765
766 u8 major; /* our major number */
767 u8 index; /* 0 for ide0; 1 for ide1; ... */
768 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 769
e95d9c6b 770 u32 host_flags;
6a824c92 771
4099d143
BZ
772 u8 pio_mask;
773
1da177e4
LT
774 u8 ultra_mask;
775 u8 mwdma_mask;
776 u8 swdma_mask;
777
49521f97
BZ
778 u8 cbl; /* cable type */
779
1da177e4
LT
780 hwif_chipset_t chipset; /* sub-module for tuning.. */
781
36501650
BZ
782 struct device *dev;
783
18e181fe
BZ
784 ide_ack_intr_t *ack_intr;
785
1da177e4
LT
786 void (*rw_disk)(ide_drive_t *, struct request *);
787
374e042c 788 const struct ide_tp_ops *tp_ops;
ac95beed 789 const struct ide_port_ops *port_ops;
f37afdac 790 const struct ide_dma_ops *dma_ops;
bfa14b42 791
1da177e4
LT
792 /* dma physical region descriptor table (cpu view) */
793 unsigned int *dmatable_cpu;
794 /* dma physical region descriptor table (dma view) */
795 dma_addr_t dmatable_dma;
2bbd57ca
BZ
796
797 /* maximum number of PRD table entries */
798 int prd_max_nents;
799 /* PRD entry size in bytes */
800 int prd_ent_size;
801
1da177e4
LT
802 /* Scatter-gather list used to build the above */
803 struct scatterlist *sg_table;
804 int sg_max_nents; /* Maximum number of entries in it */
805 int sg_nents; /* Current number of entries in it */
806 int sg_dma_direction; /* dma transfer direction */
807
808 /* data phase of the active command (currently only valid for PIO/DMA) */
809 int data_phase;
810
d6ff9f64
BZ
811 struct ide_task_s task; /* current command */
812
1da177e4
LT
813 unsigned int nsect;
814 unsigned int nleft;
55c16a70 815 struct scatterlist *cursg;
1da177e4
LT
816 unsigned int cursg_ofs;
817
1da177e4
LT
818 int rqsize; /* max sectors per request */
819 int irq; /* our irq number */
820
1da177e4 821 unsigned long dma_base; /* base addr for dma ports */
1da177e4 822
1da177e4
LT
823 unsigned long config_data; /* for use by chipset-specific code */
824 unsigned long select_data; /* for use by chipset-specific code */
825
020e322d
SS
826 unsigned long extra_base; /* extra addr for dma ports */
827 unsigned extra_ports; /* number of extra dma ports */
828
1da177e4 829 unsigned present : 1; /* this interface exists */
1da177e4 830 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
5b31f855 831 unsigned busy : 1; /* serializes devices on a port */
1da177e4 832
f74c9141
BZ
833 struct device gendev;
834 struct device *portdev;
835
f36d4024 836 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
837
838 void *hwif_data; /* extra hwif data */
839
e3a59b4d
HR
840#ifdef CONFIG_BLK_DEV_IDEACPI
841 struct ide_acpi_hwif_link *acpidata;
842#endif
22fc6ecc 843} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 844
a36223b0
BZ
845#define MAX_HOST_PORTS 4
846
48c3c107 847struct ide_host {
a36223b0 848 ide_hwif_t *ports[MAX_HOST_PORTS];
48c3c107 849 unsigned int n_ports;
6cdf6eb3 850 struct device *dev[2];
feb22b7f 851 unsigned int (*init_chipset)(struct pci_dev *);
ef0b0427 852 unsigned long host_flags;
6cdf6eb3 853 void *host_priv;
bd53cbcc 854 ide_hwif_t *cur_port; /* for hosts requiring serialization */
5b31f855
BZ
855
856 /* used for hosts requiring serialization */
857 volatile long host_busy;
48c3c107
BZ
858};
859
5b31f855
BZ
860#define IDE_HOST_BUSY 0
861
1da177e4
LT
862/*
863 * internal ide interrupt handler type
864 */
1da177e4
LT
865typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
866typedef int (ide_expiry_t)(ide_drive_t *);
867
0eea6458 868/* used by ide-cd, ide-floppy, etc. */
9567b349 869typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
0eea6458 870
1da177e4
LT
871typedef struct hwgroup_s {
872 /* irq handler, if active */
873 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 874
1da177e4
LT
875 /* BOOL: polling active & poll_timeout field valid */
876 unsigned int polling : 1;
913759ac 877
1da177e4 878 /* current drive */
efe0397e 879 ide_drive_t *cur_dev;
1da177e4 880
1da177e4
LT
881 /* current request */
882 struct request *rq;
a6fbb1c8 883
1da177e4
LT
884 /* failsafe timer */
885 struct timer_list timer;
1da177e4
LT
886 /* timeout value during long polls */
887 unsigned long poll_timeout;
888 /* queried upon timeouts */
889 int (*expiry)(ide_drive_t *);
a6fbb1c8 890
23450319
SS
891 int req_gen;
892 int req_gen_timer;
2a2ca6a9
BZ
893
894 spinlock_t lock;
efe0397e
BZ
895
896 int port_count;
1da177e4
LT
897} ide_hwgroup_t;
898
7662d046
BZ
899typedef struct ide_driver_s ide_driver_t;
900
f9383c42 901extern struct mutex ide_setting_mtx;
1da177e4 902
92f1f8fd
EO
903/*
904 * configurable drive settings
905 */
906
907#define DS_SYNC (1 << 0)
908
909struct ide_devset {
910 int (*get)(ide_drive_t *);
911 int (*set)(ide_drive_t *, int);
912 unsigned int flags;
913};
914
915#define __DEVSET(_flags, _get, _set) { \
916 .flags = _flags, \
917 .get = _get, \
918 .set = _set, \
919}
7662d046 920
8185d5aa 921#define ide_devset_get(name, field) \
92f1f8fd 922static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
923{ \
924 return drive->field; \
925}
926
927#define ide_devset_set(name, field) \
92f1f8fd 928static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
929{ \
930 drive->field = arg; \
931 return 0; \
932}
933
97100fc8
BZ
934#define ide_devset_get_flag(name, flag) \
935static int get_##name(ide_drive_t *drive) \
936{ \
937 return !!(drive->dev_flags & flag); \
938}
939
940#define ide_devset_set_flag(name, flag) \
941static int set_##name(ide_drive_t *drive, int arg) \
942{ \
943 if (arg) \
944 drive->dev_flags |= flag; \
945 else \
946 drive->dev_flags &= ~flag; \
947 return 0; \
948}
949
92f1f8fd
EO
950#define __IDE_DEVSET(_name, _flags, _get, _set) \
951const struct ide_devset ide_devset_##_name = \
952 __DEVSET(_flags, _get, _set)
953
954#define IDE_DEVSET(_name, _flags, _get, _set) \
955static __IDE_DEVSET(_name, _flags, _get, _set)
956
957#define ide_devset_rw(_name, _func) \
958IDE_DEVSET(_name, 0, get_##_func, set_##_func)
959
960#define ide_devset_w(_name, _func) \
961IDE_DEVSET(_name, 0, NULL, set_##_func)
962
f8790489
BZ
963#define ide_ext_devset_rw(_name, _func) \
964__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
965
966#define ide_ext_devset_rw_sync(_name, _func) \
967__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
92f1f8fd
EO
968
969#define ide_decl_devset(_name) \
970extern const struct ide_devset ide_devset_##_name
971
972ide_decl_devset(io_32bit);
973ide_decl_devset(keepsettings);
974ide_decl_devset(pio_mode);
975ide_decl_devset(unmaskirq);
976ide_decl_devset(using_dma);
977
7662d046 978#ifdef CONFIG_IDE_PROC_FS
1da177e4 979/*
92f1f8fd 980 * /proc/ide interface
1da177e4
LT
981 */
982
92f1f8fd
EO
983#define ide_devset_rw_field(_name, _field) \
984ide_devset_get(_name, _field); \
985ide_devset_set(_name, _field); \
986IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
987
97100fc8
BZ
988#define ide_devset_rw_flag(_name, _field) \
989ide_devset_get_flag(_name, _field); \
990ide_devset_set_flag(_name, _field); \
991IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
992
92f1f8fd
EO
993struct ide_proc_devset {
994 const char *name;
995 const struct ide_devset *setting;
996 int min, max;
997 int (*mulf)(ide_drive_t *);
998 int (*divf)(ide_drive_t *);
8185d5aa
BZ
999};
1000
92f1f8fd
EO
1001#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
1002 .name = __stringify(_name), \
1003 .setting = &ide_devset_##_name, \
1004 .min = _min, \
1005 .max = _max, \
1006 .mulf = _mulf, \
1007 .divf = _divf, \
8185d5aa
BZ
1008}
1009
92f1f8fd
EO
1010#define IDE_PROC_DEVSET(_name, _min, _max) \
1011__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 1012
1da177e4
LT
1013typedef struct {
1014 const char *name;
1015 mode_t mode;
1016 read_proc_t *read_proc;
1017 write_proc_t *write_proc;
1018} ide_proc_entry_t;
1019
ecfd80e4
BZ
1020void proc_ide_create(void);
1021void proc_ide_destroy(void);
5cbf79cd 1022void ide_proc_register_port(ide_hwif_t *);
d9270a3f 1023void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 1024void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 1025void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
1026void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
1027void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
1028
1da177e4
LT
1029read_proc_t proc_ide_read_capacity;
1030read_proc_t proc_ide_read_geometry;
1031
1da177e4
LT
1032/*
1033 * Standard exit stuff:
1034 */
1035#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
1036{ \
1037 len -= off; \
1038 if (len < count) { \
1039 *eof = 1; \
1040 if (len <= 0) \
1041 return 0; \
1042 } else \
1043 len = count; \
1044 *start = page + off; \
1045 return len; \
1046}
1047#else
ecfd80e4
BZ
1048static inline void proc_ide_create(void) { ; }
1049static inline void proc_ide_destroy(void) { ; }
5cbf79cd 1050static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 1051static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 1052static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 1053static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
1054static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
1055static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
1da177e4
LT
1056#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
1057#endif
1058
e1c7c464
BP
1059enum {
1060 /* enter/exit functions */
1061 IDE_DBG_FUNC = (1 << 0),
1062 /* sense key/asc handling */
1063 IDE_DBG_SENSE = (1 << 1),
1064 /* packet commands handling */
1065 IDE_DBG_PC = (1 << 2),
1066 /* request handling */
1067 IDE_DBG_RQ = (1 << 3),
1068 /* driver probing/setup */
1069 IDE_DBG_PROBE = (1 << 4),
1070};
1071
1072/* DRV_NAME has to be defined in the driver before using the macro below */
1073#define __ide_debug_log(lvl, fmt, args...) \
1074{ \
1075 if (unlikely(drive->debug_mask & lvl)) \
1076 printk(KERN_INFO DRV_NAME ": " fmt, ## args); \
1077}
1078
1da177e4 1079/*
0d346ba0 1080 * Power Management state machine (rq->pm->pm_step).
1da177e4 1081 *
0d346ba0 1082 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
1083 * This can return:
1084 * - ide_stopped : In this case, the core calls us back again unless
1085 * step have been set to ide_power_state_completed.
1086 * - ide_started : In this case, the channel is left busy until an
1087 * async event (interrupt) occurs.
0d346ba0 1088 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
1089 * do_rw_taskfile().
1090 *
0d346ba0 1091 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
1092 * with the error code if any. This routine should update the step value
1093 * and return. It should not start a new request. The core will call
0d346ba0
BZ
1094 * ide_start_power_step() for the new step value, unless step have been
1095 * set to IDE_PM_COMPLETED.
1da177e4 1096 */
1da177e4 1097enum {
0d346ba0
BZ
1098 IDE_PM_START_SUSPEND,
1099 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1100 IDE_PM_STANDBY,
1101
1102 IDE_PM_START_RESUME,
1103 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1104 IDE_PM_IDLE,
1105 IDE_PM_RESTORE_DMA,
1106
1107 IDE_PM_COMPLETED,
1da177e4
LT
1108};
1109
e2984c62
BZ
1110int generic_ide_suspend(struct device *, pm_message_t);
1111int generic_ide_resume(struct device *);
1112
1113void ide_complete_power_step(ide_drive_t *, struct request *);
1114ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
1115void ide_complete_pm_request(ide_drive_t *, struct request *);
1116void ide_check_pm_state(ide_drive_t *, struct request *);
1117
1da177e4
LT
1118/*
1119 * Subdrivers support.
4ef3b8f4
LR
1120 *
1121 * The gendriver.owner field should be set to the module owner of this driver.
1122 * The gendriver.name field should be set to the name of this driver
1da177e4 1123 */
7662d046 1124struct ide_driver_s {
1da177e4 1125 const char *version;
1da177e4
LT
1126 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1127 int (*end_request)(ide_drive_t *, int, int);
1128 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1da177e4 1129 struct device_driver gen_driver;
4031bbe4
RK
1130 int (*probe)(ide_drive_t *);
1131 void (*remove)(ide_drive_t *);
0d2157f7 1132 void (*resume)(ide_drive_t *);
4031bbe4 1133 void (*shutdown)(ide_drive_t *);
7662d046 1134#ifdef CONFIG_IDE_PROC_FS
79cb3803
BZ
1135 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1136 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
7662d046
BZ
1137#endif
1138};
1da177e4 1139
4031bbe4
RK
1140#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
1141
08da591e
BZ
1142int ide_device_get(ide_drive_t *);
1143void ide_device_put(ide_drive_t *);
1144
aa768773
BZ
1145struct ide_ioctl_devset {
1146 unsigned int get_ioctl;
1147 unsigned int set_ioctl;
92f1f8fd 1148 const struct ide_devset *setting;
aa768773
BZ
1149};
1150
1151int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1152 unsigned long, const struct ide_ioctl_devset *);
1153
1bddd9e6 1154int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1da177e4 1155
ebae41a5
BZ
1156extern int ide_vlb_clk;
1157extern int ide_pci_clk;
1158
1da177e4 1159extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
1160int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1161 int uptodate, int nr_sectors);
1da177e4 1162
1da177e4
LT
1163extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1164
cd2a2d96
BZ
1165void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
1166 ide_expiry_t *);
1da177e4 1167
1fc14258
BZ
1168void ide_execute_pkt_cmd(ide_drive_t *);
1169
9f87abe8
BZ
1170void ide_pad_transfer(ide_drive_t *, int, int);
1171
1da177e4
LT
1172ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1173
1da177e4
LT
1174ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1175
4dde4492 1176void ide_fix_driveid(u16 *);
01745112 1177
1da177e4
LT
1178extern void ide_fixstring(u8 *, const int, const int);
1179
b163f46d
BZ
1180int ide_busy_sleep(ide_hwif_t *, unsigned long, int);
1181
74af21cf 1182int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1183
1da177e4
LT
1184extern ide_startstop_t ide_do_reset (ide_drive_t *);
1185
92f1f8fd
EO
1186extern int ide_devset_execute(ide_drive_t *drive,
1187 const struct ide_devset *setting, int arg);
1188
63f5abb0 1189extern void ide_do_drive_cmd(ide_drive_t *, struct request *);
1da177e4 1190
1da177e4
LT
1191extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1192
089c5c7e 1193void ide_tf_dump(const char *, struct ide_taskfile *);
1da177e4 1194
374e042c
BZ
1195void ide_exec_command(ide_hwif_t *, u8);
1196u8 ide_read_status(ide_hwif_t *);
1197u8 ide_read_altstatus(ide_hwif_t *);
1198u8 ide_read_sff_dma_status(ide_hwif_t *);
1199
1200void ide_set_irq(ide_hwif_t *, int);
1201
1202void ide_tf_load(ide_drive_t *, ide_task_t *);
1203void ide_tf_read(ide_drive_t *, ide_task_t *);
1204
1205void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int);
1206void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int);
1207
acaa0f5f
BZ
1208int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int);
1209
1da177e4 1210extern void SELECT_DRIVE(ide_drive_t *);
ed4af48f 1211void SELECT_MASK(ide_drive_t *, int);
1da177e4 1212
92eb4380 1213u8 ide_read_error(ide_drive_t *);
1823649b 1214void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1215
1da177e4 1216extern int drive_is_ready(ide_drive_t *);
1da177e4 1217
2fc57388
BZ
1218void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
1219
51509eec
BZ
1220int ide_check_atapi_device(ide_drive_t *, const char *);
1221
7bf7420a
BZ
1222void ide_init_pc(struct ide_atapi_pc *);
1223
4abdc6ee
EO
1224/* Disk head parking */
1225extern wait_queue_head_t ide_park_wq;
1226ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1227 char *buf);
1228ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1229 const char *buf, size_t len);
1230
7645c151
BZ
1231/*
1232 * Special requests for ide-tape block device strategy routine.
1233 *
1234 * In order to service a character device command, we add special requests to
1235 * the tail of our block device request queue and wait for their completion.
1236 */
1237enum {
1238 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1239 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1240 REQ_IDETAPE_READ = (1 << 2),
1241 REQ_IDETAPE_WRITE = (1 << 3),
1242};
1243
2ac07d92 1244int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
7645c151 1245
de699ad5 1246int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1247int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1248int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b
BZ
1249void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1250void ide_retry_pc(ide_drive_t *, struct gendisk *);
0578042d 1251
4cad085e 1252int ide_cd_expiry(ide_drive_t *);
844b9468 1253
392de1d5
BP
1254int ide_cd_get_xferlen(struct request *);
1255
28ad91db 1256ide_startstop_t ide_issue_pc(ide_drive_t *);
594c16d8 1257
f6e29e35 1258ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 1259
4d7a984b
TH
1260void task_end_request(ide_drive_t *, struct request *, u8);
1261
ac026ff2 1262int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
1263int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
1264
1da177e4 1265int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1da177e4 1266
1da177e4 1267extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1268extern int ide_config_drive_speed(ide_drive_t *, u8);
1269extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1270extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1271
1272extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1273
1da177e4
LT
1274extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1275
1da177e4 1276extern void ide_timer_expiry(unsigned long);
7d12e780 1277extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1278extern void do_ide_request(struct request_queue *);
1da177e4
LT
1279
1280void ide_init_disk(struct gendisk *, ide_drive_t *);
1281
6d208b39 1282#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1283extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1284#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1285#else
1286#define ide_pci_register_driver(d) pci_register_driver(d)
1287#endif
1288
6636487e
BZ
1289static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1290{
1291 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1292 return 1;
1293 return 0;
1294}
1295
c97c6aca 1296void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int,
48c3c107 1297 hw_regs_t *, hw_regs_t **);
85620436 1298void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1299
8e882ba1 1300#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1301int ide_pci_set_master(struct pci_dev *, const char *);
1302unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1303int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1304int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1305#else
b123f56e
BZ
1306static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1307 const struct ide_port_info *d)
1308{
1309 return -EINVAL;
1310}
c413b9b9
BZ
1311#endif
1312
1da177e4
LT
1313typedef struct ide_pci_enablebit_s {
1314 u8 reg; /* byte pci reg holding the enable-bit */
1315 u8 mask; /* mask to isolate the enable-bit */
1316 u8 val; /* value of masked reg when "enabled" */
1317} ide_pci_enablebit_t;
1318
1319enum {
1320 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1321 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1322 /* single port device */
a5d8c5c8 1323 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1324 /* don't use legacy PIO blacklist */
1325 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1326 /* set for the second port of QD65xx */
1327 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1328 /* use PIO8/9 for prefetch off/on */
1329 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1330 /* use PIO6/7 for fast-devsel off/on */
1331 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1332 /* use 100-102 and 200-202 PIO values to set DMA modes */
1333 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1334 /*
1335 * keep DMA setting when programming PIO mode, may be used only
1336 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1337 */
1338 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1339 /* program host for the transfer mode after programming device */
1340 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1341 /* don't program host/device for the transfer mode ("smart" hosts) */
1342 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1343 /* trust BIOS for programming chipset/device for DMA */
1344 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1345 /* host is CS5510/CS5520 */
1346 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1347 /* ATAPI DMA is unsupported */
1348 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1349 /* set if host is a "non-bootable" controller */
1350 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1351 /* host doesn't support DMA */
1352 IDE_HFLAG_NO_DMA = (1 << 14),
1353 /* check if host is PCI IDE device before allowing DMA */
1354 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1355 /* host uses MMIO */
1356 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1357 /* no LBA48 */
1358 IDE_HFLAG_NO_LBA48 = (1 << 17),
1359 /* no LBA48 DMA */
1360 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1361 /* data FIFO is cleared by an error */
1362 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1363 /* serialize ports */
1364 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1365 /* use legacy IRQs */
1366 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1367 /* force use of legacy IRQs */
1368 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1f66019b
BZ
1369 /* host is TRM290 */
1370 IDE_HFLAG_TRM290 = (1 << 23),
caea7602
BZ
1371 /* use 32-bit I/O ops */
1372 IDE_HFLAG_IO_32BIT = (1 << 24),
1373 /* unmask IRQs */
1374 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
6636487e 1375 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
1fd18905
BZ
1376 /* serialize ports if DMA is possible (for sl82c105) */
1377 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1378 /* force host out of "simplex" mode */
1379 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1380 /* DSC overlap is unsupported */
1381 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1382 /* never use 32-bit I/O ops */
1383 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1384 /* never unmask IRQs */
1385 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1386};
1387
7cab14a7 1388#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1389# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1390#else
1391# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1392#endif
1393
039788e1 1394struct ide_port_info {
1da177e4 1395 char *name;
a326b02b 1396 unsigned int (*init_chipset)(struct pci_dev *);
1da177e4
LT
1397 void (*init_iops)(ide_hwif_t *);
1398 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1399 int (*init_dma)(ide_hwif_t *,
1400 const struct ide_port_info *);
ac95beed 1401
374e042c 1402 const struct ide_tp_ops *tp_ops;
ac95beed 1403 const struct ide_port_ops *port_ops;
f37afdac 1404 const struct ide_dma_ops *dma_ops;
ac95beed 1405
1da177e4 1406 ide_pci_enablebit_t enablebits[2];
528a572d 1407 hwif_chipset_t chipset;
6b492496
BZ
1408
1409 u16 max_sectors; /* if < than the default one */
1410
9ffcf364 1411 u32 host_flags;
4099d143 1412 u8 pio_mask;
5f8b6c34
BZ
1413 u8 swdma_mask;
1414 u8 mwdma_mask;
18137207 1415 u8 udma_mask;
039788e1 1416};
1da177e4 1417
6cdf6eb3
BZ
1418int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1419int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1420 const struct ide_port_info *, void *);
ef0b0427 1421void ide_pci_remove(struct pci_dev *);
1da177e4 1422
feb22b7f
BZ
1423#ifdef CONFIG_PM
1424int ide_pci_suspend(struct pci_dev *, pm_message_t);
1425int ide_pci_resume(struct pci_dev *);
1426#else
1427#define ide_pci_suspend NULL
1428#define ide_pci_resume NULL
1429#endif
1430
1da177e4
LT
1431void ide_map_sg(ide_drive_t *, struct request *);
1432void ide_init_sg_cmd(ide_drive_t *, struct request *);
1433
1434#define BAD_DMA_DRIVE 0
1435#define GOOD_DMA_DRIVE 1
1436
65e5f2e3
JC
1437struct drive_list_entry {
1438 const char *id_model;
1439 const char *id_firmware;
1440};
1441
4dde4492 1442int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1443
1444#ifdef CONFIG_BLK_DEV_IDEDMA
2dbe7e91 1445int ide_dma_good_drive(ide_drive_t *);
1da177e4 1446int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1447int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1448
1449u8 ide_find_dma_mode(ide_drive_t *, u8);
1450
1451static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1452{
1453 return ide_find_dma_mode(drive, XFER_UDMA_6);
1454}
1455
4a546e04 1456void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1457void ide_dma_off(ide_drive_t *);
4a546e04 1458void ide_dma_on(ide_drive_t *);
3608b5d7 1459int ide_set_dma(ide_drive_t *);
578cfa0d 1460void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1461ide_startstop_t ide_dma_intr(ide_drive_t *);
1462
2bbd57ca
BZ
1463int ide_allocate_dma_engine(ide_hwif_t *);
1464void ide_release_dma_engine(ide_hwif_t *);
1465
062f9f02
BZ
1466int ide_build_sglist(ide_drive_t *, struct request *);
1467void ide_destroy_dmatable(ide_drive_t *);
1468
8e882ba1 1469#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
2dbe7e91 1470int config_drive_for_dma(ide_drive_t *);
1da177e4 1471extern int ide_build_dmatable(ide_drive_t *, struct request *);
15ce926a 1472void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1473extern int ide_dma_setup(ide_drive_t *);
f37afdac 1474void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4 1475extern void ide_dma_start(ide_drive_t *);
653bcf52 1476int ide_dma_end(ide_drive_t *);
f37afdac 1477int ide_dma_test_irq(ide_drive_t *);
71fc9fcc 1478extern const struct ide_dma_ops sff_dma_ops;
2dbe7e91
BZ
1479#else
1480static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
8e882ba1 1481#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4 1482
de23ec9c 1483void ide_dma_lost_irq(ide_drive_t *);
ffa15a69 1484void ide_dma_timeout(ide_drive_t *);
de23ec9c 1485
1da177e4 1486#else
3ab7efe8 1487static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1488static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1489static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1490static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1491static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1492static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1493static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1494static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1495static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
0d1bad21 1496static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
2bbd57ca 1497#endif /* CONFIG_BLK_DEV_IDEDMA */
1da177e4 1498
e3a59b4d
HR
1499#ifdef CONFIG_BLK_DEV_IDEACPI
1500extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1501extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1502extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1503extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1504void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1505extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1506#else
1507static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1508static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1509static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1510static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1511static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1512static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1513#endif
1514
fbd13088 1515void ide_remove_port_from_hwgroup(ide_hwif_t *);
387750c3 1516void ide_unregister(ide_hwif_t *);
1da177e4
LT
1517
1518void ide_register_region(struct gendisk *);
1519void ide_unregister_region(struct gendisk *);
1520
f01393e4 1521void ide_undecoded_slave(ide_drive_t *);
1da177e4 1522
9fd91d95 1523void ide_port_apply_params(ide_hwif_t *);
ebdab07d 1524int ide_sysfs_register_port(ide_hwif_t *);
9fd91d95 1525
48c3c107 1526struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **);
8a69580e 1527void ide_host_free(struct ide_host *);
48c3c107
BZ
1528int ide_host_register(struct ide_host *, const struct ide_port_info *,
1529 hw_regs_t **);
6f904d01
BZ
1530int ide_host_add(const struct ide_port_info *, hw_regs_t **,
1531 struct ide_host **);
48c3c107 1532void ide_host_remove(struct ide_host *);
0bfeee7d 1533int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1534void ide_port_unregister_devices(ide_hwif_t *);
1535void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1536
1537static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1538{
1539 return hwif->hwif_data;
1540}
1541
1542static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1543{
1544 hwif->hwif_data = data;
1545}
1546
3ab7efe8 1547const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1548extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1549extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1550
a501633c 1551u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1552u8 ide_dump_status(ide_drive_t *, const char *, u8);
1553
3be53f3f
BZ
1554struct ide_timing {
1555 u8 mode;
1556 u8 setup; /* t1 */
1557 u16 act8b; /* t2 for 8-bit io */
1558 u16 rec8b; /* t2i for 8-bit io */
1559 u16 cyc8b; /* t0 for 8-bit io */
1560 u16 active; /* t2 or tD */
1561 u16 recover; /* t2i or tK */
1562 u16 cycle; /* t0 */
1563 u16 udma; /* t2CYCTYP/2 */
1564};
1565
1566enum {
1567 IDE_TIMING_SETUP = (1 << 0),
1568 IDE_TIMING_ACT8B = (1 << 1),
1569 IDE_TIMING_REC8B = (1 << 2),
1570 IDE_TIMING_CYC8B = (1 << 3),
1571 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1572 IDE_TIMING_CYC8B,
1573 IDE_TIMING_ACTIVE = (1 << 4),
1574 IDE_TIMING_RECOVER = (1 << 5),
1575 IDE_TIMING_CYCLE = (1 << 6),
1576 IDE_TIMING_UDMA = (1 << 7),
1577 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1578 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1579 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1580};
1581
f06ab340 1582struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1583u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1584void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1585 struct ide_timing *, unsigned int);
1586int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1587
9ad54093
BZ
1588int ide_scan_pio_blacklist(char *);
1589
2134758d 1590u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4 1591
88b2b32b
BZ
1592int ide_set_pio_mode(ide_drive_t *, u8);
1593int ide_set_dma_mode(ide_drive_t *, u8);
1594
26bcb879
BZ
1595void ide_set_pio(ide_drive_t *, u8);
1596
1597static inline void ide_set_max_pio(ide_drive_t *drive)
1598{
1599 ide_set_pio(drive, 255);
1600}
1da177e4
LT
1601
1602extern spinlock_t ide_lock;
ef29888e 1603extern struct mutex ide_cfg_mtx;
1da177e4 1604
366c7f55 1605#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4 1606
ebdab07d
BZ
1607char *ide_media_string(ide_drive_t *);
1608
1609extern struct device_attribute ide_dev_attrs[];
1da177e4 1610extern struct bus_type ide_bus_type;
f74c9141 1611extern struct class *ide_port_class;
1da177e4 1612
7b9f25b5
BZ
1613static inline void ide_dump_identify(u8 *id)
1614{
1615 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1616}
1617
86b37860
CL
1618static inline int hwif_to_node(ide_hwif_t *hwif)
1619{
96f80219 1620 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1621}
1622
7e59ea21 1623static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1624{
7e59ea21 1625 ide_drive_t *peer = &drive->hwif->drives[(drive->dn ^ 1) & 1];
1b678347 1626
97100fc8 1627 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1628}
1da177e4 1629#endif /* _IDE_H */