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1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
3ceca727 11#include <linux/ata.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
feb22b7f 20#include <linux/pm.h>
e3a59b4d
HR
21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
729d4de9 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
4ee06b7e
BZ
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
35/*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40#define IDE_NO_IRQ (-1)
41
1da177e4
LT
42typedef unsigned char byte; /* used everywhere */
43
44/*
45 * Probably not wise to fiddle with these
46 */
47#define ERROR_MAX 8 /* Max read/write errors per sector */
48#define ERROR_RESET 3 /* Reset controller every 4th retry */
49#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
1da177e4
LT
51#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
52#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
53
54/*
55 * Definitions for accessing IDE controller registers
56 */
57#define IDE_NR_PORTS (10)
58
4c3032d8
BZ
59struct ide_io_ports {
60 unsigned long data_addr;
61
62 union {
63 unsigned long error_addr; /* read: error */
64 unsigned long feature_addr; /* write: feature */
65 };
66
67 unsigned long nsect_addr;
68 unsigned long lbal_addr;
69 unsigned long lbam_addr;
70 unsigned long lbah_addr;
71
72 unsigned long device_addr;
73
74 union {
75 unsigned long status_addr; /*  read: status  */
76 unsigned long command_addr; /* write: command */
77 };
78
79 unsigned long ctl_addr;
80
81 unsigned long irq_addr;
82};
1da177e4
LT
83
84#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 85
3a7d2484
BZ
86#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
87#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
88#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
89#define DRIVE_READY (ATA_DRDY | ATA_DSC)
90
91#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
92
93#define SATA_NR_PORTS (3) /* 16 possible ?? */
94
95#define SATA_STATUS_OFFSET (0)
1da177e4 96#define SATA_ERROR_OFFSET (1)
1da177e4 97#define SATA_CONTROL_OFFSET (2)
1da177e4 98
1da177e4
LT
99/*
100 * Our Physical Region Descriptor (PRD) table should be large enough
101 * to handle the biggest I/O request we are likely to see. Since requests
102 * can have no more than 256 sectors, and since the typical blocksize is
103 * two or more sectors, we could get by with a limit of 128 entries here for
104 * the usual worst case. Most requests seem to include some contiguous blocks,
105 * further reducing the number of table entries required.
106 *
107 * The driver reverts to PIO mode for individual requests that exceed
108 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
109 * 100% of all crazy scenarios here is not necessary.
110 *
111 * As it turns out though, we must allocate a full 4KB page for this,
112 * so the two PRD tables (ide0 & ide1) will each get half of that,
113 * allowing each to have about 256 entries (8 bytes each) from this.
114 */
115#define PRD_BYTES 8
116#define PRD_ENTRIES 256
117
118/*
119 * Some more useful definitions
120 */
121#define PARTN_BITS 6 /* number of minor dev bits for partitions */
122#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
123#define SECTOR_SIZE 512
151a6701 124
1da177e4
LT
125#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
126
127/*
128 * Timeouts for various operations:
129 */
d6e2955a
BZ
130enum {
131 /* spec allows up to 20ms */
132 WAIT_DRQ = HZ / 10, /* 100ms */
133 /* some laptops are very slow */
134 WAIT_READY = 5 * HZ, /* 5s */
135 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
136 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
137 /* worst case when spinning up */
138 WAIT_WORSTCASE = 30 * HZ, /* 30s */
139 /* maximum wait for an IRQ to happen */
140 WAIT_CMD = 10 * HZ, /* 10s */
141 /* Some drives require a longer IRQ timeout. */
142 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
143 /*
144 * Some drives (for example, Seagate STT3401A Travan) require a very
145 * long timeout, because they don't return an interrupt or clear their
146 * BSY bit until after the command completes (even retension commands).
147 */
148 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
149 /* minimum sleep time */
150 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
151};
1da177e4 152
79e36a9f
EO
153/*
154 * Op codes for special requests to be handled by ide_special_rq().
155 * Values should be in the range of 0x20 to 0x3f.
156 */
157#define REQ_DRIVE_RESET 0x20
92f1f8fd 158#define REQ_DEVSET_EXEC 0x21
79e36a9f 159
1da177e4
LT
160/*
161 * Check for an interrupt and acknowledge the interrupt status
162 */
163struct hwif_s;
164typedef int (ide_ack_intr_t)(struct hwif_s *);
165
1da177e4
LT
166/*
167 * hwif_chipset_t is used to keep track of the specific hardware
168 * chipset used by each IDE interface, if known.
169 */
528a572d 170enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
171 ide_cmd640, ide_dtc2278, ide_ali14xx,
172 ide_qd65xx, ide_umc8672, ide_ht6560b,
173 ide_rz1000, ide_trm290,
174 ide_cmd646, ide_cy82c693, ide_4drives,
b7691646 175 ide_pmac, ide_acorn,
9a0e77f2 176 ide_au1xxx, ide_palm3710
528a572d
BZ
177};
178
179typedef u8 hwif_chipset_t;
1da177e4
LT
180
181/*
182 * Structure to hold all information about the location of this port
183 */
184typedef struct hw_regs_s {
4c3032d8
BZ
185 union {
186 struct ide_io_ports io_ports;
187 unsigned long io_ports_array[IDE_NR_PORTS];
188 };
189
1da177e4 190 int irq; /* our irq number */
1da177e4
LT
191 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
192 hwif_chipset_t chipset;
c56c5648 193 struct device *dev, *parent;
d6276b5f 194 unsigned long config;
1da177e4
LT
195} hw_regs_t;
196
cbb010c1 197void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 198void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 199
1da177e4
LT
200static inline void ide_std_init_ports(hw_regs_t *hw,
201 unsigned long io_addr,
202 unsigned long ctl_addr)
203{
204 unsigned int i;
205
4c3032d8
BZ
206 for (i = 0; i <= 7; i++)
207 hw->io_ports_array[i] = io_addr++;
1da177e4 208
4c3032d8 209 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
210}
211
a861beb1
BZ
212/* for IDE PCI controllers in legacy mode, temporary */
213static inline int __ide_default_irq(unsigned long base)
214{
215 switch (base) {
216#ifdef CONFIG_IA64
217 case 0x1f0: return isa_irq_to_vector(14);
218 case 0x170: return isa_irq_to_vector(15);
219#else
220 case 0x1f0: return 14;
221 case 0x170: return 15;
222#endif
223 }
224 return 0;
225}
226
2a8f7450
BZ
227#if defined(CONFIG_ARM) || defined(CONFIG_FRV) || defined(CONFIG_M68K) || \
228 defined(CONFIG_MIPS) || defined(CONFIG_MN10300) || defined(CONFIG_PARISC) \
229 || defined(CONFIG_PPC) || defined(CONFIG_SPARC) || defined(CONFIG_SPARC64)
1da177e4 230#include <asm/ide.h>
2a8f7450
BZ
231#else
232#include <asm-generic/ide_iops.h>
233#endif
1da177e4 234
c5bfc375 235#define MAX_HWIFS 10
83ae20c8 236
1da177e4
LT
237/* Currently only m68k, apus and m8xx need it */
238#ifndef IDE_ARCH_ACK_INTR
239# define ide_ack_intr(hwif) (1)
240#endif
241
242/* Currently only Atari needs it */
243#ifndef IDE_ARCH_LOCK
244# define ide_release_lock() do {} while (0)
245# define ide_get_lock(hdlr, data) do {} while (0)
246#endif /* IDE_ARCH_LOCK */
247
248/*
249 * Now for the data we need to maintain per-drive: ide_drive_t
250 */
251
252#define ide_scsi 0x21
253#define ide_disk 0x20
254#define ide_optical 0x7
255#define ide_cdrom 0x5
256#define ide_tape 0x1
257#define ide_floppy 0x0
258
259/*
260 * Special Driver Flags
261 *
262 * set_geometry : respecify drive geometry
263 * recalibrate : seek to cyl 0
264 * set_multmode : set multmode count
1da177e4
LT
265 * reserved : unused
266 */
267typedef union {
268 unsigned all : 8;
269 struct {
1da177e4
LT
270 unsigned set_geometry : 1;
271 unsigned recalibrate : 1;
272 unsigned set_multmode : 1;
6982daf7 273 unsigned reserved : 5;
1da177e4
LT
274 } b;
275} special_t;
276
1da177e4
LT
277/*
278 * Status returned from various ide_ functions
279 */
280typedef enum {
281 ide_stopped, /* no drive operation was started */
282 ide_started, /* a drive operation was started, handler was set */
283} ide_startstop_t;
284
d6ff9f64
BZ
285enum {
286 IDE_TFLAG_LBA48 = (1 << 0),
287 IDE_TFLAG_FLAGGED = (1 << 2),
288 IDE_TFLAG_OUT_DATA = (1 << 3),
289 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
290 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
291 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
292 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
293 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
294 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
295 IDE_TFLAG_OUT_HOB_NSECT |
296 IDE_TFLAG_OUT_HOB_LBAL |
297 IDE_TFLAG_OUT_HOB_LBAM |
298 IDE_TFLAG_OUT_HOB_LBAH,
299 IDE_TFLAG_OUT_FEATURE = (1 << 9),
300 IDE_TFLAG_OUT_NSECT = (1 << 10),
301 IDE_TFLAG_OUT_LBAL = (1 << 11),
302 IDE_TFLAG_OUT_LBAM = (1 << 12),
303 IDE_TFLAG_OUT_LBAH = (1 << 13),
304 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
305 IDE_TFLAG_OUT_NSECT |
306 IDE_TFLAG_OUT_LBAL |
307 IDE_TFLAG_OUT_LBAM |
308 IDE_TFLAG_OUT_LBAH,
309 IDE_TFLAG_OUT_DEVICE = (1 << 14),
310 IDE_TFLAG_WRITE = (1 << 15),
311 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
312 IDE_TFLAG_IN_DATA = (1 << 17),
313 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
314 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
315 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
316 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
317 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
318 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
319 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
320 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
321 IDE_TFLAG_IN_HOB_LBAM |
322 IDE_TFLAG_IN_HOB_LBAH,
323 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
324 IDE_TFLAG_IN_HOB_NSECT |
325 IDE_TFLAG_IN_HOB_LBA,
326 IDE_TFLAG_IN_FEATURE = (1 << 1),
327 IDE_TFLAG_IN_NSECT = (1 << 25),
328 IDE_TFLAG_IN_LBAL = (1 << 26),
329 IDE_TFLAG_IN_LBAM = (1 << 27),
330 IDE_TFLAG_IN_LBAH = (1 << 28),
331 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
332 IDE_TFLAG_IN_LBAM |
333 IDE_TFLAG_IN_LBAH,
334 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
335 IDE_TFLAG_IN_LBA,
336 IDE_TFLAG_IN_DEVICE = (1 << 29),
337 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
338 IDE_TFLAG_IN_HOB,
339 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
340 IDE_TFLAG_IN_TF,
341 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
342 IDE_TFLAG_IN_DEVICE,
343 /* force 16-bit I/O operations */
344 IDE_TFLAG_IO_16BIT = (1 << 30),
345 /* ide_task_t was allocated using kmalloc() */
346 IDE_TFLAG_DYN = (1 << 31),
347};
348
349struct ide_taskfile {
350 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
351
352 u8 hob_feature; /* 1-5: additional data to support LBA48 */
353 u8 hob_nsect;
354 u8 hob_lbal;
355 u8 hob_lbam;
356 u8 hob_lbah;
357
358 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
359
360 union { /*  7: */
361 u8 error; /* read: error */
362 u8 feature; /* write: feature */
363 };
364
365 u8 nsect; /* 8: number of sectors */
366 u8 lbal; /* 9: LBA low */
367 u8 lbam; /* 10: LBA mid */
368 u8 lbah; /* 11: LBA high */
369
370 u8 device; /* 12: device select */
371
372 union { /* 13: */
373 u8 status; /*  read: status  */
374 u8 command; /* write: command */
375 };
376};
377
378typedef struct ide_task_s {
379 union {
380 struct ide_taskfile tf;
381 u8 tf_array[14];
382 };
383 u32 tf_flags;
384 int data_phase;
385 struct request *rq; /* copy of request */
386 void *special; /* valid_t generally */
387} ide_task_t;
388
67c56364
BZ
389/* ATAPI packet command flags */
390enum {
391 /* set when an error is considered normal - no retry (ide-tape) */
392 PC_FLAG_ABORT = (1 << 0),
393 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
394 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
395 PC_FLAG_DMA_OK = (1 << 3),
396 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
397 PC_FLAG_DMA_ERROR = (1 << 5),
398 PC_FLAG_WRITING = (1 << 6),
399 /* command timed out */
400 PC_FLAG_TIMEDOUT = (1 << 7),
401};
402
403/*
404 * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
405 * This is used for several packet commands (not for READ/WRITE commands).
406 */
407#define IDE_PC_BUFFER_SIZE 256
408
409struct ide_atapi_pc {
410 /* actual packet bytes */
411 u8 c[12];
412 /* incremented on each retry */
413 int retries;
414 int error;
415
416 /* bytes to transfer */
417 int req_xfer;
418 /* bytes actually transferred */
419 int xferred;
420
421 /* data buffer */
422 u8 *buf;
423 /* current buffer position */
424 u8 *cur_pos;
425 int buf_size;
426 /* missing/available data on the current buffer */
427 int b_count;
428
429 /* the corresponding request */
430 struct request *rq;
431
432 unsigned long flags;
433
434 /*
435 * those are more or less driver-specific and some of them are subject
436 * to change/removal later.
437 */
438 u8 pc_buf[IDE_PC_BUFFER_SIZE];
439
440 /* idetape only */
441 struct idetape_bh *bh;
442 char *b_data;
443
444 /* idescsi only for now */
445 struct scatterlist *sg;
446 unsigned int sg_cnt;
447
448 struct scsi_cmnd *scsi_cmd;
449 void (*done) (struct scsi_cmnd *);
450
451 unsigned long timeout;
452};
453
8185d5aa 454struct ide_devset;
1da177e4 455struct ide_driver_s;
1da177e4 456
e3a59b4d
HR
457#ifdef CONFIG_BLK_DEV_IDEACPI
458struct ide_acpi_drive_link;
459struct ide_acpi_hwif_link;
460#endif
461
3b8ac539
BP
462/* ATAPI device flags */
463enum {
464 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
465 IDE_AFLAG_MEDIA_CHANGED = (1 << 1),
3b8ac539
BP
466 /* Drive cannot lock the door. */
467 IDE_AFLAG_NO_DOORLOCK = (1 << 2),
0578042d
BZ
468
469 /* ide-cd */
3b8ac539
BP
470 /* Drive cannot eject the disc. */
471 IDE_AFLAG_NO_EJECT = (1 << 3),
472 /* Drive is a pre ATAPI 1.2 drive. */
473 IDE_AFLAG_PRE_ATAPI12 = (1 << 4),
474 /* TOC addresses are in BCD. */
475 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 5),
476 /* TOC track numbers are in BCD. */
477 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 6),
478 /*
479 * Drive does not provide data in multiples of SECTOR_SIZE
480 * when more than one interrupt is needed.
481 */
482 IDE_AFLAG_LIMIT_NFRAMES = (1 << 7),
483 /* Seeking in progress. */
484 IDE_AFLAG_SEEKING = (1 << 8),
485 /* Saved TOC information is current. */
486 IDE_AFLAG_TOC_VALID = (1 << 9),
487 /* We think that the drive door is locked. */
488 IDE_AFLAG_DOOR_LOCKED = (1 << 10),
489 /* SET_CD_SPEED command is unsupported. */
490 IDE_AFLAG_NO_SPEED_SELECT = (1 << 11),
491 IDE_AFLAG_VERTOS_300_SSD = (1 << 12),
492 IDE_AFLAG_VERTOS_600_ESD = (1 << 13),
493 IDE_AFLAG_SANYO_3CD = (1 << 14),
494 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 15),
495 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 16),
496 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 17),
497
498 /* ide-floppy */
499 /* Format in progress */
500 IDE_AFLAG_FORMAT_IN_PROGRESS = (1 << 18),
501 /* Avoid commands not supported in Clik drive */
502 IDE_AFLAG_CLIK_DRIVE = (1 << 19),
503 /* Requires BH algorithm for packets */
504 IDE_AFLAG_ZIP_DRIVE = (1 << 20),
49cac39e
BZ
505 /* Write protect */
506 IDE_AFLAG_WP = (1 << 21),
507 /* Supports format progress report */
508 IDE_AFLAG_SRFP = (1 << 22),
3b8ac539
BP
509
510 /* ide-tape */
49cac39e 511 IDE_AFLAG_IGNORE_DSC = (1 << 23),
3b8ac539 512 /* 0 When the tape position is unknown */
49cac39e 513 IDE_AFLAG_ADDRESS_VALID = (1 << 24),
3b8ac539 514 /* Device already opened */
49cac39e 515 IDE_AFLAG_BUSY = (1 << 25),
3b8ac539 516 /* Attempt to auto-detect the current user block size */
49cac39e 517 IDE_AFLAG_DETECT_BS = (1 << 26),
3b8ac539 518 /* Currently on a filemark */
49cac39e 519 IDE_AFLAG_FILEMARK = (1 << 27),
3b8ac539 520 /* 0 = no tape is loaded, so we don't rewind after ejecting */
49cac39e 521 IDE_AFLAG_MEDIUM_PRESENT = (1 << 28),
f20f2586 522
49cac39e 523 IDE_AFLAG_NO_AUTOCLOSE = (1 << 29),
3b8ac539
BP
524};
525
97100fc8
BZ
526/* device flags */
527enum {
528 /* restore settings after device reset */
529 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
530 /* device is using DMA for read/write */
531 IDE_DFLAG_USING_DMA = (1 << 1),
532 /* okay to unmask other IRQs */
533 IDE_DFLAG_UNMASK = (1 << 2),
534 /* don't attempt flushes */
535 IDE_DFLAG_NOFLUSH = (1 << 3),
536 /* DSC overlap */
537 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
538 /* give potential excess bandwidth */
539 IDE_DFLAG_NICE1 = (1 << 5),
540 /* device is physically present */
541 IDE_DFLAG_PRESENT = (1 << 6),
542 /* device ejected hint */
543 IDE_DFLAG_DEAD = (1 << 7),
544 /* id read from device (synthetic if not set) */
545 IDE_DFLAG_ID_READ = (1 << 8),
546 IDE_DFLAG_NOPROBE = (1 << 9),
547 /* need to do check_media_change() */
548 IDE_DFLAG_REMOVABLE = (1 << 10),
549 /* needed for removable devices */
550 IDE_DFLAG_ATTACH = (1 << 11),
551 IDE_DFLAG_FORCED_GEOM = (1 << 12),
552 /* disallow setting unmask bit */
553 IDE_DFLAG_NO_UNMASK = (1 << 13),
554 /* disallow enabling 32-bit I/O */
555 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
556 /* for removable only: door lock/unlock works */
557 IDE_DFLAG_DOORLOCKING = (1 << 15),
558 /* disallow DMA */
559 IDE_DFLAG_NODMA = (1 << 16),
560 /* powermanagment told us not to do anything, so sleep nicely */
561 IDE_DFLAG_BLOCKED = (1 << 17),
562 /* ide-scsi emulation */
563 IDE_DFLAG_SCSI = (1 << 18),
564 /* sleeping & sleep field valid */
565 IDE_DFLAG_SLEEPING = (1 << 19),
566 IDE_DFLAG_POST_RESET = (1 << 20),
567 IDE_DFLAG_UDMA33_WARNED = (1 << 21),
568 IDE_DFLAG_LBA48 = (1 << 22),
569 /* status of write cache */
570 IDE_DFLAG_WCACHE = (1 << 23),
571 /* used for ignoring ATA_DF */
572 IDE_DFLAG_NOWERR = (1 << 24),
c3922048
BZ
573 /* retrying in PIO */
574 IDE_DFLAG_DMA_PIO_RETRY = (1 << 25),
d1d76714 575 IDE_DFLAG_LBA = (1 << 26),
97100fc8
BZ
576};
577
d7c26ebb 578struct ide_drive_s {
1da177e4
LT
579 char name[4]; /* drive name, such as "hda" */
580 char driver_req[10]; /* requests specific driver */
581
165125e1 582 struct request_queue *queue; /* request queue */
1da177e4
LT
583
584 struct request *rq; /* current request */
585 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4 586 void *driver_data; /* extra driver data */
48fb2688 587 u16 *id; /* identification info */
7662d046 588#ifdef CONFIG_IDE_PROC_FS
1da177e4 589 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 590 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 591#endif
1da177e4
LT
592 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
593
97100fc8
BZ
594 unsigned long dev_flags;
595
1da177e4
LT
596 unsigned long sleep; /* sleep until this time */
597 unsigned long service_start; /* time we started last request */
598 unsigned long service_time; /* service time of last request */
599 unsigned long timeout; /* max time to wait for irq */
600
601 special_t special; /* special action flags */
1da177e4 602
7f612f27 603 u8 select; /* basic drive/head select reg value */
1da177e4 604 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 605 u8 waiting_for_dma; /* dma currently in progress */
1da177e4 606
1da177e4
LT
607 u8 quirk_list; /* considered quirky, set for a specific host */
608 u8 init_speed; /* transfer rate set at boot */
1da177e4 609 u8 current_speed; /* current transfer rate set */
513daadd 610 u8 desired_speed; /* desired transfer rate set */
1da177e4 611 u8 dn; /* now wide spread use */
1da177e4
LT
612 u8 acoustic; /* acoustic management */
613 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
614 u8 ready_stat; /* min status value for drive ready */
615 u8 mult_count; /* current multiple sector setting */
616 u8 mult_req; /* requested multiple sector setting */
1da177e4 617 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 618 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
619 u8 head; /* "real" number of heads */
620 u8 sect; /* "real" sectors per track */
621 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
622 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
623
baf08f0b
BZ
624 /* delay this long before sending packet command */
625 u8 pc_delay;
626
1da177e4
LT
627 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
628 unsigned int cyl; /* "real" number of cyls */
26bcb879 629 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
630 unsigned int failures; /* current failure count */
631 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 632 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
633
634 u64 capacity64; /* total number of sectors */
635
636 int lun; /* logical unit */
637 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
638
639 unsigned long debug_mask; /* debugging levels switch */
640
e3a59b4d
HR
641#ifdef CONFIG_BLK_DEV_IDEACPI
642 struct ide_acpi_drive_link *acpidata;
643#endif
1da177e4
LT
644 struct list_head list;
645 struct device gendev;
f36d4024 646 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 647
2b9efba4
BZ
648 /* current packet command */
649 struct ide_atapi_pc *pc;
650
d7c26ebb 651 /* callback for packet commands */
b14c7212 652 void (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 653
85e39035
BZ
654 void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *);
655 int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *,
656 unsigned int, int);
657
3b8ac539 658 unsigned long atapi_flags;
67c56364
BZ
659
660 struct ide_atapi_pc request_sense_pc;
661 struct request request_sense_rq;
d7c26ebb
BP
662};
663
664typedef struct ide_drive_s ide_drive_t;
1da177e4 665
5aeddf90
BP
666#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
667
668#define to_ide_drv(obj, cont_type) \
669 container_of(obj, struct cont_type, kref)
670
671#define ide_drv_g(disk, cont_type) \
672 container_of((disk)->private_data, struct cont_type, driver)
8604affd 673
039788e1 674struct ide_port_info;
1da177e4 675
374e042c
BZ
676struct ide_tp_ops {
677 void (*exec_command)(struct hwif_s *, u8);
678 u8 (*read_status)(struct hwif_s *);
679 u8 (*read_altstatus)(struct hwif_s *);
680 u8 (*read_sff_dma_status)(struct hwif_s *);
681
682 void (*set_irq)(struct hwif_s *, int);
683
684 void (*tf_load)(ide_drive_t *, struct ide_task_s *);
685 void (*tf_read)(ide_drive_t *, struct ide_task_s *);
686
687 void (*input_data)(ide_drive_t *, struct request *, void *,
688 unsigned int);
689 void (*output_data)(ide_drive_t *, struct request *, void *,
690 unsigned int);
691};
692
693extern const struct ide_tp_ops default_tp_ops;
694
39b986a6
BZ
695/**
696 * struct ide_port_ops - IDE port operations
697 *
698 * @init_dev: host specific initialization of a device
699 * @set_pio_mode: routine to program host for PIO mode
700 * @set_dma_mode: routine to program host for DMA mode
701 * @selectproc: tweaks hardware to select drive
702 * @reset_poll: chipset polling based on hba specifics
703 * @pre_reset: chipset specific changes to default for device-hba resets
704 * @resetproc: routine to reset controller after a disk reset
705 * @maskproc: special host masking for drive selection
706 * @quirkproc: check host's drive quirk list
bfa7d8e5 707 * @clear_irq: clear IRQ
39b986a6
BZ
708 *
709 * @mdma_filter: filter MDMA modes
710 * @udma_filter: filter UDMA modes
711 *
712 * @cable_detect: detect cable type
713 */
ac95beed 714struct ide_port_ops {
e6d95bd1 715 void (*init_dev)(ide_drive_t *);
ac95beed 716 void (*set_pio_mode)(ide_drive_t *, const u8);
ac95beed 717 void (*set_dma_mode)(ide_drive_t *, const u8);
ac95beed 718 void (*selectproc)(ide_drive_t *);
ac95beed 719 int (*reset_poll)(ide_drive_t *);
ac95beed 720 void (*pre_reset)(ide_drive_t *);
ac95beed 721 void (*resetproc)(ide_drive_t *);
ac95beed 722 void (*maskproc)(ide_drive_t *, int);
ac95beed 723 void (*quirkproc)(ide_drive_t *);
bfa7d8e5 724 void (*clear_irq)(ide_drive_t *);
ac95beed
BZ
725
726 u8 (*mdma_filter)(ide_drive_t *);
727 u8 (*udma_filter)(ide_drive_t *);
728
729 u8 (*cable_detect)(struct hwif_s *);
730};
731
5e37bdc0
BZ
732struct ide_dma_ops {
733 void (*dma_host_set)(struct ide_drive_s *, int);
734 int (*dma_setup)(struct ide_drive_s *);
735 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
736 void (*dma_start)(struct ide_drive_s *);
737 int (*dma_end)(struct ide_drive_s *);
738 int (*dma_test_irq)(struct ide_drive_s *);
739 void (*dma_lost_irq)(struct ide_drive_s *);
740 void (*dma_timeout)(struct ide_drive_s *);
741};
742
08da591e
BZ
743struct ide_host;
744
1da177e4
LT
745typedef struct hwif_s {
746 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
747 struct hwif_s *mate; /* other hwif from same PCI chip */
748 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
749 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
750
08da591e
BZ
751 struct ide_host *host;
752
1da177e4
LT
753 char name[6]; /* name of interface, eg. "ide0" */
754
4c3032d8
BZ
755 struct ide_io_ports io_ports;
756
1da177e4 757 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 758
1da177e4
LT
759 ide_drive_t drives[MAX_DRIVES]; /* drive info */
760
761 u8 major; /* our major number */
762 u8 index; /* 0 for ide0; 1 for ide1; ... */
763 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 764
e95d9c6b 765 u32 host_flags;
6a824c92 766
4099d143
BZ
767 u8 pio_mask;
768
1da177e4
LT
769 u8 ultra_mask;
770 u8 mwdma_mask;
771 u8 swdma_mask;
772
49521f97
BZ
773 u8 cbl; /* cable type */
774
1da177e4
LT
775 hwif_chipset_t chipset; /* sub-module for tuning.. */
776
36501650
BZ
777 struct device *dev;
778
18e181fe
BZ
779 ide_ack_intr_t *ack_intr;
780
1da177e4
LT
781 void (*rw_disk)(ide_drive_t *, struct request *);
782
374e042c 783 const struct ide_tp_ops *tp_ops;
ac95beed 784 const struct ide_port_ops *port_ops;
f37afdac 785 const struct ide_dma_ops *dma_ops;
bfa14b42 786
1da177e4
LT
787 /* dma physical region descriptor table (cpu view) */
788 unsigned int *dmatable_cpu;
789 /* dma physical region descriptor table (dma view) */
790 dma_addr_t dmatable_dma;
791 /* Scatter-gather list used to build the above */
792 struct scatterlist *sg_table;
793 int sg_max_nents; /* Maximum number of entries in it */
794 int sg_nents; /* Current number of entries in it */
795 int sg_dma_direction; /* dma transfer direction */
796
797 /* data phase of the active command (currently only valid for PIO/DMA) */
798 int data_phase;
799
d6ff9f64
BZ
800 struct ide_task_s task; /* current command */
801
1da177e4
LT
802 unsigned int nsect;
803 unsigned int nleft;
55c16a70 804 struct scatterlist *cursg;
1da177e4
LT
805 unsigned int cursg_ofs;
806
1da177e4
LT
807 int rqsize; /* max sectors per request */
808 int irq; /* our irq number */
809
1da177e4 810 unsigned long dma_base; /* base addr for dma ports */
1da177e4 811
1da177e4
LT
812 unsigned long config_data; /* for use by chipset-specific code */
813 unsigned long select_data; /* for use by chipset-specific code */
814
020e322d
SS
815 unsigned long extra_base; /* extra addr for dma ports */
816 unsigned extra_ports; /* number of extra dma ports */
817
1da177e4 818 unsigned present : 1; /* this interface exists */
1da177e4
LT
819 unsigned serialized : 1; /* serialized all channel operation */
820 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
1da177e4
LT
821 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
822
f74c9141
BZ
823 struct device gendev;
824 struct device *portdev;
825
f36d4024 826 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
827
828 void *hwif_data; /* extra hwif data */
829
e3a59b4d
HR
830#ifdef CONFIG_BLK_DEV_IDEACPI
831 struct ide_acpi_hwif_link *acpidata;
832#endif
22fc6ecc 833} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 834
a36223b0
BZ
835#define MAX_HOST_PORTS 4
836
48c3c107 837struct ide_host {
a36223b0 838 ide_hwif_t *ports[MAX_HOST_PORTS];
48c3c107 839 unsigned int n_ports;
6cdf6eb3 840 struct device *dev[2];
feb22b7f 841 unsigned int (*init_chipset)(struct pci_dev *);
ef0b0427 842 unsigned long host_flags;
6cdf6eb3 843 void *host_priv;
48c3c107
BZ
844};
845
1da177e4
LT
846/*
847 * internal ide interrupt handler type
848 */
1da177e4
LT
849typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
850typedef int (ide_expiry_t)(ide_drive_t *);
851
0eea6458 852/* used by ide-cd, ide-floppy, etc. */
9567b349 853typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
0eea6458 854
1da177e4
LT
855typedef struct hwgroup_s {
856 /* irq handler, if active */
857 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 858
1da177e4
LT
859 /* BOOL: protects all fields below */
860 volatile int busy;
861 /* BOOL: wake us up on timer expiry */
862 unsigned int sleeping : 1;
863 /* BOOL: polling active & poll_timeout field valid */
864 unsigned int polling : 1;
913759ac 865
1da177e4
LT
866 /* current drive */
867 ide_drive_t *drive;
868 /* ptr to current hwif in linked-list */
869 ide_hwif_t *hwif;
870
1da177e4
LT
871 /* current request */
872 struct request *rq;
a6fbb1c8 873
1da177e4
LT
874 /* failsafe timer */
875 struct timer_list timer;
1da177e4
LT
876 /* timeout value during long polls */
877 unsigned long poll_timeout;
878 /* queried upon timeouts */
879 int (*expiry)(ide_drive_t *);
a6fbb1c8 880
23450319
SS
881 int req_gen;
882 int req_gen_timer;
1da177e4
LT
883} ide_hwgroup_t;
884
7662d046
BZ
885typedef struct ide_driver_s ide_driver_t;
886
f9383c42 887extern struct mutex ide_setting_mtx;
1da177e4 888
92f1f8fd
EO
889/*
890 * configurable drive settings
891 */
892
893#define DS_SYNC (1 << 0)
894
895struct ide_devset {
896 int (*get)(ide_drive_t *);
897 int (*set)(ide_drive_t *, int);
898 unsigned int flags;
899};
900
901#define __DEVSET(_flags, _get, _set) { \
902 .flags = _flags, \
903 .get = _get, \
904 .set = _set, \
905}
7662d046 906
8185d5aa 907#define ide_devset_get(name, field) \
92f1f8fd 908static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
909{ \
910 return drive->field; \
911}
912
913#define ide_devset_set(name, field) \
92f1f8fd 914static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
915{ \
916 drive->field = arg; \
917 return 0; \
918}
919
97100fc8
BZ
920#define ide_devset_get_flag(name, flag) \
921static int get_##name(ide_drive_t *drive) \
922{ \
923 return !!(drive->dev_flags & flag); \
924}
925
926#define ide_devset_set_flag(name, flag) \
927static int set_##name(ide_drive_t *drive, int arg) \
928{ \
929 if (arg) \
930 drive->dev_flags |= flag; \
931 else \
932 drive->dev_flags &= ~flag; \
933 return 0; \
934}
935
92f1f8fd
EO
936#define __IDE_DEVSET(_name, _flags, _get, _set) \
937const struct ide_devset ide_devset_##_name = \
938 __DEVSET(_flags, _get, _set)
939
940#define IDE_DEVSET(_name, _flags, _get, _set) \
941static __IDE_DEVSET(_name, _flags, _get, _set)
942
943#define ide_devset_rw(_name, _func) \
944IDE_DEVSET(_name, 0, get_##_func, set_##_func)
945
946#define ide_devset_w(_name, _func) \
947IDE_DEVSET(_name, 0, NULL, set_##_func)
948
f8790489
BZ
949#define ide_ext_devset_rw(_name, _func) \
950__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
951
952#define ide_ext_devset_rw_sync(_name, _func) \
953__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
92f1f8fd
EO
954
955#define ide_decl_devset(_name) \
956extern const struct ide_devset ide_devset_##_name
957
958ide_decl_devset(io_32bit);
959ide_decl_devset(keepsettings);
960ide_decl_devset(pio_mode);
961ide_decl_devset(unmaskirq);
962ide_decl_devset(using_dma);
963
7662d046 964#ifdef CONFIG_IDE_PROC_FS
1da177e4 965/*
92f1f8fd 966 * /proc/ide interface
1da177e4
LT
967 */
968
92f1f8fd
EO
969#define ide_devset_rw_field(_name, _field) \
970ide_devset_get(_name, _field); \
971ide_devset_set(_name, _field); \
972IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
973
97100fc8
BZ
974#define ide_devset_rw_flag(_name, _field) \
975ide_devset_get_flag(_name, _field); \
976ide_devset_set_flag(_name, _field); \
977IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
978
92f1f8fd
EO
979struct ide_proc_devset {
980 const char *name;
981 const struct ide_devset *setting;
982 int min, max;
983 int (*mulf)(ide_drive_t *);
984 int (*divf)(ide_drive_t *);
8185d5aa
BZ
985};
986
92f1f8fd
EO
987#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
988 .name = __stringify(_name), \
989 .setting = &ide_devset_##_name, \
990 .min = _min, \
991 .max = _max, \
992 .mulf = _mulf, \
993 .divf = _divf, \
8185d5aa
BZ
994}
995
92f1f8fd
EO
996#define IDE_PROC_DEVSET(_name, _min, _max) \
997__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 998
1da177e4
LT
999typedef struct {
1000 const char *name;
1001 mode_t mode;
1002 read_proc_t *read_proc;
1003 write_proc_t *write_proc;
1004} ide_proc_entry_t;
1005
ecfd80e4
BZ
1006void proc_ide_create(void);
1007void proc_ide_destroy(void);
5cbf79cd 1008void ide_proc_register_port(ide_hwif_t *);
d9270a3f 1009void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 1010void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 1011void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
1012void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
1013void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
1014
1da177e4
LT
1015read_proc_t proc_ide_read_capacity;
1016read_proc_t proc_ide_read_geometry;
1017
1da177e4
LT
1018/*
1019 * Standard exit stuff:
1020 */
1021#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
1022{ \
1023 len -= off; \
1024 if (len < count) { \
1025 *eof = 1; \
1026 if (len <= 0) \
1027 return 0; \
1028 } else \
1029 len = count; \
1030 *start = page + off; \
1031 return len; \
1032}
1033#else
ecfd80e4
BZ
1034static inline void proc_ide_create(void) { ; }
1035static inline void proc_ide_destroy(void) { ; }
5cbf79cd 1036static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 1037static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 1038static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 1039static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
1040static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
1041static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
1da177e4
LT
1042#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
1043#endif
1044
e1c7c464
BP
1045enum {
1046 /* enter/exit functions */
1047 IDE_DBG_FUNC = (1 << 0),
1048 /* sense key/asc handling */
1049 IDE_DBG_SENSE = (1 << 1),
1050 /* packet commands handling */
1051 IDE_DBG_PC = (1 << 2),
1052 /* request handling */
1053 IDE_DBG_RQ = (1 << 3),
1054 /* driver probing/setup */
1055 IDE_DBG_PROBE = (1 << 4),
1056};
1057
1058/* DRV_NAME has to be defined in the driver before using the macro below */
1059#define __ide_debug_log(lvl, fmt, args...) \
1060{ \
1061 if (unlikely(drive->debug_mask & lvl)) \
1062 printk(KERN_INFO DRV_NAME ": " fmt, ## args); \
1063}
1064
1da177e4 1065/*
0d346ba0 1066 * Power Management state machine (rq->pm->pm_step).
1da177e4 1067 *
0d346ba0 1068 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
1069 * This can return:
1070 * - ide_stopped : In this case, the core calls us back again unless
1071 * step have been set to ide_power_state_completed.
1072 * - ide_started : In this case, the channel is left busy until an
1073 * async event (interrupt) occurs.
0d346ba0 1074 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
1075 * do_rw_taskfile().
1076 *
0d346ba0 1077 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
1078 * with the error code if any. This routine should update the step value
1079 * and return. It should not start a new request. The core will call
0d346ba0
BZ
1080 * ide_start_power_step() for the new step value, unless step have been
1081 * set to IDE_PM_COMPLETED.
1da177e4 1082 */
1da177e4 1083enum {
0d346ba0
BZ
1084 IDE_PM_START_SUSPEND,
1085 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1086 IDE_PM_STANDBY,
1087
1088 IDE_PM_START_RESUME,
1089 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1090 IDE_PM_IDLE,
1091 IDE_PM_RESTORE_DMA,
1092
1093 IDE_PM_COMPLETED,
1da177e4
LT
1094};
1095
1096/*
1097 * Subdrivers support.
4ef3b8f4
LR
1098 *
1099 * The gendriver.owner field should be set to the module owner of this driver.
1100 * The gendriver.name field should be set to the name of this driver
1da177e4 1101 */
7662d046 1102struct ide_driver_s {
1da177e4 1103 const char *version;
1da177e4
LT
1104 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1105 int (*end_request)(ide_drive_t *, int, int);
1106 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1da177e4 1107 struct device_driver gen_driver;
4031bbe4
RK
1108 int (*probe)(ide_drive_t *);
1109 void (*remove)(ide_drive_t *);
0d2157f7 1110 void (*resume)(ide_drive_t *);
4031bbe4 1111 void (*shutdown)(ide_drive_t *);
7662d046 1112#ifdef CONFIG_IDE_PROC_FS
92f1f8fd
EO
1113 ide_proc_entry_t *proc;
1114 const struct ide_proc_devset *settings;
7662d046
BZ
1115#endif
1116};
1da177e4 1117
4031bbe4
RK
1118#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
1119
08da591e
BZ
1120int ide_device_get(ide_drive_t *);
1121void ide_device_put(ide_drive_t *);
1122
aa768773
BZ
1123struct ide_ioctl_devset {
1124 unsigned int get_ioctl;
1125 unsigned int set_ioctl;
92f1f8fd 1126 const struct ide_devset *setting;
aa768773
BZ
1127};
1128
1129int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1130 unsigned long, const struct ide_ioctl_devset *);
1131
1132int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *,
1133 unsigned, unsigned long);
1da177e4 1134
ebae41a5
BZ
1135extern int ide_vlb_clk;
1136extern int ide_pci_clk;
1137
1da177e4 1138extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
1139int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1140 int uptodate, int nr_sectors);
1da177e4 1141
1da177e4
LT
1142extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1143
cd2a2d96
BZ
1144void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
1145 ide_expiry_t *);
1da177e4 1146
1fc14258
BZ
1147void ide_execute_pkt_cmd(ide_drive_t *);
1148
9f87abe8
BZ
1149void ide_pad_transfer(ide_drive_t *, int, int);
1150
1da177e4
LT
1151ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1152
1da177e4
LT
1153ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1154
4dde4492 1155void ide_fix_driveid(u16 *);
01745112 1156
1da177e4
LT
1157extern void ide_fixstring(u8 *, const int, const int);
1158
b163f46d
BZ
1159int ide_busy_sleep(ide_hwif_t *, unsigned long, int);
1160
74af21cf 1161int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1162
1da177e4
LT
1163extern ide_startstop_t ide_do_reset (ide_drive_t *);
1164
92f1f8fd
EO
1165extern int ide_devset_execute(ide_drive_t *drive,
1166 const struct ide_devset *setting, int arg);
1167
63f5abb0 1168extern void ide_do_drive_cmd(ide_drive_t *, struct request *);
1da177e4 1169
1da177e4
LT
1170extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1171
089c5c7e 1172void ide_tf_dump(const char *, struct ide_taskfile *);
1da177e4 1173
374e042c
BZ
1174void ide_exec_command(ide_hwif_t *, u8);
1175u8 ide_read_status(ide_hwif_t *);
1176u8 ide_read_altstatus(ide_hwif_t *);
1177u8 ide_read_sff_dma_status(ide_hwif_t *);
1178
1179void ide_set_irq(ide_hwif_t *, int);
1180
1181void ide_tf_load(ide_drive_t *, ide_task_t *);
1182void ide_tf_read(ide_drive_t *, ide_task_t *);
1183
1184void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int);
1185void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int);
1186
acaa0f5f
BZ
1187int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int);
1188
1da177e4 1189extern void SELECT_DRIVE(ide_drive_t *);
ed4af48f 1190void SELECT_MASK(ide_drive_t *, int);
1da177e4 1191
92eb4380 1192u8 ide_read_error(ide_drive_t *);
1823649b 1193void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1194
1da177e4 1195extern int drive_is_ready(ide_drive_t *);
1da177e4 1196
2fc57388
BZ
1197void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
1198
51509eec
BZ
1199int ide_check_atapi_device(ide_drive_t *, const char *);
1200
7bf7420a
BZ
1201void ide_init_pc(struct ide_atapi_pc *);
1202
7645c151
BZ
1203/*
1204 * Special requests for ide-tape block device strategy routine.
1205 *
1206 * In order to service a character device command, we add special requests to
1207 * the tail of our block device request queue and wait for their completion.
1208 */
1209enum {
1210 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1211 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1212 REQ_IDETAPE_READ = (1 << 2),
1213 REQ_IDETAPE_WRITE = (1 << 3),
1214};
1215
2ac07d92 1216int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
7645c151 1217
de699ad5 1218int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1219int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1220int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b
BZ
1221void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1222void ide_retry_pc(ide_drive_t *, struct gendisk *);
0578042d 1223
844b9468
BZ
1224static inline unsigned long ide_scsi_get_timeout(struct ide_atapi_pc *pc)
1225{
1226 return max_t(unsigned long, WAIT_CMD, pc->timeout - jiffies);
1227}
1228
1229int ide_scsi_expiry(ide_drive_t *);
1230
baf08f0b 1231ide_startstop_t ide_issue_pc(ide_drive_t *, unsigned int, ide_expiry_t *);
594c16d8 1232
f6e29e35 1233ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 1234
4d7a984b
TH
1235void task_end_request(ide_drive_t *, struct request *, u8);
1236
ac026ff2 1237int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
1238int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
1239
1da177e4 1240int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1da177e4 1241
1da177e4 1242extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1243extern int ide_config_drive_speed(ide_drive_t *, u8);
1244extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1245extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1246
1247extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1248
1da177e4
LT
1249extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1250
1da177e4 1251extern void ide_timer_expiry(unsigned long);
7d12e780 1252extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1253extern void do_ide_request(struct request_queue *);
1da177e4
LT
1254
1255void ide_init_disk(struct gendisk *, ide_drive_t *);
1256
6d208b39 1257#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1258extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1259#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1260#else
1261#define ide_pci_register_driver(d) pci_register_driver(d)
1262#endif
1263
c97c6aca 1264void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int,
48c3c107 1265 hw_regs_t *, hw_regs_t **);
85620436 1266void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1267
8e882ba1 1268#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1269int ide_pci_set_master(struct pci_dev *, const char *);
1270unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1271int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1272int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1273#else
b123f56e
BZ
1274static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1275 const struct ide_port_info *d)
1276{
1277 return -EINVAL;
1278}
c413b9b9
BZ
1279#endif
1280
1da177e4
LT
1281typedef struct ide_pci_enablebit_s {
1282 u8 reg; /* byte pci reg holding the enable-bit */
1283 u8 mask; /* mask to isolate the enable-bit */
1284 u8 val; /* value of masked reg when "enabled" */
1285} ide_pci_enablebit_t;
1286
1287enum {
1288 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1289 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1290 /* single port device */
a5d8c5c8 1291 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1292 /* don't use legacy PIO blacklist */
1293 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1294 /* set for the second port of QD65xx */
1295 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1296 /* use PIO8/9 for prefetch off/on */
1297 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1298 /* use PIO6/7 for fast-devsel off/on */
1299 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1300 /* use 100-102 and 200-202 PIO values to set DMA modes */
1301 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1302 /*
1303 * keep DMA setting when programming PIO mode, may be used only
1304 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1305 */
1306 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1307 /* program host for the transfer mode after programming device */
1308 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1309 /* don't program host/device for the transfer mode ("smart" hosts) */
1310 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1311 /* trust BIOS for programming chipset/device for DMA */
1312 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1313 /* host is CS5510/CS5520 */
1314 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1315 /* ATAPI DMA is unsupported */
1316 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1317 /* set if host is a "non-bootable" controller */
1318 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1319 /* host doesn't support DMA */
1320 IDE_HFLAG_NO_DMA = (1 << 14),
1321 /* check if host is PCI IDE device before allowing DMA */
1322 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1323 /* host uses MMIO */
1324 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1325 /* no LBA48 */
1326 IDE_HFLAG_NO_LBA48 = (1 << 17),
1327 /* no LBA48 DMA */
1328 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1329 /* data FIFO is cleared by an error */
1330 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1331 /* serialize ports */
1332 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1333 /* use legacy IRQs */
1334 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1335 /* force use of legacy IRQs */
1336 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ
1337 /* limit LBA48 requests to 256 sectors */
1338 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ
1339 /* use 32-bit I/O ops */
1340 IDE_HFLAG_IO_32BIT = (1 << 24),
1341 /* unmask IRQs */
1342 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1fd18905
BZ
1343 /* serialize ports if DMA is possible (for sl82c105) */
1344 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1345 /* force host out of "simplex" mode */
1346 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1347 /* DSC overlap is unsupported */
1348 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1349 /* never use 32-bit I/O ops */
1350 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1351 /* never unmask IRQs */
1352 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1353};
1354
7cab14a7 1355#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1356# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1357#else
1358# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1359#endif
1360
039788e1 1361struct ide_port_info {
1da177e4 1362 char *name;
a326b02b 1363 unsigned int (*init_chipset)(struct pci_dev *);
1da177e4
LT
1364 void (*init_iops)(ide_hwif_t *);
1365 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1366 int (*init_dma)(ide_hwif_t *,
1367 const struct ide_port_info *);
ac95beed 1368
374e042c 1369 const struct ide_tp_ops *tp_ops;
ac95beed 1370 const struct ide_port_ops *port_ops;
f37afdac 1371 const struct ide_dma_ops *dma_ops;
ac95beed 1372
1da177e4 1373 ide_pci_enablebit_t enablebits[2];
528a572d 1374 hwif_chipset_t chipset;
9ffcf364 1375 u32 host_flags;
4099d143 1376 u8 pio_mask;
5f8b6c34
BZ
1377 u8 swdma_mask;
1378 u8 mwdma_mask;
18137207 1379 u8 udma_mask;
039788e1 1380};
1da177e4 1381
6cdf6eb3
BZ
1382int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1383int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1384 const struct ide_port_info *, void *);
ef0b0427 1385void ide_pci_remove(struct pci_dev *);
1da177e4 1386
feb22b7f
BZ
1387#ifdef CONFIG_PM
1388int ide_pci_suspend(struct pci_dev *, pm_message_t);
1389int ide_pci_resume(struct pci_dev *);
1390#else
1391#define ide_pci_suspend NULL
1392#define ide_pci_resume NULL
1393#endif
1394
1da177e4
LT
1395void ide_map_sg(ide_drive_t *, struct request *);
1396void ide_init_sg_cmd(ide_drive_t *, struct request *);
1397
1398#define BAD_DMA_DRIVE 0
1399#define GOOD_DMA_DRIVE 1
1400
65e5f2e3
JC
1401struct drive_list_entry {
1402 const char *id_model;
1403 const char *id_firmware;
1404};
1405
4dde4492 1406int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1407
1408#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1409int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1410int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1411
1412u8 ide_find_dma_mode(ide_drive_t *, u8);
1413
1414static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1415{
1416 return ide_find_dma_mode(drive, XFER_UDMA_6);
1417}
1418
4a546e04 1419void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1420void ide_dma_off(ide_drive_t *);
4a546e04 1421void ide_dma_on(ide_drive_t *);
3608b5d7 1422int ide_set_dma(ide_drive_t *);
578cfa0d 1423void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1424ide_startstop_t ide_dma_intr(ide_drive_t *);
1425
062f9f02
BZ
1426int ide_build_sglist(ide_drive_t *, struct request *);
1427void ide_destroy_dmatable(ide_drive_t *);
1428
8e882ba1 1429#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4 1430extern int ide_build_dmatable(ide_drive_t *, struct request *);
b8e73fba
BZ
1431int ide_allocate_dma_engine(ide_hwif_t *);
1432void ide_release_dma_engine(ide_hwif_t *);
1da177e4 1433
15ce926a 1434void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1435extern int ide_dma_setup(ide_drive_t *);
f37afdac 1436void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4 1437extern void ide_dma_start(ide_drive_t *);
653bcf52 1438int ide_dma_end(ide_drive_t *);
f37afdac 1439int ide_dma_test_irq(ide_drive_t *);
841d2a9b 1440extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1441extern void ide_dma_timeout(ide_drive_t *);
71fc9fcc 1442extern const struct ide_dma_ops sff_dma_ops;
8e882ba1 1443#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4
LT
1444
1445#else
3ab7efe8 1446static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1447static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1448static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1449static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1450static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1451static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1452static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1453static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1454static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1da177e4
LT
1455#endif /* CONFIG_BLK_DEV_IDEDMA */
1456
8e882ba1 1457#ifndef CONFIG_BLK_DEV_IDEDMA_SFF
0d1bad21 1458static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1da177e4
LT
1459#endif
1460
e3a59b4d
HR
1461#ifdef CONFIG_BLK_DEV_IDEACPI
1462extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1463extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1464extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1465extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1466void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1467extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1468#else
1469static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1470static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1471static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1472static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1473static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1474static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1475#endif
1476
fbd13088 1477void ide_remove_port_from_hwgroup(ide_hwif_t *);
387750c3 1478void ide_unregister(ide_hwif_t *);
1da177e4
LT
1479
1480void ide_register_region(struct gendisk *);
1481void ide_unregister_region(struct gendisk *);
1482
f01393e4 1483void ide_undecoded_slave(ide_drive_t *);
1da177e4 1484
9fd91d95
BZ
1485void ide_port_apply_params(ide_hwif_t *);
1486
48c3c107 1487struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **);
8a69580e 1488void ide_host_free(struct ide_host *);
48c3c107
BZ
1489int ide_host_register(struct ide_host *, const struct ide_port_info *,
1490 hw_regs_t **);
6f904d01
BZ
1491int ide_host_add(const struct ide_port_info *, hw_regs_t **,
1492 struct ide_host **);
48c3c107 1493void ide_host_remove(struct ide_host *);
0bfeee7d 1494int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1495void ide_port_unregister_devices(ide_hwif_t *);
1496void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1497
1498static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1499{
1500 return hwif->hwif_data;
1501}
1502
1503static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1504{
1505 hwif->hwif_data = data;
1506}
1507
3ab7efe8 1508const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1509extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1510extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1511
a501633c 1512u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1513u8 ide_dump_status(ide_drive_t *, const char *, u8);
1514
3be53f3f
BZ
1515struct ide_timing {
1516 u8 mode;
1517 u8 setup; /* t1 */
1518 u16 act8b; /* t2 for 8-bit io */
1519 u16 rec8b; /* t2i for 8-bit io */
1520 u16 cyc8b; /* t0 for 8-bit io */
1521 u16 active; /* t2 or tD */
1522 u16 recover; /* t2i or tK */
1523 u16 cycle; /* t0 */
1524 u16 udma; /* t2CYCTYP/2 */
1525};
1526
1527enum {
1528 IDE_TIMING_SETUP = (1 << 0),
1529 IDE_TIMING_ACT8B = (1 << 1),
1530 IDE_TIMING_REC8B = (1 << 2),
1531 IDE_TIMING_CYC8B = (1 << 3),
1532 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1533 IDE_TIMING_CYC8B,
1534 IDE_TIMING_ACTIVE = (1 << 4),
1535 IDE_TIMING_RECOVER = (1 << 5),
1536 IDE_TIMING_CYCLE = (1 << 6),
1537 IDE_TIMING_UDMA = (1 << 7),
1538 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1539 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1540 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1541};
1542
f06ab340 1543struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1544u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1545void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1546 struct ide_timing *, unsigned int);
1547int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1548
9ad54093
BZ
1549int ide_scan_pio_blacklist(char *);
1550
2134758d 1551u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4 1552
88b2b32b
BZ
1553int ide_set_pio_mode(ide_drive_t *, u8);
1554int ide_set_dma_mode(ide_drive_t *, u8);
1555
26bcb879
BZ
1556void ide_set_pio(ide_drive_t *, u8);
1557
1558static inline void ide_set_max_pio(ide_drive_t *drive)
1559{
1560 ide_set_pio(drive, 255);
1561}
1da177e4
LT
1562
1563extern spinlock_t ide_lock;
ef29888e 1564extern struct mutex ide_cfg_mtx;
1da177e4
LT
1565/*
1566 * Structure locking:
1567 *
ef29888e 1568 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1569 * ide_hwif_t->{next,hwgroup}
1570 * ide_drive_t->next
1571 *
1572 * ide_hwgroup_t->busy: ide_lock
1573 * ide_hwgroup_t->hwif: ide_lock
1574 * ide_hwif_t->mate: constant, no locking
1575 * ide_drive_t->hwif: constant, no locking
1576 */
1577
366c7f55 1578#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1579
1580extern struct bus_type ide_bus_type;
f74c9141 1581extern struct class *ide_port_class;
1da177e4 1582
7b9f25b5
BZ
1583static inline void ide_dump_identify(u8 *id)
1584{
1585 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1586}
1587
86b37860
CL
1588static inline int hwif_to_node(ide_hwif_t *hwif)
1589{
96f80219 1590 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1591}
1592
7e59ea21 1593static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1594{
7e59ea21 1595 ide_drive_t *peer = &drive->hwif->drives[(drive->dn ^ 1) & 1];
1b678347 1596
97100fc8 1597 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1598}
1da177e4 1599#endif /* _IDE_H */