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ide: add IDE_HFLAG_4DRIVES host flag
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1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
3ceca727 11#include <linux/ata.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
feb22b7f 20#include <linux/pm.h>
e3a59b4d
HR
21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
d45b70ab 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV) || defined(CONFIG_MN10300)
4ee06b7e
BZ
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
1da177e4
LT
35/*
36 * Probably not wise to fiddle with these
37 */
b40d1b88 38#define IDE_DEFAULT_MAX_FAILURES 1
1da177e4
LT
39#define ERROR_MAX 8 /* Max read/write errors per sector */
40#define ERROR_RESET 3 /* Reset controller every 4th retry */
41#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
42
1da177e4
LT
43/*
44 * Definitions for accessing IDE controller registers
45 */
46#define IDE_NR_PORTS (10)
47
4c3032d8
BZ
48struct ide_io_ports {
49 unsigned long data_addr;
50
51 union {
52 unsigned long error_addr; /* read: error */
53 unsigned long feature_addr; /* write: feature */
54 };
55
56 unsigned long nsect_addr;
57 unsigned long lbal_addr;
58 unsigned long lbam_addr;
59 unsigned long lbah_addr;
60
61 unsigned long device_addr;
62
63 union {
64 unsigned long status_addr; /*  read: status  */
65 unsigned long command_addr; /* write: command */
66 };
67
68 unsigned long ctl_addr;
69
70 unsigned long irq_addr;
71};
1da177e4
LT
72
73#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 74
3a7d2484
BZ
75#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
76#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
77#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
78#define DRIVE_READY (ATA_DRDY | ATA_DSC)
79
80#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
81
82#define SATA_NR_PORTS (3) /* 16 possible ?? */
83
84#define SATA_STATUS_OFFSET (0)
1da177e4 85#define SATA_ERROR_OFFSET (1)
1da177e4 86#define SATA_CONTROL_OFFSET (2)
1da177e4 87
1da177e4
LT
88/*
89 * Our Physical Region Descriptor (PRD) table should be large enough
90 * to handle the biggest I/O request we are likely to see. Since requests
91 * can have no more than 256 sectors, and since the typical blocksize is
92 * two or more sectors, we could get by with a limit of 128 entries here for
93 * the usual worst case. Most requests seem to include some contiguous blocks,
94 * further reducing the number of table entries required.
95 *
96 * The driver reverts to PIO mode for individual requests that exceed
97 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
98 * 100% of all crazy scenarios here is not necessary.
99 *
100 * As it turns out though, we must allocate a full 4KB page for this,
101 * so the two PRD tables (ide0 & ide1) will each get half of that,
102 * allowing each to have about 256 entries (8 bytes each) from this.
103 */
104#define PRD_BYTES 8
105#define PRD_ENTRIES 256
106
107/*
108 * Some more useful definitions
109 */
110#define PARTN_BITS 6 /* number of minor dev bits for partitions */
111#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
112#define SECTOR_SIZE 512
151a6701 113
1da177e4
LT
114/*
115 * Timeouts for various operations:
116 */
d6e2955a
BZ
117enum {
118 /* spec allows up to 20ms */
119 WAIT_DRQ = HZ / 10, /* 100ms */
120 /* some laptops are very slow */
121 WAIT_READY = 5 * HZ, /* 5s */
122 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
123 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
124 /* worst case when spinning up */
125 WAIT_WORSTCASE = 30 * HZ, /* 30s */
126 /* maximum wait for an IRQ to happen */
127 WAIT_CMD = 10 * HZ, /* 10s */
128 /* Some drives require a longer IRQ timeout. */
129 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
130 /*
131 * Some drives (for example, Seagate STT3401A Travan) require a very
132 * long timeout, because they don't return an interrupt or clear their
133 * BSY bit until after the command completes (even retension commands).
134 */
135 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
136 /* minimum sleep time */
137 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
138};
1da177e4 139
79e36a9f
EO
140/*
141 * Op codes for special requests to be handled by ide_special_rq().
142 * Values should be in the range of 0x20 to 0x3f.
143 */
144#define REQ_DRIVE_RESET 0x20
92f1f8fd 145#define REQ_DEVSET_EXEC 0x21
4abdc6ee
EO
146#define REQ_PARK_HEADS 0x22
147#define REQ_UNPARK_HEADS 0x23
79e36a9f 148
1da177e4
LT
149/*
150 * Check for an interrupt and acknowledge the interrupt status
151 */
152struct hwif_s;
153typedef int (ide_ack_intr_t)(struct hwif_s *);
154
1da177e4
LT
155/*
156 * hwif_chipset_t is used to keep track of the specific hardware
157 * chipset used by each IDE interface, if known.
158 */
528a572d 159enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
160 ide_cmd640, ide_dtc2278, ide_ali14xx,
161 ide_qd65xx, ide_umc8672, ide_ht6560b,
b7876a6f 162 ide_4drives, ide_pmac, ide_acorn,
9a0e77f2 163 ide_au1xxx, ide_palm3710
528a572d
BZ
164};
165
166typedef u8 hwif_chipset_t;
1da177e4
LT
167
168/*
169 * Structure to hold all information about the location of this port
170 */
171typedef struct hw_regs_s {
4c3032d8
BZ
172 union {
173 struct ide_io_ports io_ports;
174 unsigned long io_ports_array[IDE_NR_PORTS];
175 };
176
1da177e4 177 int irq; /* our irq number */
1da177e4
LT
178 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
179 hwif_chipset_t chipset;
c56c5648 180 struct device *dev, *parent;
d6276b5f 181 unsigned long config;
1da177e4
LT
182} hw_regs_t;
183
1da177e4
LT
184static inline void ide_std_init_ports(hw_regs_t *hw,
185 unsigned long io_addr,
186 unsigned long ctl_addr)
187{
188 unsigned int i;
189
4c3032d8
BZ
190 for (i = 0; i <= 7; i++)
191 hw->io_ports_array[i] = io_addr++;
1da177e4 192
4c3032d8 193 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
194}
195
c5bfc375 196#define MAX_HWIFS 10
83ae20c8 197
1da177e4
LT
198/*
199 * Now for the data we need to maintain per-drive: ide_drive_t
200 */
201
202#define ide_scsi 0x21
203#define ide_disk 0x20
204#define ide_optical 0x7
205#define ide_cdrom 0x5
206#define ide_tape 0x1
207#define ide_floppy 0x0
208
209/*
210 * Special Driver Flags
211 *
212 * set_geometry : respecify drive geometry
213 * recalibrate : seek to cyl 0
214 * set_multmode : set multmode count
1da177e4
LT
215 * reserved : unused
216 */
217typedef union {
218 unsigned all : 8;
219 struct {
1da177e4
LT
220 unsigned set_geometry : 1;
221 unsigned recalibrate : 1;
222 unsigned set_multmode : 1;
6982daf7 223 unsigned reserved : 5;
1da177e4
LT
224 } b;
225} special_t;
226
1da177e4
LT
227/*
228 * Status returned from various ide_ functions
229 */
230typedef enum {
231 ide_stopped, /* no drive operation was started */
232 ide_started, /* a drive operation was started, handler was set */
233} ide_startstop_t;
234
d6ff9f64
BZ
235enum {
236 IDE_TFLAG_LBA48 = (1 << 0),
237 IDE_TFLAG_FLAGGED = (1 << 2),
238 IDE_TFLAG_OUT_DATA = (1 << 3),
239 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
240 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
241 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
242 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
243 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
244 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
245 IDE_TFLAG_OUT_HOB_NSECT |
246 IDE_TFLAG_OUT_HOB_LBAL |
247 IDE_TFLAG_OUT_HOB_LBAM |
248 IDE_TFLAG_OUT_HOB_LBAH,
249 IDE_TFLAG_OUT_FEATURE = (1 << 9),
250 IDE_TFLAG_OUT_NSECT = (1 << 10),
251 IDE_TFLAG_OUT_LBAL = (1 << 11),
252 IDE_TFLAG_OUT_LBAM = (1 << 12),
253 IDE_TFLAG_OUT_LBAH = (1 << 13),
254 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
255 IDE_TFLAG_OUT_NSECT |
256 IDE_TFLAG_OUT_LBAL |
257 IDE_TFLAG_OUT_LBAM |
258 IDE_TFLAG_OUT_LBAH,
259 IDE_TFLAG_OUT_DEVICE = (1 << 14),
260 IDE_TFLAG_WRITE = (1 << 15),
261 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
262 IDE_TFLAG_IN_DATA = (1 << 17),
263 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
264 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
265 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
266 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
267 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
268 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
269 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
270 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
271 IDE_TFLAG_IN_HOB_LBAM |
272 IDE_TFLAG_IN_HOB_LBAH,
273 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
274 IDE_TFLAG_IN_HOB_NSECT |
275 IDE_TFLAG_IN_HOB_LBA,
276 IDE_TFLAG_IN_FEATURE = (1 << 1),
277 IDE_TFLAG_IN_NSECT = (1 << 25),
278 IDE_TFLAG_IN_LBAL = (1 << 26),
279 IDE_TFLAG_IN_LBAM = (1 << 27),
280 IDE_TFLAG_IN_LBAH = (1 << 28),
281 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
282 IDE_TFLAG_IN_LBAM |
283 IDE_TFLAG_IN_LBAH,
284 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
285 IDE_TFLAG_IN_LBA,
286 IDE_TFLAG_IN_DEVICE = (1 << 29),
287 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
288 IDE_TFLAG_IN_HOB,
289 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
290 IDE_TFLAG_IN_TF,
291 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
292 IDE_TFLAG_IN_DEVICE,
293 /* force 16-bit I/O operations */
294 IDE_TFLAG_IO_16BIT = (1 << 30),
295 /* ide_task_t was allocated using kmalloc() */
296 IDE_TFLAG_DYN = (1 << 31),
297};
298
299struct ide_taskfile {
300 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
301
302 u8 hob_feature; /* 1-5: additional data to support LBA48 */
303 u8 hob_nsect;
304 u8 hob_lbal;
305 u8 hob_lbam;
306 u8 hob_lbah;
307
308 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
309
310 union { /*  7: */
311 u8 error; /* read: error */
312 u8 feature; /* write: feature */
313 };
314
315 u8 nsect; /* 8: number of sectors */
316 u8 lbal; /* 9: LBA low */
317 u8 lbam; /* 10: LBA mid */
318 u8 lbah; /* 11: LBA high */
319
320 u8 device; /* 12: device select */
321
322 union { /* 13: */
323 u8 status; /*  read: status  */
324 u8 command; /* write: command */
325 };
326};
327
328typedef struct ide_task_s {
329 union {
330 struct ide_taskfile tf;
331 u8 tf_array[14];
332 };
333 u32 tf_flags;
334 int data_phase;
335 struct request *rq; /* copy of request */
336 void *special; /* valid_t generally */
337} ide_task_t;
338
67c56364
BZ
339/* ATAPI packet command flags */
340enum {
341 /* set when an error is considered normal - no retry (ide-tape) */
342 PC_FLAG_ABORT = (1 << 0),
343 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
344 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
345 PC_FLAG_DMA_OK = (1 << 3),
346 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
347 PC_FLAG_DMA_ERROR = (1 << 5),
348 PC_FLAG_WRITING = (1 << 6),
349 /* command timed out */
350 PC_FLAG_TIMEDOUT = (1 << 7),
351};
352
353/*
354 * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
355 * This is used for several packet commands (not for READ/WRITE commands).
356 */
357#define IDE_PC_BUFFER_SIZE 256
4cad085e 358#define ATAPI_WAIT_PC (60 * HZ)
67c56364
BZ
359
360struct ide_atapi_pc {
361 /* actual packet bytes */
362 u8 c[12];
363 /* incremented on each retry */
364 int retries;
365 int error;
366
367 /* bytes to transfer */
368 int req_xfer;
369 /* bytes actually transferred */
370 int xferred;
371
372 /* data buffer */
373 u8 *buf;
374 /* current buffer position */
375 u8 *cur_pos;
376 int buf_size;
377 /* missing/available data on the current buffer */
378 int b_count;
379
380 /* the corresponding request */
381 struct request *rq;
382
383 unsigned long flags;
384
385 /*
386 * those are more or less driver-specific and some of them are subject
387 * to change/removal later.
388 */
389 u8 pc_buf[IDE_PC_BUFFER_SIZE];
390
391 /* idetape only */
392 struct idetape_bh *bh;
393 char *b_data;
394
67c56364
BZ
395 struct scatterlist *sg;
396 unsigned int sg_cnt;
397
67c56364
BZ
398 unsigned long timeout;
399};
400
8185d5aa 401struct ide_devset;
7f3c868b 402struct ide_driver;
1da177e4 403
e3a59b4d
HR
404#ifdef CONFIG_BLK_DEV_IDEACPI
405struct ide_acpi_drive_link;
406struct ide_acpi_hwif_link;
407#endif
408
806f80a6
BZ
409struct ide_drive_s;
410
411struct ide_disk_ops {
412 int (*check)(struct ide_drive_s *, const char *);
413 int (*get_capacity)(struct ide_drive_s *);
414 void (*setup)(struct ide_drive_s *);
415 void (*flush)(struct ide_drive_s *);
416 int (*init_media)(struct ide_drive_s *, struct gendisk *);
417 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
418 int);
419 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
420 sector_t);
421 int (*end_request)(struct ide_drive_s *, int, int);
badf8082
AV
422 int (*ioctl)(struct ide_drive_s *, struct block_device *,
423 fmode_t, unsigned int, unsigned long);
806f80a6
BZ
424};
425
3b8ac539
BP
426/* ATAPI device flags */
427enum {
428 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
0578042d
BZ
429
430 /* ide-cd */
3b8ac539 431 /* Drive cannot eject the disc. */
bf64741f 432 IDE_AFLAG_NO_EJECT = (1 << 1),
3b8ac539 433 /* Drive is a pre ATAPI 1.2 drive. */
bf64741f 434 IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
3b8ac539 435 /* TOC addresses are in BCD. */
bf64741f 436 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
3b8ac539 437 /* TOC track numbers are in BCD. */
bf64741f 438 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
3b8ac539
BP
439 /*
440 * Drive does not provide data in multiples of SECTOR_SIZE
441 * when more than one interrupt is needed.
442 */
bf64741f 443 IDE_AFLAG_LIMIT_NFRAMES = (1 << 5),
3b8ac539 444 /* Saved TOC information is current. */
bf64741f 445 IDE_AFLAG_TOC_VALID = (1 << 6),
3b8ac539 446 /* We think that the drive door is locked. */
bf64741f 447 IDE_AFLAG_DOOR_LOCKED = (1 << 7),
3b8ac539 448 /* SET_CD_SPEED command is unsupported. */
bf64741f
BP
449 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
450 IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
451 IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
452 IDE_AFLAG_SANYO_3CD = (1 << 11),
453 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
454 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
455 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
3b8ac539
BP
456
457 /* ide-floppy */
3b8ac539 458 /* Avoid commands not supported in Clik drive */
bf64741f 459 IDE_AFLAG_CLIK_DRIVE = (1 << 15),
3b8ac539 460 /* Requires BH algorithm for packets */
bf64741f 461 IDE_AFLAG_ZIP_DRIVE = (1 << 16),
49cac39e 462 /* Supports format progress report */
bf64741f 463 IDE_AFLAG_SRFP = (1 << 17),
3b8ac539
BP
464
465 /* ide-tape */
bf64741f 466 IDE_AFLAG_IGNORE_DSC = (1 << 18),
3b8ac539 467 /* 0 When the tape position is unknown */
bf64741f 468 IDE_AFLAG_ADDRESS_VALID = (1 << 19),
3b8ac539 469 /* Device already opened */
bf64741f 470 IDE_AFLAG_BUSY = (1 << 20),
3b8ac539 471 /* Attempt to auto-detect the current user block size */
bf64741f 472 IDE_AFLAG_DETECT_BS = (1 << 21),
3b8ac539 473 /* Currently on a filemark */
bf64741f 474 IDE_AFLAG_FILEMARK = (1 << 22),
3b8ac539 475 /* 0 = no tape is loaded, so we don't rewind after ejecting */
bf64741f 476 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
f20f2586 477
bf64741f 478 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
3b8ac539
BP
479};
480
97100fc8
BZ
481/* device flags */
482enum {
483 /* restore settings after device reset */
484 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
485 /* device is using DMA for read/write */
486 IDE_DFLAG_USING_DMA = (1 << 1),
487 /* okay to unmask other IRQs */
488 IDE_DFLAG_UNMASK = (1 << 2),
489 /* don't attempt flushes */
490 IDE_DFLAG_NOFLUSH = (1 << 3),
491 /* DSC overlap */
492 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
493 /* give potential excess bandwidth */
494 IDE_DFLAG_NICE1 = (1 << 5),
495 /* device is physically present */
496 IDE_DFLAG_PRESENT = (1 << 6),
97100fc8
BZ
497 /* id read from device (synthetic if not set) */
498 IDE_DFLAG_ID_READ = (1 << 8),
499 IDE_DFLAG_NOPROBE = (1 << 9),
500 /* need to do check_media_change() */
501 IDE_DFLAG_REMOVABLE = (1 << 10),
502 /* needed for removable devices */
503 IDE_DFLAG_ATTACH = (1 << 11),
504 IDE_DFLAG_FORCED_GEOM = (1 << 12),
505 /* disallow setting unmask bit */
506 IDE_DFLAG_NO_UNMASK = (1 << 13),
507 /* disallow enabling 32-bit I/O */
508 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
509 /* for removable only: door lock/unlock works */
510 IDE_DFLAG_DOORLOCKING = (1 << 15),
511 /* disallow DMA */
512 IDE_DFLAG_NODMA = (1 << 16),
513 /* powermanagment told us not to do anything, so sleep nicely */
514 IDE_DFLAG_BLOCKED = (1 << 17),
97100fc8 515 /* sleeping & sleep field valid */
5317464d
BP
516 IDE_DFLAG_SLEEPING = (1 << 18),
517 IDE_DFLAG_POST_RESET = (1 << 19),
518 IDE_DFLAG_UDMA33_WARNED = (1 << 20),
519 IDE_DFLAG_LBA48 = (1 << 21),
97100fc8 520 /* status of write cache */
5317464d 521 IDE_DFLAG_WCACHE = (1 << 22),
97100fc8 522 /* used for ignoring ATA_DF */
5317464d 523 IDE_DFLAG_NOWERR = (1 << 23),
c3922048 524 /* retrying in PIO */
5317464d
BP
525 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
526 IDE_DFLAG_LBA = (1 << 25),
4abdc6ee 527 /* don't unload heads */
5317464d 528 IDE_DFLAG_NO_UNLOAD = (1 << 26),
4abdc6ee 529 /* heads unloaded, please don't reset port */
5317464d
BP
530 IDE_DFLAG_PARKED = (1 << 27),
531 IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
da167876 532 /* write protect */
5317464d
BP
533 IDE_DFLAG_WP = (1 << 29),
534 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
97100fc8
BZ
535};
536
d7c26ebb 537struct ide_drive_s {
1da177e4
LT
538 char name[4]; /* drive name, such as "hda" */
539 char driver_req[10]; /* requests specific driver */
540
165125e1 541 struct request_queue *queue; /* request queue */
1da177e4
LT
542
543 struct request *rq; /* current request */
1da177e4 544 void *driver_data; /* extra driver data */
48fb2688 545 u16 *id; /* identification info */
7662d046 546#ifdef CONFIG_IDE_PROC_FS
1da177e4 547 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 548 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 549#endif
1da177e4
LT
550 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
551
806f80a6
BZ
552 const struct ide_disk_ops *disk_ops;
553
97100fc8
BZ
554 unsigned long dev_flags;
555
1da177e4 556 unsigned long sleep; /* sleep until this time */
1da177e4
LT
557 unsigned long timeout; /* max time to wait for irq */
558
559 special_t special; /* special action flags */
1da177e4 560
7f612f27 561 u8 select; /* basic drive/head select reg value */
1da177e4 562 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 563 u8 waiting_for_dma; /* dma currently in progress */
0a9b6f88 564 u8 dma; /* atapi dma flag */
1da177e4 565
1da177e4
LT
566 u8 quirk_list; /* considered quirky, set for a specific host */
567 u8 init_speed; /* transfer rate set at boot */
1da177e4 568 u8 current_speed; /* current transfer rate set */
513daadd 569 u8 desired_speed; /* desired transfer rate set */
1da177e4 570 u8 dn; /* now wide spread use */
1da177e4
LT
571 u8 acoustic; /* acoustic management */
572 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
573 u8 ready_stat; /* min status value for drive ready */
574 u8 mult_count; /* current multiple sector setting */
575 u8 mult_req; /* requested multiple sector setting */
1da177e4 576 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 577 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
578 u8 head; /* "real" number of heads */
579 u8 sect; /* "real" sectors per track */
580 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
581 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
582
baf08f0b
BZ
583 /* delay this long before sending packet command */
584 u8 pc_delay;
585
1da177e4
LT
586 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
587 unsigned int cyl; /* "real" number of cyls */
26bcb879 588 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
589 unsigned int failures; /* current failure count */
590 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 591 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
592
593 u64 capacity64; /* total number of sectors */
594
595 int lun; /* logical unit */
596 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
597
598 unsigned long debug_mask; /* debugging levels switch */
599
e3a59b4d
HR
600#ifdef CONFIG_BLK_DEV_IDEACPI
601 struct ide_acpi_drive_link *acpidata;
602#endif
1da177e4
LT
603 struct list_head list;
604 struct device gendev;
f36d4024 605 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 606
2b9efba4
BZ
607 /* current packet command */
608 struct ide_atapi_pc *pc;
609
d7c26ebb 610 /* callback for packet commands */
b14c7212 611 void (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 612
85e39035
BZ
613 void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *);
614 int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *,
615 unsigned int, int);
616
d6251d44
BP
617 ide_startstop_t (*irq_handler)(struct ide_drive_s *);
618
3b8ac539 619 unsigned long atapi_flags;
67c56364
BZ
620
621 struct ide_atapi_pc request_sense_pc;
622 struct request request_sense_rq;
d7c26ebb
BP
623};
624
625typedef struct ide_drive_s ide_drive_t;
1da177e4 626
5aeddf90
BP
627#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
628
629#define to_ide_drv(obj, cont_type) \
8fed4368 630 container_of(obj, struct cont_type, dev)
5aeddf90
BP
631
632#define ide_drv_g(disk, cont_type) \
633 container_of((disk)->private_data, struct cont_type, driver)
8604affd 634
039788e1 635struct ide_port_info;
1da177e4 636
374e042c
BZ
637struct ide_tp_ops {
638 void (*exec_command)(struct hwif_s *, u8);
639 u8 (*read_status)(struct hwif_s *);
640 u8 (*read_altstatus)(struct hwif_s *);
374e042c
BZ
641
642 void (*set_irq)(struct hwif_s *, int);
643
644 void (*tf_load)(ide_drive_t *, struct ide_task_s *);
645 void (*tf_read)(ide_drive_t *, struct ide_task_s *);
646
647 void (*input_data)(ide_drive_t *, struct request *, void *,
648 unsigned int);
649 void (*output_data)(ide_drive_t *, struct request *, void *,
650 unsigned int);
651};
652
653extern const struct ide_tp_ops default_tp_ops;
654
39b986a6
BZ
655/**
656 * struct ide_port_ops - IDE port operations
657 *
658 * @init_dev: host specific initialization of a device
659 * @set_pio_mode: routine to program host for PIO mode
660 * @set_dma_mode: routine to program host for DMA mode
661 * @selectproc: tweaks hardware to select drive
662 * @reset_poll: chipset polling based on hba specifics
663 * @pre_reset: chipset specific changes to default for device-hba resets
664 * @resetproc: routine to reset controller after a disk reset
665 * @maskproc: special host masking for drive selection
666 * @quirkproc: check host's drive quirk list
bfa7d8e5 667 * @clear_irq: clear IRQ
39b986a6
BZ
668 *
669 * @mdma_filter: filter MDMA modes
670 * @udma_filter: filter UDMA modes
671 *
672 * @cable_detect: detect cable type
673 */
ac95beed 674struct ide_port_ops {
e6d95bd1 675 void (*init_dev)(ide_drive_t *);
ac95beed 676 void (*set_pio_mode)(ide_drive_t *, const u8);
ac95beed 677 void (*set_dma_mode)(ide_drive_t *, const u8);
ac95beed 678 void (*selectproc)(ide_drive_t *);
ac95beed 679 int (*reset_poll)(ide_drive_t *);
ac95beed 680 void (*pre_reset)(ide_drive_t *);
ac95beed 681 void (*resetproc)(ide_drive_t *);
ac95beed 682 void (*maskproc)(ide_drive_t *, int);
ac95beed 683 void (*quirkproc)(ide_drive_t *);
bfa7d8e5 684 void (*clear_irq)(ide_drive_t *);
ac95beed
BZ
685
686 u8 (*mdma_filter)(ide_drive_t *);
687 u8 (*udma_filter)(ide_drive_t *);
688
689 u8 (*cable_detect)(struct hwif_s *);
690};
691
5e37bdc0
BZ
692struct ide_dma_ops {
693 void (*dma_host_set)(struct ide_drive_s *, int);
694 int (*dma_setup)(struct ide_drive_s *);
695 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
696 void (*dma_start)(struct ide_drive_s *);
697 int (*dma_end)(struct ide_drive_s *);
698 int (*dma_test_irq)(struct ide_drive_s *);
699 void (*dma_lost_irq)(struct ide_drive_s *);
700 void (*dma_timeout)(struct ide_drive_s *);
592b5315
SS
701 /*
702 * The following method is optional and only required to be
703 * implemented for the SFF-8038i compatible controllers.
704 */
705 u8 (*dma_sff_read_status)(struct hwif_s *);
5e37bdc0
BZ
706};
707
08da591e
BZ
708struct ide_host;
709
1da177e4 710typedef struct hwif_s {
1da177e4 711 struct hwif_s *mate; /* other hwif from same PCI chip */
1da177e4
LT
712 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
713
08da591e
BZ
714 struct ide_host *host;
715
1da177e4
LT
716 char name[6]; /* name of interface, eg. "ide0" */
717
4c3032d8
BZ
718 struct ide_io_ports io_ports;
719
1da177e4 720 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 721
2bd24a1c 722 ide_drive_t *devices[MAX_DRIVES + 1];
1da177e4
LT
723
724 u8 major; /* our major number */
725 u8 index; /* 0 for ide0; 1 for ide1; ... */
726 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 727
e95d9c6b 728 u32 host_flags;
6a824c92 729
4099d143
BZ
730 u8 pio_mask;
731
1da177e4
LT
732 u8 ultra_mask;
733 u8 mwdma_mask;
734 u8 swdma_mask;
735
49521f97
BZ
736 u8 cbl; /* cable type */
737
1da177e4
LT
738 hwif_chipset_t chipset; /* sub-module for tuning.. */
739
36501650
BZ
740 struct device *dev;
741
18e181fe
BZ
742 ide_ack_intr_t *ack_intr;
743
1da177e4
LT
744 void (*rw_disk)(ide_drive_t *, struct request *);
745
374e042c 746 const struct ide_tp_ops *tp_ops;
ac95beed 747 const struct ide_port_ops *port_ops;
f37afdac 748 const struct ide_dma_ops *dma_ops;
bfa14b42 749
1da177e4
LT
750 /* dma physical region descriptor table (cpu view) */
751 unsigned int *dmatable_cpu;
752 /* dma physical region descriptor table (dma view) */
753 dma_addr_t dmatable_dma;
2bbd57ca
BZ
754
755 /* maximum number of PRD table entries */
756 int prd_max_nents;
757 /* PRD entry size in bytes */
758 int prd_ent_size;
759
1da177e4
LT
760 /* Scatter-gather list used to build the above */
761 struct scatterlist *sg_table;
762 int sg_max_nents; /* Maximum number of entries in it */
763 int sg_nents; /* Current number of entries in it */
5d82720a 764 int orig_sg_nents;
1da177e4
LT
765 int sg_dma_direction; /* dma transfer direction */
766
767 /* data phase of the active command (currently only valid for PIO/DMA) */
768 int data_phase;
769
d6ff9f64
BZ
770 struct ide_task_s task; /* current command */
771
1da177e4
LT
772 unsigned int nsect;
773 unsigned int nleft;
55c16a70 774 struct scatterlist *cursg;
1da177e4
LT
775 unsigned int cursg_ofs;
776
1da177e4
LT
777 int rqsize; /* max sectors per request */
778 int irq; /* our irq number */
779
1da177e4 780 unsigned long dma_base; /* base addr for dma ports */
1da177e4 781
1da177e4
LT
782 unsigned long config_data; /* for use by chipset-specific code */
783 unsigned long select_data; /* for use by chipset-specific code */
784
020e322d
SS
785 unsigned long extra_base; /* extra addr for dma ports */
786 unsigned extra_ports; /* number of extra dma ports */
787
1da177e4 788 unsigned present : 1; /* this interface exists */
5b31f855 789 unsigned busy : 1; /* serializes devices on a port */
1da177e4 790
f74c9141
BZ
791 struct device gendev;
792 struct device *portdev;
793
f36d4024 794 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
795
796 void *hwif_data; /* extra hwif data */
797
e3a59b4d
HR
798#ifdef CONFIG_BLK_DEV_IDEACPI
799 struct ide_acpi_hwif_link *acpidata;
800#endif
b65fac32
BZ
801
802 /* IRQ handler, if active */
803 ide_startstop_t (*handler)(ide_drive_t *);
804
805 /* BOOL: polling active & poll_timeout field valid */
806 unsigned int polling : 1;
807
808 /* current drive */
809 ide_drive_t *cur_dev;
810
811 /* current request */
812 struct request *rq;
813
814 /* failsafe timer */
815 struct timer_list timer;
816 /* timeout value during long polls */
817 unsigned long poll_timeout;
818 /* queried upon timeouts */
819 int (*expiry)(ide_drive_t *);
820
821 int req_gen;
822 int req_gen_timer;
823
824 spinlock_t lock;
22fc6ecc 825} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 826
a36223b0
BZ
827#define MAX_HOST_PORTS 4
828
48c3c107 829struct ide_host {
2bd24a1c 830 ide_hwif_t *ports[MAX_HOST_PORTS + 1];
48c3c107 831 unsigned int n_ports;
6cdf6eb3 832 struct device *dev[2];
e354c1d8 833
2ed0ef54 834 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
835
836 void (*get_lock)(irq_handler_t, void *);
837 void (*release_lock)(void);
838
849d7130 839 irq_handler_t irq_handler;
e354c1d8 840
ef0b0427 841 unsigned long host_flags;
255115fb
BZ
842
843 int irq_flags;
844
6cdf6eb3 845 void *host_priv;
bd53cbcc 846 ide_hwif_t *cur_port; /* for hosts requiring serialization */
5b31f855
BZ
847
848 /* used for hosts requiring serialization */
e720b9e4 849 volatile unsigned long host_busy;
48c3c107
BZ
850};
851
5b31f855
BZ
852#define IDE_HOST_BUSY 0
853
1da177e4
LT
854/*
855 * internal ide interrupt handler type
856 */
1da177e4
LT
857typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
858typedef int (ide_expiry_t)(ide_drive_t *);
859
0eea6458 860/* used by ide-cd, ide-floppy, etc. */
9567b349 861typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
0eea6458 862
f9383c42 863extern struct mutex ide_setting_mtx;
1da177e4 864
92f1f8fd
EO
865/*
866 * configurable drive settings
867 */
868
869#define DS_SYNC (1 << 0)
870
871struct ide_devset {
872 int (*get)(ide_drive_t *);
873 int (*set)(ide_drive_t *, int);
874 unsigned int flags;
875};
876
877#define __DEVSET(_flags, _get, _set) { \
878 .flags = _flags, \
879 .get = _get, \
880 .set = _set, \
881}
7662d046 882
8185d5aa 883#define ide_devset_get(name, field) \
92f1f8fd 884static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
885{ \
886 return drive->field; \
887}
888
889#define ide_devset_set(name, field) \
92f1f8fd 890static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
891{ \
892 drive->field = arg; \
893 return 0; \
894}
895
97100fc8
BZ
896#define ide_devset_get_flag(name, flag) \
897static int get_##name(ide_drive_t *drive) \
898{ \
899 return !!(drive->dev_flags & flag); \
900}
901
902#define ide_devset_set_flag(name, flag) \
903static int set_##name(ide_drive_t *drive, int arg) \
904{ \
905 if (arg) \
906 drive->dev_flags |= flag; \
907 else \
908 drive->dev_flags &= ~flag; \
909 return 0; \
910}
911
92f1f8fd
EO
912#define __IDE_DEVSET(_name, _flags, _get, _set) \
913const struct ide_devset ide_devset_##_name = \
914 __DEVSET(_flags, _get, _set)
915
916#define IDE_DEVSET(_name, _flags, _get, _set) \
917static __IDE_DEVSET(_name, _flags, _get, _set)
918
919#define ide_devset_rw(_name, _func) \
920IDE_DEVSET(_name, 0, get_##_func, set_##_func)
921
922#define ide_devset_w(_name, _func) \
923IDE_DEVSET(_name, 0, NULL, set_##_func)
924
f8790489
BZ
925#define ide_ext_devset_rw(_name, _func) \
926__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
927
928#define ide_ext_devset_rw_sync(_name, _func) \
929__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
92f1f8fd
EO
930
931#define ide_decl_devset(_name) \
932extern const struct ide_devset ide_devset_##_name
933
934ide_decl_devset(io_32bit);
935ide_decl_devset(keepsettings);
936ide_decl_devset(pio_mode);
937ide_decl_devset(unmaskirq);
938ide_decl_devset(using_dma);
939
7662d046 940#ifdef CONFIG_IDE_PROC_FS
1da177e4 941/*
92f1f8fd 942 * /proc/ide interface
1da177e4
LT
943 */
944
92f1f8fd
EO
945#define ide_devset_rw_field(_name, _field) \
946ide_devset_get(_name, _field); \
947ide_devset_set(_name, _field); \
948IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
949
97100fc8
BZ
950#define ide_devset_rw_flag(_name, _field) \
951ide_devset_get_flag(_name, _field); \
952ide_devset_set_flag(_name, _field); \
953IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
954
92f1f8fd
EO
955struct ide_proc_devset {
956 const char *name;
957 const struct ide_devset *setting;
958 int min, max;
959 int (*mulf)(ide_drive_t *);
960 int (*divf)(ide_drive_t *);
8185d5aa
BZ
961};
962
92f1f8fd
EO
963#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
964 .name = __stringify(_name), \
965 .setting = &ide_devset_##_name, \
966 .min = _min, \
967 .max = _max, \
968 .mulf = _mulf, \
969 .divf = _divf, \
8185d5aa
BZ
970}
971
92f1f8fd
EO
972#define IDE_PROC_DEVSET(_name, _min, _max) \
973__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 974
1da177e4
LT
975typedef struct {
976 const char *name;
977 mode_t mode;
978 read_proc_t *read_proc;
979 write_proc_t *write_proc;
980} ide_proc_entry_t;
981
ecfd80e4
BZ
982void proc_ide_create(void);
983void proc_ide_destroy(void);
5cbf79cd 984void ide_proc_register_port(ide_hwif_t *);
d9270a3f 985void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 986void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 987void ide_proc_unregister_port(ide_hwif_t *);
7f3c868b
BZ
988void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
989void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
7662d046 990
1da177e4
LT
991read_proc_t proc_ide_read_capacity;
992read_proc_t proc_ide_read_geometry;
993
1da177e4
LT
994/*
995 * Standard exit stuff:
996 */
997#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
998{ \
999 len -= off; \
1000 if (len < count) { \
1001 *eof = 1; \
1002 if (len <= 0) \
1003 return 0; \
1004 } else \
1005 len = count; \
1006 *start = page + off; \
1007 return len; \
1008}
1009#else
ecfd80e4
BZ
1010static inline void proc_ide_create(void) { ; }
1011static inline void proc_ide_destroy(void) { ; }
5cbf79cd 1012static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 1013static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 1014static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 1015static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7f3c868b
BZ
1016static inline void ide_proc_register_driver(ide_drive_t *drive,
1017 struct ide_driver *driver) { ; }
1018static inline void ide_proc_unregister_driver(ide_drive_t *drive,
1019 struct ide_driver *driver) { ; }
1da177e4
LT
1020#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
1021#endif
1022
e1c7c464
BP
1023enum {
1024 /* enter/exit functions */
1025 IDE_DBG_FUNC = (1 << 0),
1026 /* sense key/asc handling */
1027 IDE_DBG_SENSE = (1 << 1),
1028 /* packet commands handling */
1029 IDE_DBG_PC = (1 << 2),
1030 /* request handling */
1031 IDE_DBG_RQ = (1 << 3),
1032 /* driver probing/setup */
1033 IDE_DBG_PROBE = (1 << 4),
1034};
1035
1036/* DRV_NAME has to be defined in the driver before using the macro below */
088b1b88
BP
1037#define __ide_debug_log(lvl, fmt, args...) \
1038{ \
1039 if (unlikely(drive->debug_mask & lvl)) \
1040 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \
1041 __func__, ## args); \
e1c7c464
BP
1042}
1043
1da177e4 1044/*
0d346ba0 1045 * Power Management state machine (rq->pm->pm_step).
1da177e4 1046 *
0d346ba0 1047 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
1048 * This can return:
1049 * - ide_stopped : In this case, the core calls us back again unless
1050 * step have been set to ide_power_state_completed.
1051 * - ide_started : In this case, the channel is left busy until an
1052 * async event (interrupt) occurs.
0d346ba0 1053 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
1054 * do_rw_taskfile().
1055 *
0d346ba0 1056 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
1057 * with the error code if any. This routine should update the step value
1058 * and return. It should not start a new request. The core will call
0d346ba0
BZ
1059 * ide_start_power_step() for the new step value, unless step have been
1060 * set to IDE_PM_COMPLETED.
1da177e4 1061 */
1da177e4 1062enum {
0d346ba0
BZ
1063 IDE_PM_START_SUSPEND,
1064 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1065 IDE_PM_STANDBY,
1066
1067 IDE_PM_START_RESUME,
1068 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1069 IDE_PM_IDLE,
1070 IDE_PM_RESTORE_DMA,
1071
1072 IDE_PM_COMPLETED,
1da177e4
LT
1073};
1074
e2984c62
BZ
1075int generic_ide_suspend(struct device *, pm_message_t);
1076int generic_ide_resume(struct device *);
1077
1078void ide_complete_power_step(ide_drive_t *, struct request *);
1079ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
1080void ide_complete_pm_request(ide_drive_t *, struct request *);
1081void ide_check_pm_state(ide_drive_t *, struct request *);
1082
1da177e4
LT
1083/*
1084 * Subdrivers support.
4ef3b8f4
LR
1085 *
1086 * The gendriver.owner field should be set to the module owner of this driver.
1087 * The gendriver.name field should be set to the name of this driver
1da177e4 1088 */
7f3c868b 1089struct ide_driver {
1da177e4 1090 const char *version;
1da177e4
LT
1091 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1092 int (*end_request)(ide_drive_t *, int, int);
1da177e4 1093 struct device_driver gen_driver;
4031bbe4
RK
1094 int (*probe)(ide_drive_t *);
1095 void (*remove)(ide_drive_t *);
0d2157f7 1096 void (*resume)(ide_drive_t *);
4031bbe4 1097 void (*shutdown)(ide_drive_t *);
7662d046 1098#ifdef CONFIG_IDE_PROC_FS
79cb3803
BZ
1099 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1100 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
7662d046
BZ
1101#endif
1102};
1da177e4 1103
7f3c868b 1104#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
4031bbe4 1105
08da591e
BZ
1106int ide_device_get(ide_drive_t *);
1107void ide_device_put(ide_drive_t *);
1108
aa768773
BZ
1109struct ide_ioctl_devset {
1110 unsigned int get_ioctl;
1111 unsigned int set_ioctl;
92f1f8fd 1112 const struct ide_devset *setting;
aa768773
BZ
1113};
1114
1115int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1116 unsigned long, const struct ide_ioctl_devset *);
1117
1bddd9e6 1118int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1da177e4 1119
ebae41a5
BZ
1120extern int ide_vlb_clk;
1121extern int ide_pci_clk;
1122
327fa1c2
BZ
1123int ide_end_request(ide_drive_t *, int, int);
1124int ide_end_dequeued_request(ide_drive_t *, struct request *, int, int);
1125void ide_kill_rq(ide_drive_t *, struct request *);
1126
1127void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int,
1128 ide_expiry_t *);
1129void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int,
1130 ide_expiry_t *);
1da177e4 1131
cd2a2d96
BZ
1132void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
1133 ide_expiry_t *);
1da177e4 1134
1fc14258
BZ
1135void ide_execute_pkt_cmd(ide_drive_t *);
1136
9f87abe8
BZ
1137void ide_pad_transfer(ide_drive_t *, int, int);
1138
9892ec54 1139ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
1da177e4 1140
4dde4492 1141void ide_fix_driveid(u16 *);
01745112 1142
1da177e4
LT
1143extern void ide_fixstring(u8 *, const int, const int);
1144
b163f46d
BZ
1145int ide_busy_sleep(ide_hwif_t *, unsigned long, int);
1146
74af21cf 1147int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1148
c4e66c36 1149ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
11938c92 1150ide_startstop_t ide_do_devset(ide_drive_t *, struct request *);
c4e66c36 1151
1da177e4
LT
1152extern ide_startstop_t ide_do_reset (ide_drive_t *);
1153
92f1f8fd
EO
1154extern int ide_devset_execute(ide_drive_t *drive,
1155 const struct ide_devset *setting, int arg);
1156
1da177e4
LT
1157extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1158
089c5c7e 1159void ide_tf_dump(const char *, struct ide_taskfile *);
1da177e4 1160
374e042c
BZ
1161void ide_exec_command(ide_hwif_t *, u8);
1162u8 ide_read_status(ide_hwif_t *);
1163u8 ide_read_altstatus(ide_hwif_t *);
374e042c
BZ
1164
1165void ide_set_irq(ide_hwif_t *, int);
1166
1167void ide_tf_load(ide_drive_t *, ide_task_t *);
1168void ide_tf_read(ide_drive_t *, ide_task_t *);
1169
1170void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int);
1171void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int);
1172
acaa0f5f
BZ
1173int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int);
1174
1da177e4 1175extern void SELECT_DRIVE(ide_drive_t *);
ed4af48f 1176void SELECT_MASK(ide_drive_t *, int);
1da177e4 1177
92eb4380 1178u8 ide_read_error(ide_drive_t *);
1823649b 1179void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1180
51509eec
BZ
1181int ide_check_atapi_device(ide_drive_t *, const char *);
1182
7bf7420a
BZ
1183void ide_init_pc(struct ide_atapi_pc *);
1184
4abdc6ee
EO
1185/* Disk head parking */
1186extern wait_queue_head_t ide_park_wq;
1187ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1188 char *buf);
1189ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1190 const char *buf, size_t len);
1191
7645c151
BZ
1192/*
1193 * Special requests for ide-tape block device strategy routine.
1194 *
1195 * In order to service a character device command, we add special requests to
1196 * the tail of our block device request queue and wait for their completion.
1197 */
1198enum {
1199 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1200 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1201 REQ_IDETAPE_READ = (1 << 2),
1202 REQ_IDETAPE_WRITE = (1 << 3),
1203};
1204
2ac07d92 1205int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
7645c151 1206
de699ad5 1207int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1208int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1209int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b
BZ
1210void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1211void ide_retry_pc(ide_drive_t *, struct gendisk *);
0578042d 1212
4cad085e 1213int ide_cd_expiry(ide_drive_t *);
844b9468 1214
392de1d5
BP
1215int ide_cd_get_xferlen(struct request *);
1216
28ad91db 1217ide_startstop_t ide_issue_pc(ide_drive_t *);
594c16d8 1218
f6e29e35 1219ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 1220
4d7a984b
TH
1221void task_end_request(ide_drive_t *, struct request *, u8);
1222
ac026ff2 1223int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
1224int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
1225
1da177e4 1226int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1da177e4 1227
2ebe1d9e
BZ
1228int ide_dev_read_id(ide_drive_t *, u8, u16 *);
1229
1da177e4 1230extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1231extern int ide_config_drive_speed(ide_drive_t *, u8);
1232extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1233extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1234
1235extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1236
1da177e4
LT
1237extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1238
1da177e4 1239extern void ide_timer_expiry(unsigned long);
7d12e780 1240extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1241extern void do_ide_request(struct request_queue *);
1da177e4
LT
1242
1243void ide_init_disk(struct gendisk *, ide_drive_t *);
1244
6d208b39 1245#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1246extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1247#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1248#else
1249#define ide_pci_register_driver(d) pci_register_driver(d)
1250#endif
1251
6636487e
BZ
1252static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1253{
1254 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1255 return 1;
1256 return 0;
1257}
1258
86ccf37c 1259void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *,
48c3c107 1260 hw_regs_t *, hw_regs_t **);
85620436 1261void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1262
8e882ba1 1263#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1264int ide_pci_set_master(struct pci_dev *, const char *);
1265unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1266int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1267int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1268#else
b123f56e
BZ
1269static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1270 const struct ide_port_info *d)
1271{
1272 return -EINVAL;
1273}
c413b9b9
BZ
1274#endif
1275
c0ae5023 1276struct ide_pci_enablebit {
1da177e4
LT
1277 u8 reg; /* byte pci reg holding the enable-bit */
1278 u8 mask; /* mask to isolate the enable-bit */
1279 u8 val; /* value of masked reg when "enabled" */
c0ae5023 1280};
1da177e4
LT
1281
1282enum {
1283 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1284 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1285 /* single port device */
a5d8c5c8 1286 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1287 /* don't use legacy PIO blacklist */
1288 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1289 /* set for the second port of QD65xx */
1290 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1291 /* use PIO8/9 for prefetch off/on */
1292 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1293 /* use PIO6/7 for fast-devsel off/on */
1294 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1295 /* use 100-102 and 200-202 PIO values to set DMA modes */
1296 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1297 /*
1298 * keep DMA setting when programming PIO mode, may be used only
1299 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1300 */
1301 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1302 /* program host for the transfer mode after programming device */
1303 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1304 /* don't program host/device for the transfer mode ("smart" hosts) */
1305 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1306 /* trust BIOS for programming chipset/device for DMA */
1307 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1308 /* host is CS5510/CS5520 */
1309 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1310 /* ATAPI DMA is unsupported */
1311 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1312 /* set if host is a "non-bootable" controller */
1313 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1314 /* host doesn't support DMA */
1315 IDE_HFLAG_NO_DMA = (1 << 14),
1316 /* check if host is PCI IDE device before allowing DMA */
1317 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1318 /* host uses MMIO */
1319 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1320 /* no LBA48 */
1321 IDE_HFLAG_NO_LBA48 = (1 << 17),
1322 /* no LBA48 DMA */
1323 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1324 /* data FIFO is cleared by an error */
1325 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1326 /* serialize ports */
1327 IDE_HFLAG_SERIALIZE = (1 << 20),
2787cb8a
BZ
1328 /* host is DTC2278 */
1329 IDE_HFLAG_DTC2278 = (1 << 21),
c094ea07
BZ
1330 /* 4 devices on a single set of I/O ports */
1331 IDE_HFLAG_4DRIVES = (1 << 22),
1f66019b
BZ
1332 /* host is TRM290 */
1333 IDE_HFLAG_TRM290 = (1 << 23),
caea7602
BZ
1334 /* use 32-bit I/O ops */
1335 IDE_HFLAG_IO_32BIT = (1 << 24),
1336 /* unmask IRQs */
1337 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
6636487e 1338 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
1fd18905
BZ
1339 /* serialize ports if DMA is possible (for sl82c105) */
1340 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1341 /* force host out of "simplex" mode */
1342 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1343 /* DSC overlap is unsupported */
1344 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1345 /* never use 32-bit I/O ops */
1346 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1347 /* never unmask IRQs */
1348 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1349};
1350
7cab14a7 1351#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1352# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1353#else
1354# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1355#endif
1356
039788e1 1357struct ide_port_info {
1da177e4 1358 char *name;
e354c1d8 1359
2ed0ef54 1360 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
1361
1362 void (*get_lock)(irq_handler_t, void *);
1363 void (*release_lock)(void);
1364
1da177e4
LT
1365 void (*init_iops)(ide_hwif_t *);
1366 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1367 int (*init_dma)(ide_hwif_t *,
1368 const struct ide_port_info *);
ac95beed 1369
374e042c 1370 const struct ide_tp_ops *tp_ops;
ac95beed 1371 const struct ide_port_ops *port_ops;
f37afdac 1372 const struct ide_dma_ops *dma_ops;
ac95beed 1373
c0ae5023
BZ
1374 struct ide_pci_enablebit enablebits[2];
1375
528a572d 1376 hwif_chipset_t chipset;
6b492496
BZ
1377
1378 u16 max_sectors; /* if < than the default one */
1379
9ffcf364 1380 u32 host_flags;
255115fb
BZ
1381
1382 int irq_flags;
1383
4099d143 1384 u8 pio_mask;
5f8b6c34
BZ
1385 u8 swdma_mask;
1386 u8 mwdma_mask;
18137207 1387 u8 udma_mask;
039788e1 1388};
1da177e4 1389
6cdf6eb3
BZ
1390int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1391int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1392 const struct ide_port_info *, void *);
ef0b0427 1393void ide_pci_remove(struct pci_dev *);
1da177e4 1394
feb22b7f
BZ
1395#ifdef CONFIG_PM
1396int ide_pci_suspend(struct pci_dev *, pm_message_t);
1397int ide_pci_resume(struct pci_dev *);
1398#else
1399#define ide_pci_suspend NULL
1400#define ide_pci_resume NULL
1401#endif
1402
1da177e4
LT
1403void ide_map_sg(ide_drive_t *, struct request *);
1404void ide_init_sg_cmd(ide_drive_t *, struct request *);
1405
1406#define BAD_DMA_DRIVE 0
1407#define GOOD_DMA_DRIVE 1
1408
65e5f2e3
JC
1409struct drive_list_entry {
1410 const char *id_model;
1411 const char *id_firmware;
1412};
1413
4dde4492 1414int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1415
1416#ifdef CONFIG_BLK_DEV_IDEDMA
2dbe7e91 1417int ide_dma_good_drive(ide_drive_t *);
1da177e4 1418int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1419int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1420
1421u8 ide_find_dma_mode(ide_drive_t *, u8);
1422
1423static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1424{
1425 return ide_find_dma_mode(drive, XFER_UDMA_6);
1426}
1427
4a546e04 1428void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1429void ide_dma_off(ide_drive_t *);
4a546e04 1430void ide_dma_on(ide_drive_t *);
3608b5d7 1431int ide_set_dma(ide_drive_t *);
578cfa0d 1432void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1433ide_startstop_t ide_dma_intr(ide_drive_t *);
1434
2bbd57ca
BZ
1435int ide_allocate_dma_engine(ide_hwif_t *);
1436void ide_release_dma_engine(ide_hwif_t *);
1437
062f9f02
BZ
1438int ide_build_sglist(ide_drive_t *, struct request *);
1439void ide_destroy_dmatable(ide_drive_t *);
1440
8e882ba1 1441#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
2dbe7e91 1442int config_drive_for_dma(ide_drive_t *);
1da177e4 1443extern int ide_build_dmatable(ide_drive_t *, struct request *);
15ce926a 1444void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1445extern int ide_dma_setup(ide_drive_t *);
f37afdac 1446void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4 1447extern void ide_dma_start(ide_drive_t *);
653bcf52 1448int ide_dma_end(ide_drive_t *);
f37afdac 1449int ide_dma_test_irq(ide_drive_t *);
592b5315 1450u8 ide_dma_sff_read_status(ide_hwif_t *);
71fc9fcc 1451extern const struct ide_dma_ops sff_dma_ops;
2dbe7e91
BZ
1452#else
1453static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
8e882ba1 1454#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4 1455
de23ec9c 1456void ide_dma_lost_irq(ide_drive_t *);
ffa15a69 1457void ide_dma_timeout(ide_drive_t *);
65ca5377 1458ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
de23ec9c 1459
1da177e4 1460#else
3ab7efe8 1461static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1462static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1463static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1464static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1465static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1466static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1467static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1468static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1469static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
65ca5377 1470static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; }
0d1bad21 1471static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
2bbd57ca 1472#endif /* CONFIG_BLK_DEV_IDEDMA */
1da177e4 1473
e3a59b4d 1474#ifdef CONFIG_BLK_DEV_IDEACPI
8b803bd1 1475int ide_acpi_init(void);
e3a59b4d
HR
1476extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1477extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1478extern void ide_acpi_push_timing(ide_hwif_t *hwif);
8b803bd1 1479void ide_acpi_init_port(ide_hwif_t *);
eafd88a3 1480void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1481extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d 1482#else
8b803bd1 1483static inline int ide_acpi_init(void) { return 0; }
e3a59b4d
HR
1484static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1485static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1486static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
8b803bd1 1487static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; }
eafd88a3 1488static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1489static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1490#endif
1491
1da177e4
LT
1492void ide_register_region(struct gendisk *);
1493void ide_unregister_region(struct gendisk *);
1494
f01393e4 1495void ide_undecoded_slave(ide_drive_t *);
1da177e4 1496
9fd91d95 1497void ide_port_apply_params(ide_hwif_t *);
ebdab07d 1498int ide_sysfs_register_port(ide_hwif_t *);
9fd91d95 1499
48c3c107 1500struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **);
8a69580e 1501void ide_host_free(struct ide_host *);
48c3c107
BZ
1502int ide_host_register(struct ide_host *, const struct ide_port_info *,
1503 hw_regs_t **);
6f904d01
BZ
1504int ide_host_add(const struct ide_port_info *, hw_regs_t **,
1505 struct ide_host **);
48c3c107 1506void ide_host_remove(struct ide_host *);
0bfeee7d 1507int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1508void ide_port_unregister_devices(ide_hwif_t *);
1509void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1510
1511static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1512{
1513 return hwif->hwif_data;
1514}
1515
1516static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1517{
1518 hwif->hwif_data = data;
1519}
1520
1da177e4 1521extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1da177e4 1522
a501633c 1523u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1524u8 ide_dump_status(ide_drive_t *, const char *, u8);
1525
3be53f3f
BZ
1526struct ide_timing {
1527 u8 mode;
1528 u8 setup; /* t1 */
1529 u16 act8b; /* t2 for 8-bit io */
1530 u16 rec8b; /* t2i for 8-bit io */
1531 u16 cyc8b; /* t0 for 8-bit io */
1532 u16 active; /* t2 or tD */
1533 u16 recover; /* t2i or tK */
1534 u16 cycle; /* t0 */
1535 u16 udma; /* t2CYCTYP/2 */
1536};
1537
1538enum {
1539 IDE_TIMING_SETUP = (1 << 0),
1540 IDE_TIMING_ACT8B = (1 << 1),
1541 IDE_TIMING_REC8B = (1 << 2),
1542 IDE_TIMING_CYC8B = (1 << 3),
1543 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1544 IDE_TIMING_CYC8B,
1545 IDE_TIMING_ACTIVE = (1 << 4),
1546 IDE_TIMING_RECOVER = (1 << 5),
1547 IDE_TIMING_CYCLE = (1 << 6),
1548 IDE_TIMING_UDMA = (1 << 7),
1549 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1550 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1551 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1552};
1553
f06ab340 1554struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1555u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1556void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1557 struct ide_timing *, unsigned int);
1558int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1559
7eeaaaa5 1560#ifdef CONFIG_IDE_XFER_MODE
9ad54093 1561int ide_scan_pio_blacklist(char *);
7eeaaaa5 1562const char *ide_xfer_verbose(u8);
2134758d 1563u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
88b2b32b
BZ
1564int ide_set_pio_mode(ide_drive_t *, u8);
1565int ide_set_dma_mode(ide_drive_t *, u8);
26bcb879 1566void ide_set_pio(ide_drive_t *, u8);
7eeaaaa5
BZ
1567int ide_set_xfer_rate(ide_drive_t *, u8);
1568#else
1569static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; }
1570static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; }
1571#endif
26bcb879
BZ
1572
1573static inline void ide_set_max_pio(ide_drive_t *drive)
1574{
1575 ide_set_pio(drive, 255);
1576}
1da177e4 1577
ebdab07d
BZ
1578char *ide_media_string(ide_drive_t *);
1579
1580extern struct device_attribute ide_dev_attrs[];
1da177e4 1581extern struct bus_type ide_bus_type;
f74c9141 1582extern struct class *ide_port_class;
1da177e4 1583
7b9f25b5
BZ
1584static inline void ide_dump_identify(u8 *id)
1585{
1586 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1587}
1588
86b37860
CL
1589static inline int hwif_to_node(ide_hwif_t *hwif)
1590{
96f80219 1591 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1592}
1593
7e59ea21 1594static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1595{
5e7f3a46 1596 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
1b678347 1597
97100fc8 1598 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1599}
2bd24a1c
BZ
1600
1601#define ide_port_for_each_dev(i, dev, port) \
1602 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
1603
7ed5b157
BZ
1604#define ide_port_for_each_present_dev(i, dev, port) \
1605 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \
1606 if ((dev)->dev_flags & IDE_DFLAG_PRESENT)
1607
2bd24a1c
BZ
1608#define ide_host_for_each_port(i, port, host) \
1609 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
1610
1da177e4 1611#endif /* _IDE_H */