]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _IDE_H |
2 | #define _IDE_H | |
3 | /* | |
4 | * linux/include/linux/ide.h | |
5 | * | |
6 | * Copyright (C) 1994-2002 Linus Torvalds & authors | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/init.h> |
10 | #include <linux/ioport.h> | |
11 | #include <linux/hdreg.h> | |
12 | #include <linux/hdsmart.h> | |
13 | #include <linux/blkdev.h> | |
14 | #include <linux/proc_fs.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/bitops.h> | |
17 | #include <linux/bio.h> | |
18 | #include <linux/device.h> | |
19 | #include <linux/pci.h> | |
f36d4024 | 20 | #include <linux/completion.h> |
e3a59b4d HR |
21 | #ifdef CONFIG_BLK_DEV_IDEACPI |
22 | #include <acpi/acpi.h> | |
23 | #endif | |
1da177e4 LT |
24 | #include <asm/byteorder.h> |
25 | #include <asm/system.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/semaphore.h> | |
f9383c42 | 28 | #include <asm/mutex.h> |
1da177e4 | 29 | |
1da177e4 LT |
30 | /****************************************************************************** |
31 | * IDE driver configuration options (play with these as desired): | |
32 | * | |
33 | * REALLY_SLOW_IO can be defined in ide.c and ide-cd.c, if necessary | |
34 | */ | |
35 | #define INITIAL_MULT_COUNT 0 /* off=0; on=2,4,8,16,32, etc.. */ | |
36 | ||
37 | #ifndef SUPPORT_SLOW_DATA_PORTS /* 1 to support slow data ports */ | |
38 | #define SUPPORT_SLOW_DATA_PORTS 1 /* 0 to reduce kernel size */ | |
39 | #endif | |
40 | #ifndef SUPPORT_VLB_SYNC /* 1 to support weird 32-bit chips */ | |
41 | #define SUPPORT_VLB_SYNC 1 /* 0 to reduce kernel size */ | |
42 | #endif | |
43 | #ifndef OK_TO_RESET_CONTROLLER /* 1 needed for good error recovery */ | |
44 | #define OK_TO_RESET_CONTROLLER 1 /* 0 for use with AH2372A/B interface */ | |
45 | #endif | |
46 | ||
47 | #ifndef DISABLE_IRQ_NOSYNC | |
48 | #define DISABLE_IRQ_NOSYNC 0 | |
49 | #endif | |
50 | ||
51 | /* | |
52 | * Used to indicate "no IRQ", should be a value that cannot be an IRQ | |
53 | * number. | |
54 | */ | |
55 | ||
56 | #define IDE_NO_IRQ (-1) | |
57 | ||
58 | /* | |
59 | * "No user-serviceable parts" beyond this point :) | |
60 | *****************************************************************************/ | |
61 | ||
62 | typedef unsigned char byte; /* used everywhere */ | |
63 | ||
64 | /* | |
65 | * Probably not wise to fiddle with these | |
66 | */ | |
67 | #define ERROR_MAX 8 /* Max read/write errors per sector */ | |
68 | #define ERROR_RESET 3 /* Reset controller every 4th retry */ | |
69 | #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ | |
70 | ||
71 | /* | |
72 | * Tune flags | |
73 | */ | |
74 | #define IDE_TUNE_NOAUTO 2 | |
75 | #define IDE_TUNE_AUTO 1 | |
76 | #define IDE_TUNE_DEFAULT 0 | |
77 | ||
78 | /* | |
79 | * state flags | |
80 | */ | |
81 | ||
82 | #define DMA_PIO_RETRY 1 /* retrying in PIO */ | |
83 | ||
84 | #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif)) | |
85 | #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup)) | |
86 | ||
87 | /* | |
88 | * Definitions for accessing IDE controller registers | |
89 | */ | |
90 | #define IDE_NR_PORTS (10) | |
91 | ||
92 | #define IDE_DATA_OFFSET (0) | |
93 | #define IDE_ERROR_OFFSET (1) | |
94 | #define IDE_NSECTOR_OFFSET (2) | |
95 | #define IDE_SECTOR_OFFSET (3) | |
96 | #define IDE_LCYL_OFFSET (4) | |
97 | #define IDE_HCYL_OFFSET (5) | |
98 | #define IDE_SELECT_OFFSET (6) | |
99 | #define IDE_STATUS_OFFSET (7) | |
100 | #define IDE_CONTROL_OFFSET (8) | |
101 | #define IDE_IRQ_OFFSET (9) | |
102 | ||
103 | #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET | |
104 | #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET | |
105 | ||
106 | #define IDE_CONTROL_OFFSET_HOB (7) | |
107 | ||
108 | #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET]) | |
109 | #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET]) | |
110 | #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET]) | |
111 | #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET]) | |
112 | #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET]) | |
113 | #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET]) | |
114 | #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET]) | |
115 | #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET]) | |
116 | #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET]) | |
117 | #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET]) | |
118 | ||
119 | #define IDE_FEATURE_REG IDE_ERROR_REG | |
120 | #define IDE_COMMAND_REG IDE_STATUS_REG | |
121 | #define IDE_ALTSTATUS_REG IDE_CONTROL_REG | |
122 | #define IDE_IREASON_REG IDE_NSECTOR_REG | |
123 | #define IDE_BCOUNTL_REG IDE_LCYL_REG | |
124 | #define IDE_BCOUNTH_REG IDE_HCYL_REG | |
125 | ||
126 | #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) | |
127 | #define BAD_R_STAT (BUSY_STAT | ERR_STAT) | |
128 | #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT) | |
129 | #define BAD_STAT (BAD_R_STAT | DRQ_STAT) | |
130 | #define DRIVE_READY (READY_STAT | SEEK_STAT) | |
131 | #define DATA_READY (DRQ_STAT) | |
132 | ||
133 | #define BAD_CRC (ABRT_ERR | ICRC_ERR) | |
134 | ||
135 | #define SATA_NR_PORTS (3) /* 16 possible ?? */ | |
136 | ||
137 | #define SATA_STATUS_OFFSET (0) | |
138 | #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET]) | |
139 | #define SATA_ERROR_OFFSET (1) | |
140 | #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET]) | |
141 | #define SATA_CONTROL_OFFSET (2) | |
142 | #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET]) | |
143 | ||
144 | #define SATA_MISC_OFFSET (0) | |
145 | #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET]) | |
146 | #define SATA_PHY_OFFSET (1) | |
147 | #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET]) | |
148 | #define SATA_IEN_OFFSET (2) | |
149 | #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET]) | |
150 | ||
151 | /* | |
152 | * Our Physical Region Descriptor (PRD) table should be large enough | |
153 | * to handle the biggest I/O request we are likely to see. Since requests | |
154 | * can have no more than 256 sectors, and since the typical blocksize is | |
155 | * two or more sectors, we could get by with a limit of 128 entries here for | |
156 | * the usual worst case. Most requests seem to include some contiguous blocks, | |
157 | * further reducing the number of table entries required. | |
158 | * | |
159 | * The driver reverts to PIO mode for individual requests that exceed | |
160 | * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling | |
161 | * 100% of all crazy scenarios here is not necessary. | |
162 | * | |
163 | * As it turns out though, we must allocate a full 4KB page for this, | |
164 | * so the two PRD tables (ide0 & ide1) will each get half of that, | |
165 | * allowing each to have about 256 entries (8 bytes each) from this. | |
166 | */ | |
167 | #define PRD_BYTES 8 | |
168 | #define PRD_ENTRIES 256 | |
169 | ||
170 | /* | |
171 | * Some more useful definitions | |
172 | */ | |
173 | #define PARTN_BITS 6 /* number of minor dev bits for partitions */ | |
174 | #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ | |
175 | #define SECTOR_SIZE 512 | |
176 | #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */ | |
177 | #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t))) | |
178 | ||
179 | /* | |
180 | * Timeouts for various operations: | |
181 | */ | |
182 | #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */ | |
183 | #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */ | |
184 | #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */ | |
185 | #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */ | |
186 | #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */ | |
187 | #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */ | |
188 | ||
1da177e4 LT |
189 | /* |
190 | * Check for an interrupt and acknowledge the interrupt status | |
191 | */ | |
192 | struct hwif_s; | |
193 | typedef int (ide_ack_intr_t)(struct hwif_s *); | |
194 | ||
1da177e4 LT |
195 | /* |
196 | * hwif_chipset_t is used to keep track of the specific hardware | |
197 | * chipset used by each IDE interface, if known. | |
198 | */ | |
528a572d | 199 | enum { ide_unknown, ide_generic, ide_pci, |
1da177e4 LT |
200 | ide_cmd640, ide_dtc2278, ide_ali14xx, |
201 | ide_qd65xx, ide_umc8672, ide_ht6560b, | |
202 | ide_rz1000, ide_trm290, | |
203 | ide_cmd646, ide_cy82c693, ide_4drives, | |
204 | ide_pmac, ide_etrax100, ide_acorn, | |
26a940e2 | 205 | ide_au1xxx, ide_forced |
528a572d BZ |
206 | }; |
207 | ||
208 | typedef u8 hwif_chipset_t; | |
1da177e4 LT |
209 | |
210 | /* | |
211 | * Structure to hold all information about the location of this port | |
212 | */ | |
213 | typedef struct hw_regs_s { | |
214 | unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */ | |
215 | int irq; /* our irq number */ | |
1da177e4 LT |
216 | ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ |
217 | hwif_chipset_t chipset; | |
4349d5cd | 218 | struct device *dev; |
1da177e4 LT |
219 | } hw_regs_t; |
220 | ||
baa8f3e9 BZ |
221 | struct hwif_s * ide_find_port(unsigned long); |
222 | ||
fd9bb539 BZ |
223 | int ide_register_hw(hw_regs_t *, void (*)(struct hwif_s *), int, |
224 | struct hwif_s **); | |
1da177e4 | 225 | |
1da177e4 LT |
226 | void ide_setup_ports( hw_regs_t *hw, |
227 | unsigned long base, | |
228 | int *offsets, | |
229 | unsigned long ctrl, | |
230 | unsigned long intr, | |
231 | ide_ack_intr_t *ack_intr, | |
232 | #if 0 | |
233 | ide_io_ops_t *iops, | |
234 | #endif | |
235 | int irq); | |
236 | ||
237 | static inline void ide_std_init_ports(hw_regs_t *hw, | |
238 | unsigned long io_addr, | |
239 | unsigned long ctl_addr) | |
240 | { | |
241 | unsigned int i; | |
242 | ||
243 | for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) | |
244 | hw->io_ports[i] = io_addr++; | |
245 | ||
246 | hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr; | |
247 | } | |
248 | ||
249 | #include <asm/ide.h> | |
250 | ||
83d7dbc4 MM |
251 | #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED) |
252 | #undef MAX_HWIFS | |
83ae20c8 BH |
253 | #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS |
254 | #endif | |
255 | ||
1da177e4 LT |
256 | /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */ |
257 | #ifndef IDE_ARCH_OBSOLETE_DEFAULTS | |
258 | # define ide_default_io_base(index) (0) | |
259 | # define ide_default_irq(base) (0) | |
260 | # define ide_init_default_irq(base) (0) | |
261 | #endif | |
262 | ||
847ddd2b | 263 | #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT |
1da177e4 LT |
264 | static inline void ide_init_hwif_ports(hw_regs_t *hw, |
265 | unsigned long io_addr, | |
266 | unsigned long ctl_addr, | |
267 | int *irq) | |
268 | { | |
269 | if (!ctl_addr) | |
270 | ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr)); | |
271 | else | |
272 | ide_std_init_ports(hw, io_addr, ctl_addr); | |
273 | ||
274 | if (irq) | |
275 | *irq = 0; | |
276 | ||
277 | hw->io_ports[IDE_IRQ_OFFSET] = 0; | |
278 | ||
279 | #ifdef CONFIG_PPC32 | |
280 | if (ppc_ide_md.ide_init_hwif) | |
281 | ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq); | |
282 | #endif | |
283 | } | |
284 | #else | |
285 | static inline void ide_init_hwif_ports(hw_regs_t *hw, | |
286 | unsigned long io_addr, | |
287 | unsigned long ctl_addr, | |
288 | int *irq) | |
289 | { | |
290 | if (io_addr || ctl_addr) | |
291 | printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__); | |
292 | } | |
847ddd2b | 293 | #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */ |
1da177e4 LT |
294 | |
295 | /* Currently only m68k, apus and m8xx need it */ | |
296 | #ifndef IDE_ARCH_ACK_INTR | |
297 | # define ide_ack_intr(hwif) (1) | |
298 | #endif | |
299 | ||
300 | /* Currently only Atari needs it */ | |
301 | #ifndef IDE_ARCH_LOCK | |
302 | # define ide_release_lock() do {} while (0) | |
303 | # define ide_get_lock(hdlr, data) do {} while (0) | |
304 | #endif /* IDE_ARCH_LOCK */ | |
305 | ||
306 | /* | |
307 | * Now for the data we need to maintain per-drive: ide_drive_t | |
308 | */ | |
309 | ||
310 | #define ide_scsi 0x21 | |
311 | #define ide_disk 0x20 | |
312 | #define ide_optical 0x7 | |
313 | #define ide_cdrom 0x5 | |
314 | #define ide_tape 0x1 | |
315 | #define ide_floppy 0x0 | |
316 | ||
317 | /* | |
318 | * Special Driver Flags | |
319 | * | |
320 | * set_geometry : respecify drive geometry | |
321 | * recalibrate : seek to cyl 0 | |
322 | * set_multmode : set multmode count | |
323 | * set_tune : tune interface for drive | |
324 | * serviced : service command | |
325 | * reserved : unused | |
326 | */ | |
327 | typedef union { | |
328 | unsigned all : 8; | |
329 | struct { | |
330 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
331 | unsigned set_geometry : 1; | |
332 | unsigned recalibrate : 1; | |
333 | unsigned set_multmode : 1; | |
334 | unsigned set_tune : 1; | |
335 | unsigned serviced : 1; | |
336 | unsigned reserved : 3; | |
337 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
338 | unsigned reserved : 3; | |
339 | unsigned serviced : 1; | |
340 | unsigned set_tune : 1; | |
341 | unsigned set_multmode : 1; | |
342 | unsigned recalibrate : 1; | |
343 | unsigned set_geometry : 1; | |
344 | #else | |
345 | #error "Please fix <asm/byteorder.h>" | |
346 | #endif | |
347 | } b; | |
348 | } special_t; | |
349 | ||
350 | /* | |
351 | * ATA DATA Register Special. | |
352 | * ATA NSECTOR Count Register(). | |
353 | * ATAPI Byte Count Register. | |
1da177e4 LT |
354 | */ |
355 | typedef union { | |
356 | unsigned all :16; | |
357 | struct { | |
358 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
359 | unsigned low :8; /* LSB */ | |
360 | unsigned high :8; /* MSB */ | |
361 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
362 | unsigned high :8; /* MSB */ | |
363 | unsigned low :8; /* LSB */ | |
364 | #else | |
365 | #error "Please fix <asm/byteorder.h>" | |
366 | #endif | |
367 | } b; | |
8447d9d5 | 368 | } ata_nsector_t, ata_data_t, atapi_bcount_t; |
1da177e4 | 369 | |
1da177e4 LT |
370 | /* |
371 | * ATA-IDE Select Register, aka Device-Head | |
372 | * | |
373 | * head : always zeros here | |
374 | * unit : drive select number: 0/1 | |
375 | * bit5 : always 1 | |
376 | * lba : using LBA instead of CHS | |
377 | * bit7 : always 1 | |
378 | */ | |
379 | typedef union { | |
380 | unsigned all : 8; | |
381 | struct { | |
382 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
383 | unsigned head : 4; | |
384 | unsigned unit : 1; | |
385 | unsigned bit5 : 1; | |
386 | unsigned lba : 1; | |
387 | unsigned bit7 : 1; | |
388 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
389 | unsigned bit7 : 1; | |
390 | unsigned lba : 1; | |
391 | unsigned bit5 : 1; | |
392 | unsigned unit : 1; | |
393 | unsigned head : 4; | |
394 | #else | |
395 | #error "Please fix <asm/byteorder.h>" | |
396 | #endif | |
397 | } b; | |
398 | } select_t, ata_select_t; | |
399 | ||
400 | /* | |
401 | * The ATA-IDE Status Register. | |
402 | * The ATAPI Status Register. | |
403 | * | |
404 | * check : Error occurred | |
405 | * idx : Index Error | |
406 | * corr : Correctable error occurred | |
407 | * drq : Data is request by the device | |
408 | * dsc : Disk Seek Complete : ata | |
409 | * : Media access command finished : atapi | |
410 | * df : Device Fault : ata | |
411 | * : Reserved : atapi | |
412 | * drdy : Ready, Command Mode Capable : ata | |
413 | * : Ignored for ATAPI commands : atapi | |
414 | * bsy : Disk is Busy | |
415 | * : The device has access to the command block | |
416 | */ | |
417 | typedef union { | |
418 | unsigned all :8; | |
419 | struct { | |
420 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
421 | unsigned check :1; | |
422 | unsigned idx :1; | |
423 | unsigned corr :1; | |
424 | unsigned drq :1; | |
425 | unsigned dsc :1; | |
426 | unsigned df :1; | |
427 | unsigned drdy :1; | |
428 | unsigned bsy :1; | |
429 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
430 | unsigned bsy :1; | |
431 | unsigned drdy :1; | |
432 | unsigned df :1; | |
433 | unsigned dsc :1; | |
434 | unsigned drq :1; | |
435 | unsigned corr :1; | |
436 | unsigned idx :1; | |
437 | unsigned check :1; | |
438 | #else | |
439 | #error "Please fix <asm/byteorder.h>" | |
440 | #endif | |
441 | } b; | |
442 | } ata_status_t, atapi_status_t; | |
443 | ||
1da177e4 LT |
444 | /* |
445 | * ATAPI Feature Register | |
446 | * | |
447 | * dma : Using DMA or PIO | |
448 | * reserved321 : Reserved | |
449 | * reserved654 : Reserved (Tag Type) | |
450 | * reserved7 : Reserved | |
451 | */ | |
452 | typedef union { | |
453 | unsigned all :8; | |
454 | struct { | |
455 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
456 | unsigned dma :1; | |
457 | unsigned reserved321 :3; | |
458 | unsigned reserved654 :3; | |
459 | unsigned reserved7 :1; | |
460 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
461 | unsigned reserved7 :1; | |
462 | unsigned reserved654 :3; | |
463 | unsigned reserved321 :3; | |
464 | unsigned dma :1; | |
465 | #else | |
466 | #error "Please fix <asm/byteorder.h>" | |
467 | #endif | |
468 | } b; | |
469 | } atapi_feature_t; | |
470 | ||
471 | /* | |
472 | * ATAPI Interrupt Reason Register. | |
473 | * | |
474 | * cod : Information transferred is command (1) or data (0) | |
475 | * io : The device requests us to read (1) or write (0) | |
476 | * reserved : Reserved | |
477 | */ | |
478 | typedef union { | |
479 | unsigned all :8; | |
480 | struct { | |
481 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
482 | unsigned cod :1; | |
483 | unsigned io :1; | |
484 | unsigned reserved :6; | |
485 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
486 | unsigned reserved :6; | |
487 | unsigned io :1; | |
488 | unsigned cod :1; | |
489 | #else | |
490 | #error "Please fix <asm/byteorder.h>" | |
491 | #endif | |
492 | } b; | |
493 | } atapi_ireason_t; | |
494 | ||
495 | /* | |
496 | * The ATAPI error register. | |
497 | * | |
498 | * ili : Illegal Length Indication | |
499 | * eom : End Of Media Detected | |
500 | * abrt : Aborted command - As defined by ATA | |
501 | * mcr : Media Change Requested - As defined by ATA | |
502 | * sense_key : Sense key of the last failed packet command | |
503 | */ | |
504 | typedef union { | |
505 | unsigned all :8; | |
506 | struct { | |
507 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
508 | unsigned ili :1; | |
509 | unsigned eom :1; | |
510 | unsigned abrt :1; | |
511 | unsigned mcr :1; | |
512 | unsigned sense_key :4; | |
513 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
514 | unsigned sense_key :4; | |
515 | unsigned mcr :1; | |
516 | unsigned abrt :1; | |
517 | unsigned eom :1; | |
518 | unsigned ili :1; | |
519 | #else | |
520 | #error "Please fix <asm/byteorder.h>" | |
521 | #endif | |
522 | } b; | |
523 | } atapi_error_t; | |
524 | ||
1da177e4 LT |
525 | /* |
526 | * Status returned from various ide_ functions | |
527 | */ | |
528 | typedef enum { | |
529 | ide_stopped, /* no drive operation was started */ | |
530 | ide_started, /* a drive operation was started, handler was set */ | |
531 | } ide_startstop_t; | |
532 | ||
533 | struct ide_driver_s; | |
534 | struct ide_settings_s; | |
535 | ||
e3a59b4d HR |
536 | #ifdef CONFIG_BLK_DEV_IDEACPI |
537 | struct ide_acpi_drive_link; | |
538 | struct ide_acpi_hwif_link; | |
539 | #endif | |
540 | ||
1da177e4 LT |
541 | typedef struct ide_drive_s { |
542 | char name[4]; /* drive name, such as "hda" */ | |
543 | char driver_req[10]; /* requests specific driver */ | |
544 | ||
165125e1 | 545 | struct request_queue *queue; /* request queue */ |
1da177e4 LT |
546 | |
547 | struct request *rq; /* current request */ | |
548 | struct ide_drive_s *next; /* circular list of hwgroup drives */ | |
1da177e4 LT |
549 | void *driver_data; /* extra driver data */ |
550 | struct hd_driveid *id; /* drive model identification info */ | |
7662d046 | 551 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 LT |
552 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
553 | struct ide_settings_s *settings;/* /proc/ide/ drive settings */ | |
7662d046 | 554 | #endif |
1da177e4 LT |
555 | struct hwif_s *hwif; /* actually (ide_hwif_t *) */ |
556 | ||
557 | unsigned long sleep; /* sleep until this time */ | |
558 | unsigned long service_start; /* time we started last request */ | |
559 | unsigned long service_time; /* service time of last request */ | |
560 | unsigned long timeout; /* max time to wait for irq */ | |
561 | ||
562 | special_t special; /* special action flags */ | |
563 | select_t select; /* basic drive/head select reg value */ | |
564 | ||
565 | u8 keep_settings; /* restore settings after drive reset */ | |
1da177e4 LT |
566 | u8 using_dma; /* disk is using dma for read/write */ |
567 | u8 retry_pio; /* retrying dma capable host in pio */ | |
568 | u8 state; /* retry state */ | |
569 | u8 waiting_for_dma; /* dma currently in progress */ | |
570 | u8 unmask; /* okay to unmask other irqs */ | |
571 | u8 bswap; /* byte swap data */ | |
36193484 | 572 | u8 noflush; /* don't attempt flushes */ |
1da177e4 LT |
573 | u8 dsc_overlap; /* DSC overlap */ |
574 | u8 nice1; /* give potential excess bandwidth */ | |
575 | ||
576 | unsigned present : 1; /* drive is physically present */ | |
577 | unsigned dead : 1; /* device ejected hint */ | |
578 | unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */ | |
579 | unsigned noprobe : 1; /* from: hdx=noprobe */ | |
580 | unsigned removable : 1; /* 1 if need to do check_media_change */ | |
581 | unsigned attach : 1; /* needed for removable devices */ | |
1da177e4 LT |
582 | unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */ |
583 | unsigned no_unmask : 1; /* disallow setting unmask bit */ | |
584 | unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */ | |
585 | unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */ | |
586 | unsigned nice0 : 1; /* give obvious excess bandwidth */ | |
587 | unsigned nice2 : 1; /* give a share in our own bandwidth */ | |
588 | unsigned doorlocking : 1; /* for removable only: door lock/unlock works */ | |
c223701c | 589 | unsigned nodma : 1; /* disallow DMA */ |
1da177e4 LT |
590 | unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */ |
591 | unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */ | |
592 | unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */ | |
593 | unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */ | |
1da177e4 LT |
594 | unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */ |
595 | unsigned sleeping : 1; /* 1=sleeping & sleep field valid */ | |
596 | unsigned post_reset : 1; | |
7f8f48af | 597 | unsigned udma33_warned : 1; |
1da177e4 | 598 | |
1497943e | 599 | u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */ |
1da177e4 LT |
600 | u8 quirk_list; /* considered quirky, set for a specific host */ |
601 | u8 init_speed; /* transfer rate set at boot */ | |
1da177e4 | 602 | u8 current_speed; /* current transfer rate set */ |
513daadd | 603 | u8 desired_speed; /* desired transfer rate set */ |
1da177e4 LT |
604 | u8 dn; /* now wide spread use */ |
605 | u8 wcache; /* status of write cache */ | |
606 | u8 acoustic; /* acoustic management */ | |
607 | u8 media; /* disk, cdrom, tape, floppy, ... */ | |
608 | u8 ctl; /* "normal" value for IDE_CONTROL_REG */ | |
609 | u8 ready_stat; /* min status value for drive ready */ | |
610 | u8 mult_count; /* current multiple sector setting */ | |
611 | u8 mult_req; /* requested multiple sector setting */ | |
612 | u8 tune_req; /* requested drive tuning setting */ | |
613 | u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ | |
614 | u8 bad_wstat; /* used for ignoring WRERR_STAT */ | |
615 | u8 nowerr; /* used for ignoring WRERR_STAT */ | |
616 | u8 sect0; /* offset of first sector for DM6:DDO */ | |
617 | u8 head; /* "real" number of heads */ | |
618 | u8 sect; /* "real" sectors per track */ | |
619 | u8 bios_head; /* BIOS/fdisk/LILO number of heads */ | |
620 | u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ | |
621 | ||
622 | unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ | |
623 | unsigned int cyl; /* "real" number of cyls */ | |
26bcb879 | 624 | unsigned int drive_data; /* used by set_pio_mode/selectproc */ |
1da177e4 LT |
625 | unsigned int failures; /* current failure count */ |
626 | unsigned int max_failures; /* maximum allowed failure count */ | |
dbe217af | 627 | u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ |
1da177e4 LT |
628 | |
629 | u64 capacity64; /* total number of sectors */ | |
630 | ||
631 | int lun; /* logical unit */ | |
632 | int crc_count; /* crc counter to reduce drive speed */ | |
e3a59b4d HR |
633 | #ifdef CONFIG_BLK_DEV_IDEACPI |
634 | struct ide_acpi_drive_link *acpidata; | |
635 | #endif | |
1da177e4 LT |
636 | struct list_head list; |
637 | struct device gendev; | |
f36d4024 | 638 | struct completion gendev_rel_comp; /* to deal with device release() */ |
1da177e4 LT |
639 | } ide_drive_t; |
640 | ||
8604affd BZ |
641 | #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev) |
642 | ||
1da177e4 LT |
643 | #define IDE_CHIPSET_PCI_MASK \ |
644 | ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx)) | |
645 | #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1) | |
646 | ||
039788e1 | 647 | struct ide_port_info; |
1da177e4 LT |
648 | |
649 | typedef struct hwif_s { | |
650 | struct hwif_s *next; /* for linked-list in ide_hwgroup_t */ | |
651 | struct hwif_s *mate; /* other hwif from same PCI chip */ | |
652 | struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */ | |
653 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ | |
654 | ||
655 | char name[6]; /* name of interface, eg. "ide0" */ | |
656 | ||
657 | /* task file registers for pata and sata */ | |
658 | unsigned long io_ports[IDE_NR_PORTS]; | |
659 | unsigned long sata_scr[SATA_NR_PORTS]; | |
660 | unsigned long sata_misc[SATA_NR_PORTS]; | |
661 | ||
1da177e4 LT |
662 | ide_drive_t drives[MAX_DRIVES]; /* drive info */ |
663 | ||
664 | u8 major; /* our major number */ | |
665 | u8 index; /* 0 for ide0; 1 for ide1; ... */ | |
666 | u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ | |
667 | u8 straight8; /* Alan's straight 8 check */ | |
668 | u8 bus_state; /* power state of the IDE bus */ | |
669 | ||
e95d9c6b | 670 | u32 host_flags; |
6a824c92 | 671 | |
4099d143 BZ |
672 | u8 pio_mask; |
673 | ||
1da177e4 LT |
674 | u8 ultra_mask; |
675 | u8 mwdma_mask; | |
676 | u8 swdma_mask; | |
677 | ||
49521f97 BZ |
678 | u8 cbl; /* cable type */ |
679 | ||
1da177e4 LT |
680 | hwif_chipset_t chipset; /* sub-module for tuning.. */ |
681 | ||
682 | struct pci_dev *pci_dev; /* for pci chipsets */ | |
85620436 | 683 | const struct ide_port_info *cds; /* chipset device struct */ |
1da177e4 | 684 | |
18e181fe BZ |
685 | ide_ack_intr_t *ack_intr; |
686 | ||
1da177e4 LT |
687 | void (*rw_disk)(ide_drive_t *, struct request *); |
688 | ||
689 | #if 0 | |
690 | ide_hwif_ops_t *hwifops; | |
691 | #else | |
88b2b32b | 692 | /* routine to program host for PIO mode */ |
26bcb879 | 693 | void (*set_pio_mode)(ide_drive_t *, const u8); |
88b2b32b BZ |
694 | /* routine to program host for DMA mode */ |
695 | void (*set_dma_mode)(ide_drive_t *, const u8); | |
1da177e4 LT |
696 | /* tweaks hardware to select drive */ |
697 | void (*selectproc)(ide_drive_t *); | |
698 | /* chipset polling based on hba specifics */ | |
699 | int (*reset_poll)(ide_drive_t *); | |
700 | /* chipset specific changes to default for device-hba resets */ | |
701 | void (*pre_reset)(ide_drive_t *); | |
702 | /* routine to reset controller after a disk reset */ | |
703 | void (*resetproc)(ide_drive_t *); | |
704 | /* special interrupt handling for shared pci interrupts */ | |
705 | void (*intrproc)(ide_drive_t *); | |
706 | /* special host masking for drive selection */ | |
707 | void (*maskproc)(ide_drive_t *, int); | |
708 | /* check host's drive quirk list */ | |
709 | int (*quirkproc)(ide_drive_t *); | |
710 | /* driver soft-power interface */ | |
711 | int (*busproc)(ide_drive_t *, int); | |
1da177e4 | 712 | #endif |
b4e44369 | 713 | u8 (*mdma_filter)(ide_drive_t *); |
2d5eaa6d | 714 | u8 (*udma_filter)(ide_drive_t *); |
1da177e4 | 715 | |
fd9bb539 BZ |
716 | void (*fixup)(struct hwif_s *); |
717 | ||
1da177e4 LT |
718 | void (*ata_input_data)(ide_drive_t *, void *, u32); |
719 | void (*ata_output_data)(ide_drive_t *, void *, u32); | |
720 | ||
721 | void (*atapi_input_bytes)(ide_drive_t *, void *, u32); | |
722 | void (*atapi_output_bytes)(ide_drive_t *, void *, u32); | |
723 | ||
724 | int (*dma_setup)(ide_drive_t *); | |
725 | void (*dma_exec_cmd)(ide_drive_t *, u8); | |
726 | void (*dma_start)(ide_drive_t *); | |
727 | int (*ide_dma_end)(ide_drive_t *drive); | |
1da177e4 | 728 | int (*ide_dma_on)(ide_drive_t *drive); |
7469aaf6 | 729 | void (*dma_off_quietly)(ide_drive_t *drive); |
1da177e4 | 730 | int (*ide_dma_test_irq)(ide_drive_t *drive); |
f0dd8712 | 731 | void (*ide_dma_clear_irq)(ide_drive_t *drive); |
ccf35289 | 732 | void (*dma_host_on)(ide_drive_t *drive); |
7469aaf6 | 733 | void (*dma_host_off)(ide_drive_t *drive); |
841d2a9b | 734 | void (*dma_lost_irq)(ide_drive_t *drive); |
c283f5db | 735 | void (*dma_timeout)(ide_drive_t *drive); |
1da177e4 LT |
736 | |
737 | void (*OUTB)(u8 addr, unsigned long port); | |
738 | void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port); | |
739 | void (*OUTW)(u16 addr, unsigned long port); | |
1da177e4 LT |
740 | void (*OUTSW)(unsigned long port, void *addr, u32 count); |
741 | void (*OUTSL)(unsigned long port, void *addr, u32 count); | |
742 | ||
743 | u8 (*INB)(unsigned long port); | |
744 | u16 (*INW)(unsigned long port); | |
1da177e4 LT |
745 | void (*INSW)(unsigned long port, void *addr, u32 count); |
746 | void (*INSL)(unsigned long port, void *addr, u32 count); | |
747 | ||
748 | /* dma physical region descriptor table (cpu view) */ | |
749 | unsigned int *dmatable_cpu; | |
750 | /* dma physical region descriptor table (dma view) */ | |
751 | dma_addr_t dmatable_dma; | |
752 | /* Scatter-gather list used to build the above */ | |
753 | struct scatterlist *sg_table; | |
754 | int sg_max_nents; /* Maximum number of entries in it */ | |
755 | int sg_nents; /* Current number of entries in it */ | |
756 | int sg_dma_direction; /* dma transfer direction */ | |
757 | ||
758 | /* data phase of the active command (currently only valid for PIO/DMA) */ | |
759 | int data_phase; | |
760 | ||
761 | unsigned int nsect; | |
762 | unsigned int nleft; | |
55c16a70 | 763 | struct scatterlist *cursg; |
1da177e4 LT |
764 | unsigned int cursg_ofs; |
765 | ||
1da177e4 LT |
766 | int rqsize; /* max sectors per request */ |
767 | int irq; /* our irq number */ | |
768 | ||
769 | unsigned long dma_master; /* reference base addr dmabase */ | |
770 | unsigned long dma_base; /* base addr for dma ports */ | |
771 | unsigned long dma_command; /* dma command register */ | |
772 | unsigned long dma_vendor1; /* dma vendor 1 register */ | |
773 | unsigned long dma_status; /* dma status register */ | |
774 | unsigned long dma_vendor3; /* dma vendor 3 register */ | |
775 | unsigned long dma_prdtable; /* actual prd table address */ | |
1da177e4 | 776 | |
1da177e4 LT |
777 | unsigned long config_data; /* for use by chipset-specific code */ |
778 | unsigned long select_data; /* for use by chipset-specific code */ | |
779 | ||
020e322d SS |
780 | unsigned long extra_base; /* extra addr for dma ports */ |
781 | unsigned extra_ports; /* number of extra dma ports */ | |
782 | ||
1da177e4 LT |
783 | unsigned noprobe : 1; /* don't probe for this interface */ |
784 | unsigned present : 1; /* this interface exists */ | |
785 | unsigned hold : 1; /* this interface is always present */ | |
786 | unsigned serialized : 1; /* serialized all channel operation */ | |
787 | unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */ | |
788 | unsigned reset : 1; /* reset after probe */ | |
1da177e4 LT |
789 | unsigned auto_poll : 1; /* supports nop auto-poll */ |
790 | unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */ | |
208a08f7 | 791 | unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */ |
2ad1e558 | 792 | unsigned mmio : 1; /* host uses MMIO */ |
1da177e4 LT |
793 | |
794 | struct device gendev; | |
f36d4024 | 795 | struct completion gendev_rel_comp; /* To deal with device release() */ |
1da177e4 LT |
796 | |
797 | void *hwif_data; /* extra hwif data */ | |
798 | ||
799 | unsigned dma; | |
e3a59b4d HR |
800 | |
801 | #ifdef CONFIG_BLK_DEV_IDEACPI | |
802 | struct ide_acpi_hwif_link *acpidata; | |
803 | #endif | |
22fc6ecc | 804 | } ____cacheline_internodealigned_in_smp ide_hwif_t; |
1da177e4 LT |
805 | |
806 | /* | |
807 | * internal ide interrupt handler type | |
808 | */ | |
809 | typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *); | |
810 | typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); | |
811 | typedef int (ide_expiry_t)(ide_drive_t *); | |
812 | ||
813 | typedef struct hwgroup_s { | |
814 | /* irq handler, if active */ | |
815 | ide_startstop_t (*handler)(ide_drive_t *); | |
816 | /* irq handler, suspended if active */ | |
817 | ide_startstop_t (*handler_save)(ide_drive_t *); | |
818 | /* BOOL: protects all fields below */ | |
819 | volatile int busy; | |
820 | /* BOOL: wake us up on timer expiry */ | |
821 | unsigned int sleeping : 1; | |
822 | /* BOOL: polling active & poll_timeout field valid */ | |
823 | unsigned int polling : 1; | |
913759ac AC |
824 | /* BOOL: in a polling reset situation. Must not trigger another reset yet */ |
825 | unsigned int resetting : 1; | |
826 | ||
1da177e4 LT |
827 | /* current drive */ |
828 | ide_drive_t *drive; | |
829 | /* ptr to current hwif in linked-list */ | |
830 | ide_hwif_t *hwif; | |
831 | ||
832 | /* for pci chipsets */ | |
833 | struct pci_dev *pci_dev; | |
1da177e4 LT |
834 | |
835 | /* current request */ | |
836 | struct request *rq; | |
837 | /* failsafe timer */ | |
838 | struct timer_list timer; | |
839 | /* local copy of current write rq */ | |
840 | struct request wrq; | |
841 | /* timeout value during long polls */ | |
842 | unsigned long poll_timeout; | |
843 | /* queried upon timeouts */ | |
844 | int (*expiry)(ide_drive_t *); | |
845 | /* ide_system_bus_speed */ | |
846 | int pio_clock; | |
23450319 SS |
847 | int req_gen; |
848 | int req_gen_timer; | |
1da177e4 LT |
849 | |
850 | unsigned char cmd_buf[4]; | |
851 | } ide_hwgroup_t; | |
852 | ||
7662d046 BZ |
853 | typedef struct ide_driver_s ide_driver_t; |
854 | ||
f9383c42 | 855 | extern struct mutex ide_setting_mtx; |
1da177e4 | 856 | |
7662d046 BZ |
857 | int set_io_32bit(ide_drive_t *, int); |
858 | int set_pio_mode(ide_drive_t *, int); | |
859 | int set_using_dma(ide_drive_t *, int); | |
860 | ||
861 | #ifdef CONFIG_IDE_PROC_FS | |
1da177e4 LT |
862 | /* |
863 | * configurable drive settings | |
864 | */ | |
865 | ||
866 | #define TYPE_INT 0 | |
1497943e BZ |
867 | #define TYPE_BYTE 1 |
868 | #define TYPE_SHORT 2 | |
1da177e4 LT |
869 | |
870 | #define SETTING_READ (1 << 0) | |
871 | #define SETTING_WRITE (1 << 1) | |
872 | #define SETTING_RW (SETTING_READ | SETTING_WRITE) | |
873 | ||
874 | typedef int (ide_procset_t)(ide_drive_t *, int); | |
875 | typedef struct ide_settings_s { | |
876 | char *name; | |
877 | int rw; | |
1da177e4 LT |
878 | int data_type; |
879 | int min; | |
880 | int max; | |
881 | int mul_factor; | |
882 | int div_factor; | |
883 | void *data; | |
884 | ide_procset_t *set; | |
885 | int auto_remove; | |
886 | struct ide_settings_s *next; | |
887 | } ide_settings_t; | |
888 | ||
1497943e | 889 | int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set); |
1da177e4 LT |
890 | |
891 | /* | |
892 | * /proc/ide interface | |
893 | */ | |
894 | typedef struct { | |
895 | const char *name; | |
896 | mode_t mode; | |
897 | read_proc_t *read_proc; | |
898 | write_proc_t *write_proc; | |
899 | } ide_proc_entry_t; | |
900 | ||
ecfd80e4 BZ |
901 | void proc_ide_create(void); |
902 | void proc_ide_destroy(void); | |
5cbf79cd BZ |
903 | void ide_proc_register_port(ide_hwif_t *); |
904 | void ide_proc_unregister_port(ide_hwif_t *); | |
7662d046 BZ |
905 | void ide_proc_register_driver(ide_drive_t *, ide_driver_t *); |
906 | void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *); | |
907 | ||
908 | void ide_add_generic_settings(ide_drive_t *); | |
909 | ||
1da177e4 LT |
910 | read_proc_t proc_ide_read_capacity; |
911 | read_proc_t proc_ide_read_geometry; | |
912 | ||
913 | #ifdef CONFIG_BLK_DEV_IDEPCI | |
914 | void ide_pci_create_host_proc(const char *, get_info_t *); | |
915 | #endif | |
916 | ||
917 | /* | |
918 | * Standard exit stuff: | |
919 | */ | |
920 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \ | |
921 | { \ | |
922 | len -= off; \ | |
923 | if (len < count) { \ | |
924 | *eof = 1; \ | |
925 | if (len <= 0) \ | |
926 | return 0; \ | |
927 | } else \ | |
928 | len = count; \ | |
929 | *start = page + off; \ | |
930 | return len; \ | |
931 | } | |
932 | #else | |
ecfd80e4 BZ |
933 | static inline void proc_ide_create(void) { ; } |
934 | static inline void proc_ide_destroy(void) { ; } | |
5cbf79cd BZ |
935 | static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } |
936 | static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } | |
7662d046 BZ |
937 | static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; } |
938 | static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; } | |
939 | static inline void ide_add_generic_settings(ide_drive_t *drive) { ; } | |
1da177e4 LT |
940 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0; |
941 | #endif | |
942 | ||
943 | /* | |
944 | * Power Management step value (rq->pm->pm_step). | |
945 | * | |
946 | * The step value starts at 0 (ide_pm_state_start_suspend) for a | |
947 | * suspend operation or 1000 (ide_pm_state_start_resume) for a | |
948 | * resume operation. | |
949 | * | |
950 | * For each step, the core calls the subdriver start_power_step() first. | |
951 | * This can return: | |
952 | * - ide_stopped : In this case, the core calls us back again unless | |
953 | * step have been set to ide_power_state_completed. | |
954 | * - ide_started : In this case, the channel is left busy until an | |
955 | * async event (interrupt) occurs. | |
956 | * Typically, start_power_step() will issue a taskfile request with | |
957 | * do_rw_taskfile(). | |
958 | * | |
959 | * Upon reception of the interrupt, the core will call complete_power_step() | |
960 | * with the error code if any. This routine should update the step value | |
961 | * and return. It should not start a new request. The core will call | |
962 | * start_power_step for the new step value, unless step have been set to | |
963 | * ide_power_state_completed. | |
964 | * | |
965 | * Subdrivers are expected to define their own additional power | |
966 | * steps from 1..999 for suspend and from 1001..1999 for resume, | |
967 | * other values are reserved for future use. | |
968 | */ | |
969 | ||
970 | enum { | |
971 | ide_pm_state_completed = -1, | |
972 | ide_pm_state_start_suspend = 0, | |
973 | ide_pm_state_start_resume = 1000, | |
974 | }; | |
975 | ||
976 | /* | |
977 | * Subdrivers support. | |
4ef3b8f4 LR |
978 | * |
979 | * The gendriver.owner field should be set to the module owner of this driver. | |
980 | * The gendriver.name field should be set to the name of this driver | |
1da177e4 | 981 | */ |
7662d046 | 982 | struct ide_driver_s { |
1da177e4 LT |
983 | const char *version; |
984 | u8 media; | |
1da177e4 | 985 | unsigned supports_dsc_overlap : 1; |
1da177e4 LT |
986 | ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); |
987 | int (*end_request)(ide_drive_t *, int, int); | |
988 | ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8); | |
989 | ide_startstop_t (*abort)(ide_drive_t *, struct request *rq); | |
1da177e4 | 990 | struct device_driver gen_driver; |
4031bbe4 RK |
991 | int (*probe)(ide_drive_t *); |
992 | void (*remove)(ide_drive_t *); | |
0d2157f7 | 993 | void (*resume)(ide_drive_t *); |
4031bbe4 | 994 | void (*shutdown)(ide_drive_t *); |
7662d046 BZ |
995 | #ifdef CONFIG_IDE_PROC_FS |
996 | ide_proc_entry_t *proc; | |
997 | #endif | |
998 | }; | |
1da177e4 | 999 | |
4031bbe4 RK |
1000 | #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver) |
1001 | ||
1da177e4 LT |
1002 | int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long); |
1003 | ||
1004 | /* | |
1005 | * ide_hwifs[] is the master data structure used to keep track | |
1006 | * of just about everything in ide.c. Whenever possible, routines | |
1007 | * should be using pointers to a drive (ide_drive_t *) or | |
1008 | * pointers to a hwif (ide_hwif_t *), rather than indexing this | |
1009 | * structure directly (the allocation/layout may change!). | |
1010 | * | |
1011 | */ | |
1012 | #ifndef _IDE_C | |
1013 | extern ide_hwif_t ide_hwifs[]; /* master data repository */ | |
1014 | #endif | |
1015 | extern int noautodma; | |
1016 | ||
1017 | extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs); | |
dbe217af AC |
1018 | int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq, |
1019 | int uptodate, int nr_sectors); | |
1da177e4 | 1020 | |
1da177e4 LT |
1021 | extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry); |
1022 | ||
1da177e4 LT |
1023 | extern void ide_execute_command(ide_drive_t *, task_ioreg_t cmd, ide_handler_t *, unsigned int, ide_expiry_t *); |
1024 | ||
1025 | ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8); | |
1026 | ||
1da177e4 LT |
1027 | ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat); |
1028 | ||
1029 | ide_startstop_t __ide_abort(ide_drive_t *, struct request *); | |
1030 | ||
1da177e4 LT |
1031 | extern ide_startstop_t ide_abort(ide_drive_t *, const char *); |
1032 | ||
1033 | extern void ide_fix_driveid(struct hd_driveid *); | |
01745112 | 1034 | |
1da177e4 LT |
1035 | extern void ide_fixstring(u8 *, const int, const int); |
1036 | ||
74af21cf | 1037 | int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); |
1da177e4 | 1038 | |
1da177e4 LT |
1039 | extern ide_startstop_t ide_do_reset (ide_drive_t *); |
1040 | ||
1da177e4 LT |
1041 | extern void ide_init_drive_cmd (struct request *rq); |
1042 | ||
1da177e4 LT |
1043 | /* |
1044 | * "action" parameter type for ide_do_drive_cmd() below. | |
1045 | */ | |
1046 | typedef enum { | |
1047 | ide_wait, /* insert rq at end of list, and wait for it */ | |
1da177e4 LT |
1048 | ide_preempt, /* insert rq in front of current request */ |
1049 | ide_head_wait, /* insert rq in front of current request and wait for it */ | |
1050 | ide_end /* insert rq at end of list, but don't wait for it */ | |
1051 | } ide_action_t; | |
1052 | ||
1da177e4 LT |
1053 | extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t); |
1054 | ||
1da177e4 LT |
1055 | extern void ide_end_drive_cmd(ide_drive_t *, u8, u8); |
1056 | ||
1057 | /* | |
1058 | * Issue ATA command and wait for completion. | |
1059 | * Use for implementing commands in kernel | |
1060 | * | |
1061 | * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf) | |
1062 | */ | |
1063 | extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *); | |
1064 | ||
1065 | typedef struct ide_task_s { | |
1066 | /* | |
1067 | * struct hd_drive_task_hdr tf; | |
1068 | * task_struct_t tf; | |
1069 | * struct hd_drive_hob_hdr hobf; | |
1070 | * hob_struct_t hobf; | |
1071 | */ | |
1072 | task_ioreg_t tfRegister[8]; | |
1073 | task_ioreg_t hobRegister[8]; | |
1074 | ide_reg_valid_t tf_out_flags; | |
1075 | ide_reg_valid_t tf_in_flags; | |
1076 | int data_phase; | |
1077 | int command_type; | |
1078 | ide_pre_handler_t *prehandler; | |
1079 | ide_handler_t *handler; | |
1080 | struct request *rq; /* copy of request */ | |
1081 | void *special; /* valid_t generally */ | |
1082 | } ide_task_t; | |
1083 | ||
1084 | extern u32 ide_read_24(ide_drive_t *); | |
1085 | ||
1086 | extern void SELECT_DRIVE(ide_drive_t *); | |
1087 | extern void SELECT_INTERRUPT(ide_drive_t *); | |
1088 | extern void SELECT_MASK(ide_drive_t *, int); | |
1089 | extern void QUIRK_LIST(ide_drive_t *); | |
1090 | ||
1091 | extern int drive_is_ready(ide_drive_t *); | |
1da177e4 LT |
1092 | |
1093 | /* | |
1094 | * taskfile io for disks for now...and builds request from ide_ioctl | |
1095 | */ | |
1096 | extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *); | |
1097 | ||
1098 | /* | |
1099 | * Special Flagged Register Validation Caller | |
1100 | */ | |
1101 | extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *); | |
1102 | ||
1103 | extern ide_startstop_t set_multmode_intr(ide_drive_t *); | |
1104 | extern ide_startstop_t set_geometry_intr(ide_drive_t *); | |
1105 | extern ide_startstop_t recal_intr(ide_drive_t *); | |
1106 | extern ide_startstop_t task_no_data_intr(ide_drive_t *); | |
1107 | extern ide_startstop_t task_in_intr(ide_drive_t *); | |
1108 | extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *); | |
1109 | ||
1110 | extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *); | |
1111 | ||
1112 | int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
1113 | int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
1114 | int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
1115 | ||
1116 | extern int system_bus_clock(void); | |
1117 | ||
1118 | extern int ide_driveid_update(ide_drive_t *); | |
1119 | extern int ide_ata66_check(ide_drive_t *, ide_task_t *); | |
1120 | extern int ide_config_drive_speed(ide_drive_t *, u8); | |
1121 | extern u8 eighty_ninty_three (ide_drive_t *); | |
1122 | extern int set_transfer(ide_drive_t *, ide_task_t *); | |
1123 | extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); | |
1124 | ||
1125 | extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); | |
1126 | ||
1da177e4 LT |
1127 | extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); |
1128 | ||
1129 | extern int ide_spin_wait_hwgroup(ide_drive_t *); | |
1130 | extern void ide_timer_expiry(unsigned long); | |
7d12e780 | 1131 | extern irqreturn_t ide_intr(int irq, void *dev_id); |
165125e1 | 1132 | extern void do_ide_request(struct request_queue *); |
1da177e4 LT |
1133 | |
1134 | void ide_init_disk(struct gendisk *, ide_drive_t *); | |
1135 | ||
1da177e4 LT |
1136 | extern int ideprobe_init(void); |
1137 | ||
6d208b39 | 1138 | #ifdef CONFIG_IDEPCI_PCIBUS_ORDER |
1da177e4 | 1139 | extern void ide_scan_pcibus(int scan_direction) __init; |
725522b5 GKH |
1140 | extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); |
1141 | #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) | |
6d208b39 BZ |
1142 | #else |
1143 | #define ide_pci_register_driver(d) pci_register_driver(d) | |
1144 | #endif | |
1145 | ||
85620436 BZ |
1146 | void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *); |
1147 | void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); | |
1da177e4 LT |
1148 | |
1149 | extern void default_hwif_iops(ide_hwif_t *); | |
1150 | extern void default_hwif_mmiops(ide_hwif_t *); | |
1151 | extern void default_hwif_transport(ide_hwif_t *); | |
1152 | ||
1da177e4 LT |
1153 | typedef struct ide_pci_enablebit_s { |
1154 | u8 reg; /* byte pci reg holding the enable-bit */ | |
1155 | u8 mask; /* mask to isolate the enable-bit */ | |
1156 | u8 val; /* value of masked reg when "enabled" */ | |
1157 | } ide_pci_enablebit_t; | |
1158 | ||
1159 | enum { | |
1160 | /* Uses ISA control ports not PCI ones. */ | |
a5d8c5c8 | 1161 | IDE_HFLAG_ISA_PORTS = (1 << 0), |
6a824c92 | 1162 | /* single port device */ |
a5d8c5c8 | 1163 | IDE_HFLAG_SINGLE = (1 << 1), |
6a824c92 BZ |
1164 | /* don't use legacy PIO blacklist */ |
1165 | IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), | |
1166 | /* don't use conservative PIO "downgrade" */ | |
1167 | IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3), | |
26bcb879 BZ |
1168 | /* use PIO8/9 for prefetch off/on */ |
1169 | IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), | |
1170 | /* use PIO6/7 for fast-devsel off/on */ | |
1171 | IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), | |
1172 | /* use 100-102 and 200-202 PIO values to set DMA modes */ | |
1173 | IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), | |
aedea591 BZ |
1174 | /* |
1175 | * keep DMA setting when programming PIO mode, may be used only | |
1176 | * for hosts which have separate PIO and DMA timings (ie. PMAC) | |
1177 | */ | |
1178 | IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), | |
88b2b32b BZ |
1179 | /* program host for the transfer mode after programming device */ |
1180 | IDE_HFLAG_POST_SET_MODE = (1 << 8), | |
1181 | /* don't program host/device for the transfer mode ("smart" hosts) */ | |
1182 | IDE_HFLAG_NO_SET_MODE = (1 << 9), | |
0ae2e178 BZ |
1183 | /* trust BIOS for programming chipset/device for DMA */ |
1184 | IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), | |
1185 | /* host uses VDMA */ | |
1186 | IDE_HFLAG_VDMA = (1 << 11), | |
33c1002e BZ |
1187 | /* ATAPI DMA is unsupported */ |
1188 | IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), | |
7cab14a7 BZ |
1189 | /* set if host is a "bootable" controller */ |
1190 | IDE_HFLAG_BOOTABLE = (1 << 13), | |
47b68788 BZ |
1191 | /* host doesn't support DMA */ |
1192 | IDE_HFLAG_NO_DMA = (1 << 14), | |
1193 | /* check if host is PCI IDE device before allowing DMA */ | |
1194 | IDE_HFLAG_NO_AUTODMA = (1 << 15), | |
9ffcf364 BZ |
1195 | /* host is CS5510/CS5520 */ |
1196 | IDE_HFLAG_CS5520 = (1 << 16), | |
238e4f14 BZ |
1197 | /* no LBA48 */ |
1198 | IDE_HFLAG_NO_LBA48 = (1 << 17), | |
1199 | /* no LBA48 DMA */ | |
1200 | IDE_HFLAG_NO_LBA48_DMA = (1 << 18), | |
ed67b923 BZ |
1201 | /* data FIFO is cleared by an error */ |
1202 | IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), | |
1c51361a BZ |
1203 | /* serialize ports */ |
1204 | IDE_HFLAG_SERIALIZE = (1 << 20), | |
3985ee3b BZ |
1205 | /* use legacy IRQs */ |
1206 | IDE_HFLAG_LEGACY_IRQS = (1 << 21), | |
8acf28c0 BZ |
1207 | /* force use of legacy IRQs */ |
1208 | IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22), | |
272a3709 BZ |
1209 | /* limit LBA48 requests to 256 sectors */ |
1210 | IDE_HFLAG_RQSIZE_256 = (1 << 23), | |
caea7602 BZ |
1211 | /* use 32-bit I/O ops */ |
1212 | IDE_HFLAG_IO_32BIT = (1 << 24), | |
1213 | /* unmask IRQs */ | |
1214 | IDE_HFLAG_UNMASK_IRQS = (1 << 25), | |
1da177e4 LT |
1215 | }; |
1216 | ||
7cab14a7 BZ |
1217 | #ifdef CONFIG_BLK_DEV_OFFBOARD |
1218 | # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE | |
1219 | #else | |
1220 | # define IDE_HFLAG_OFF_BOARD 0 | |
1221 | #endif | |
1222 | ||
039788e1 | 1223 | struct ide_port_info { |
1da177e4 | 1224 | char *name; |
1da177e4 LT |
1225 | unsigned int (*init_chipset)(struct pci_dev *, const char *); |
1226 | void (*init_iops)(ide_hwif_t *); | |
1227 | void (*init_hwif)(ide_hwif_t *); | |
1228 | void (*init_dma)(ide_hwif_t *, unsigned long); | |
1229 | void (*fixup)(ide_hwif_t *); | |
1da177e4 | 1230 | ide_pci_enablebit_t enablebits[2]; |
528a572d | 1231 | hwif_chipset_t chipset; |
1da177e4 | 1232 | unsigned int extra; |
9ffcf364 | 1233 | u32 host_flags; |
4099d143 | 1234 | u8 pio_mask; |
5f8b6c34 BZ |
1235 | u8 swdma_mask; |
1236 | u8 mwdma_mask; | |
18137207 | 1237 | u8 udma_mask; |
039788e1 | 1238 | }; |
1da177e4 | 1239 | |
85620436 BZ |
1240 | int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *); |
1241 | int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *); | |
1da177e4 LT |
1242 | |
1243 | void ide_map_sg(ide_drive_t *, struct request *); | |
1244 | void ide_init_sg_cmd(ide_drive_t *, struct request *); | |
1245 | ||
1246 | #define BAD_DMA_DRIVE 0 | |
1247 | #define GOOD_DMA_DRIVE 1 | |
1248 | ||
65e5f2e3 JC |
1249 | struct drive_list_entry { |
1250 | const char *id_model; | |
1251 | const char *id_firmware; | |
1252 | }; | |
1253 | ||
1254 | int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *); | |
a5b7e70d BZ |
1255 | |
1256 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
1da177e4 | 1257 | int __ide_dma_bad_drive(ide_drive_t *); |
7670df73 BZ |
1258 | |
1259 | u8 ide_find_dma_mode(ide_drive_t *, u8); | |
1260 | ||
1261 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) | |
1262 | { | |
1263 | return ide_find_dma_mode(drive, XFER_UDMA_6); | |
1264 | } | |
1265 | ||
7469aaf6 | 1266 | void ide_dma_off(ide_drive_t *); |
1da177e4 | 1267 | void ide_dma_verbose(ide_drive_t *); |
3608b5d7 | 1268 | int ide_set_dma(ide_drive_t *); |
1da177e4 LT |
1269 | ide_startstop_t ide_dma_intr(ide_drive_t *); |
1270 | ||
1271 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI | |
1272 | extern int ide_build_sglist(ide_drive_t *, struct request *); | |
1273 | extern int ide_build_dmatable(ide_drive_t *, struct request *); | |
1274 | extern void ide_destroy_dmatable(ide_drive_t *); | |
1275 | extern int ide_release_dma(ide_hwif_t *); | |
1276 | extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int); | |
1277 | ||
7469aaf6 BZ |
1278 | void ide_dma_host_off(ide_drive_t *); |
1279 | void ide_dma_off_quietly(ide_drive_t *); | |
ccf35289 | 1280 | void ide_dma_host_on(ide_drive_t *); |
1da177e4 | 1281 | extern int __ide_dma_on(ide_drive_t *); |
1da177e4 LT |
1282 | extern int ide_dma_setup(ide_drive_t *); |
1283 | extern void ide_dma_start(ide_drive_t *); | |
1284 | extern int __ide_dma_end(ide_drive_t *); | |
841d2a9b | 1285 | extern void ide_dma_lost_irq(ide_drive_t *); |
c283f5db | 1286 | extern void ide_dma_timeout(ide_drive_t *); |
1da177e4 LT |
1287 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ |
1288 | ||
1289 | #else | |
7670df73 | 1290 | static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } |
2d5eaa6d | 1291 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } |
7469aaf6 | 1292 | static inline void ide_dma_off(ide_drive_t *drive) { ; } |
1da177e4 | 1293 | static inline void ide_dma_verbose(ide_drive_t *drive) { ; } |
3608b5d7 | 1294 | static inline int ide_set_dma(ide_drive_t *drive) { return 1; } |
1da177e4 LT |
1295 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
1296 | ||
1297 | #ifndef CONFIG_BLK_DEV_IDEDMA_PCI | |
1298 | static inline void ide_release_dma(ide_hwif_t *drive) {;} | |
1299 | #endif | |
1300 | ||
e3a59b4d HR |
1301 | #ifdef CONFIG_BLK_DEV_IDEACPI |
1302 | extern int ide_acpi_exec_tfs(ide_drive_t *drive); | |
1303 | extern void ide_acpi_get_timing(ide_hwif_t *hwif); | |
1304 | extern void ide_acpi_push_timing(ide_hwif_t *hwif); | |
1305 | extern void ide_acpi_init(ide_hwif_t *hwif); | |
5e32132b | 1306 | extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); |
e3a59b4d HR |
1307 | #else |
1308 | static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } | |
1309 | static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } | |
1310 | static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } | |
1311 | static inline void ide_acpi_init(ide_hwif_t *hwif) { ; } | |
5e32132b | 1312 | static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} |
e3a59b4d HR |
1313 | #endif |
1314 | ||
1da177e4 LT |
1315 | extern int ide_hwif_request_regions(ide_hwif_t *hwif); |
1316 | extern void ide_hwif_release_regions(ide_hwif_t* hwif); | |
1317 | extern void ide_unregister (unsigned int index); | |
1318 | ||
1319 | void ide_register_region(struct gendisk *); | |
1320 | void ide_unregister_region(struct gendisk *); | |
1321 | ||
1322 | void ide_undecoded_slave(ide_hwif_t *); | |
1323 | ||
8447d9d5 | 1324 | int ide_device_add(u8 idx[4]); |
1da177e4 LT |
1325 | |
1326 | static inline void *ide_get_hwifdata (ide_hwif_t * hwif) | |
1327 | { | |
1328 | return hwif->hwif_data; | |
1329 | } | |
1330 | ||
1331 | static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) | |
1332 | { | |
1333 | hwif->hwif_data = data; | |
1334 | } | |
1335 | ||
1336 | /* ide-lib.c */ | |
1da177e4 LT |
1337 | extern char *ide_xfer_verbose(u8 xfer_rate); |
1338 | extern void ide_toggle_bounce(ide_drive_t *drive, int on); | |
1339 | extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate); | |
1340 | ||
2229833c BZ |
1341 | static inline int ide_dev_has_iordy(struct hd_driveid *id) |
1342 | { | |
1343 | return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0; | |
1344 | } | |
1345 | ||
6c3c22f3 SS |
1346 | static inline int ide_dev_is_sata(struct hd_driveid *id) |
1347 | { | |
1348 | /* | |
1349 | * See if word 93 is 0 AND drive is at least ATA-5 compatible | |
1350 | * verifying that word 80 by casting it to a signed type -- | |
1351 | * this trick allows us to filter out the reserved values of | |
1352 | * 0x0000 and 0xffff along with the earlier ATA revisions... | |
1353 | */ | |
1354 | if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020) | |
1355 | return 1; | |
1356 | return 0; | |
1357 | } | |
1358 | ||
1da177e4 LT |
1359 | u8 ide_dump_status(ide_drive_t *, const char *, u8); |
1360 | ||
1361 | typedef struct ide_pio_timings_s { | |
1362 | int setup_time; /* Address setup (ns) minimum */ | |
1363 | int active_time; /* Active pulse (ns) minimum */ | |
81d368e0 SS |
1364 | int cycle_time; /* Cycle time (ns) minimum = */ |
1365 | /* active + recovery (+ setup for some chips) */ | |
1da177e4 LT |
1366 | } ide_pio_timings_t; |
1367 | ||
7dd00083 | 1368 | unsigned int ide_pio_cycle_time(ide_drive_t *, u8); |
2134758d | 1369 | u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); |
1da177e4 LT |
1370 | extern const ide_pio_timings_t ide_pio_timings[6]; |
1371 | ||
88b2b32b BZ |
1372 | int ide_set_pio_mode(ide_drive_t *, u8); |
1373 | int ide_set_dma_mode(ide_drive_t *, u8); | |
1374 | ||
26bcb879 BZ |
1375 | void ide_set_pio(ide_drive_t *, u8); |
1376 | ||
1377 | static inline void ide_set_max_pio(ide_drive_t *drive) | |
1378 | { | |
1379 | ide_set_pio(drive, 255); | |
1380 | } | |
1da177e4 LT |
1381 | |
1382 | extern spinlock_t ide_lock; | |
ef29888e | 1383 | extern struct mutex ide_cfg_mtx; |
1da177e4 LT |
1384 | /* |
1385 | * Structure locking: | |
1386 | * | |
ef29888e | 1387 | * ide_cfg_mtx and ide_lock together protect changes to |
1da177e4 LT |
1388 | * ide_hwif_t->{next,hwgroup} |
1389 | * ide_drive_t->next | |
1390 | * | |
1391 | * ide_hwgroup_t->busy: ide_lock | |
1392 | * ide_hwgroup_t->hwif: ide_lock | |
1393 | * ide_hwif_t->mate: constant, no locking | |
1394 | * ide_drive_t->hwif: constant, no locking | |
1395 | */ | |
1396 | ||
366c7f55 | 1397 | #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0) |
1da177e4 LT |
1398 | |
1399 | extern struct bus_type ide_bus_type; | |
1400 | ||
1401 | /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */ | |
1402 | #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000) | |
1403 | ||
1404 | /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */ | |
1405 | #define ide_id_has_flush_cache_ext(id) \ | |
1406 | (((id)->cfs_enable_2 & 0x2400) == 0x2400) | |
1407 | ||
86b37860 CL |
1408 | static inline int hwif_to_node(ide_hwif_t *hwif) |
1409 | { | |
1410 | struct pci_dev *dev = hwif->pci_dev; | |
1411 | return dev ? pcibus_to_node(dev->bus) : -1; | |
1412 | } | |
1413 | ||
1b678347 BH |
1414 | static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive) |
1415 | { | |
1416 | ide_hwif_t *hwif = HWIF(drive); | |
1417 | ||
1418 | return &hwif->drives[(drive->dn ^ 1) & 1]; | |
1419 | } | |
1420 | ||
1da177e4 | 1421 | #endif /* _IDE_H */ |