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Commit | Line | Data |
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1da177e4 LT |
1 | /* interrupt.h */ |
2 | #ifndef _LINUX_INTERRUPT_H | |
3 | #define _LINUX_INTERRUPT_H | |
4 | ||
1da177e4 LT |
5 | #include <linux/kernel.h> |
6 | #include <linux/linkage.h> | |
7 | #include <linux/bitops.h> | |
8 | #include <linux/preempt.h> | |
9 | #include <linux/cpumask.h> | |
908dcecd | 10 | #include <linux/irqreturn.h> |
dd3a1db9 | 11 | #include <linux/irqnr.h> |
1da177e4 | 12 | #include <linux/hardirq.h> |
de30a2b3 | 13 | #include <linux/irqflags.h> |
9ba5f005 | 14 | #include <linux/hrtimer.h> |
cd7eab44 BH |
15 | #include <linux/kref.h> |
16 | #include <linux/workqueue.h> | |
0ebb26e7 | 17 | |
60063497 | 18 | #include <linux/atomic.h> |
1da177e4 | 19 | #include <asm/ptrace.h> |
7d65f4a6 | 20 | #include <asm/irq.h> |
8fd2f68c | 21 | #include <asm/sections.h> |
1da177e4 | 22 | |
6e213616 TG |
23 | /* |
24 | * These correspond to the IORESOURCE_IRQ_* defines in | |
25 | * linux/ioport.h to select the interrupt line behaviour. When | |
26 | * requesting an interrupt without specifying a IRQF_TRIGGER, the | |
27 | * setting should be assumed to be "as already configured", which | |
28 | * may be as per machine or firmware initialisation. | |
29 | */ | |
30 | #define IRQF_TRIGGER_NONE 0x00000000 | |
31 | #define IRQF_TRIGGER_RISING 0x00000001 | |
32 | #define IRQF_TRIGGER_FALLING 0x00000002 | |
33 | #define IRQF_TRIGGER_HIGH 0x00000004 | |
34 | #define IRQF_TRIGGER_LOW 0x00000008 | |
35 | #define IRQF_TRIGGER_MASK (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW | \ | |
36 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING) | |
37 | #define IRQF_TRIGGER_PROBE 0x00000010 | |
38 | ||
39 | /* | |
40 | * These flags used only by the kernel as part of the | |
41 | * irq handling routines. | |
42 | * | |
6e213616 TG |
43 | * IRQF_SHARED - allow sharing the irq among several devices |
44 | * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur | |
45 | * IRQF_TIMER - Flag to mark this interrupt as timer interrupt | |
950f4427 TG |
46 | * IRQF_PERCPU - Interrupt is per cpu |
47 | * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing | |
d85a60d8 BW |
48 | * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is |
49 | * registered first in an shared interrupt is considered for | |
50 | * performance reasons) | |
b25c340c TG |
51 | * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished. |
52 | * Used by threaded interrupts which need to keep the | |
53 | * irq line disabled until the threaded handler has been run. | |
737eb030 MR |
54 | * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee |
55 | * that this interrupt will wake the system from a suspended | |
56 | * state. See Documentation/power/suspend-and-interrupts.txt | |
dc5f219e | 57 | * IRQF_FORCE_RESUME - Force enable it on resume even if IRQF_NO_SUSPEND is set |
0c4602ff | 58 | * IRQF_NO_THREAD - Interrupt cannot be threaded |
9bab0b7f IC |
59 | * IRQF_EARLY_RESUME - Resume IRQ early during syscore instead of at device |
60 | * resume time. | |
17f48034 RW |
61 | * IRQF_COND_SUSPEND - If the IRQ is shared with a NO_SUSPEND user, execute this |
62 | * interrupt handler after suspending interrupts. For system | |
63 | * wakeup devices users need to implement wakeup detection in | |
64 | * their interrupt handlers. | |
6e213616 | 65 | */ |
6e213616 TG |
66 | #define IRQF_SHARED 0x00000080 |
67 | #define IRQF_PROBE_SHARED 0x00000100 | |
685fd0b4 | 68 | #define __IRQF_TIMER 0x00000200 |
284c6680 | 69 | #define IRQF_PERCPU 0x00000400 |
950f4427 | 70 | #define IRQF_NOBALANCING 0x00000800 |
d85a60d8 | 71 | #define IRQF_IRQPOLL 0x00001000 |
b25c340c | 72 | #define IRQF_ONESHOT 0x00002000 |
685fd0b4 | 73 | #define IRQF_NO_SUSPEND 0x00004000 |
dc5f219e | 74 | #define IRQF_FORCE_RESUME 0x00008000 |
0c4602ff | 75 | #define IRQF_NO_THREAD 0x00010000 |
9bab0b7f | 76 | #define IRQF_EARLY_RESUME 0x00020000 |
17f48034 | 77 | #define IRQF_COND_SUSPEND 0x00040000 |
685fd0b4 | 78 | |
0c4602ff | 79 | #define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD) |
3aa551c9 | 80 | |
b4e6b097 | 81 | /* |
ae731f8d MZ |
82 | * These values can be returned by request_any_context_irq() and |
83 | * describe the context the interrupt will be run in. | |
84 | * | |
85 | * IRQC_IS_HARDIRQ - interrupt runs in hardirq context | |
86 | * IRQC_IS_NESTED - interrupt runs in a nested threaded context | |
87 | */ | |
88 | enum { | |
89 | IRQC_IS_HARDIRQ = 0, | |
90 | IRQC_IS_NESTED, | |
91 | }; | |
92 | ||
7d12e780 | 93 | typedef irqreturn_t (*irq_handler_t)(int, void *); |
da482792 | 94 | |
a9d0a1a3 TG |
95 | /** |
96 | * struct irqaction - per interrupt action descriptor | |
97 | * @handler: interrupt handler function | |
a9d0a1a3 TG |
98 | * @name: name of the device |
99 | * @dev_id: cookie to identify the device | |
31d9d9b6 | 100 | * @percpu_dev_id: cookie to identify the device |
a9d0a1a3 TG |
101 | * @next: pointer to the next irqaction for shared interrupts |
102 | * @irq: interrupt number | |
c0ecaa06 | 103 | * @flags: flags (see IRQF_* above) |
25985edc | 104 | * @thread_fn: interrupt handler function for threaded interrupts |
3aa551c9 | 105 | * @thread: thread pointer for threaded interrupts |
2a1d3ab8 | 106 | * @secondary: pointer to secondary irqaction (force threading) |
3aa551c9 | 107 | * @thread_flags: flags related to @thread |
b5faba21 | 108 | * @thread_mask: bitmask for keeping track of @thread activity |
c0ecaa06 | 109 | * @dir: pointer to the proc/irq/NN/name entry |
a9d0a1a3 | 110 | */ |
1da177e4 | 111 | struct irqaction { |
31d9d9b6 | 112 | irq_handler_t handler; |
31d9d9b6 MZ |
113 | void *dev_id; |
114 | void __percpu *percpu_dev_id; | |
115 | struct irqaction *next; | |
31d9d9b6 MZ |
116 | irq_handler_t thread_fn; |
117 | struct task_struct *thread; | |
2a1d3ab8 | 118 | struct irqaction *secondary; |
c0ecaa06 TG |
119 | unsigned int irq; |
120 | unsigned int flags; | |
31d9d9b6 MZ |
121 | unsigned long thread_flags; |
122 | unsigned long thread_mask; | |
123 | const char *name; | |
124 | struct proc_dir_entry *dir; | |
f6cd2477 | 125 | } ____cacheline_internodealigned_in_smp; |
1da177e4 | 126 | |
7d12e780 | 127 | extern irqreturn_t no_action(int cpl, void *dev_id); |
3aa551c9 | 128 | |
e237a551 CF |
129 | /* |
130 | * If a (PCI) device interrupt is not connected we set dev->irq to | |
131 | * IRQ_NOTCONNECTED. This causes request_irq() to fail with -ENOTCONN, so we | |
132 | * can distingiush that case from other error returns. | |
133 | * | |
134 | * 0x80000000 is guaranteed to be outside the available range of interrupts | |
135 | * and easy to distinguish from other possible incorrect values. | |
136 | */ | |
137 | #define IRQ_NOTCONNECTED (1U << 31) | |
138 | ||
3aa551c9 TG |
139 | extern int __must_check |
140 | request_threaded_irq(unsigned int irq, irq_handler_t handler, | |
141 | irq_handler_t thread_fn, | |
142 | unsigned long flags, const char *name, void *dev); | |
143 | ||
144 | static inline int __must_check | |
145 | request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, | |
146 | const char *name, void *dev) | |
147 | { | |
148 | return request_threaded_irq(irq, handler, NULL, flags, name, dev); | |
149 | } | |
150 | ||
ae731f8d MZ |
151 | extern int __must_check |
152 | request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
153 | unsigned long flags, const char *name, void *dev_id); | |
154 | ||
31d9d9b6 | 155 | extern int __must_check |
c80081b9 DL |
156 | __request_percpu_irq(unsigned int irq, irq_handler_t handler, |
157 | unsigned long flags, const char *devname, | |
158 | void __percpu *percpu_dev_id); | |
159 | ||
160 | static inline int __must_check | |
31d9d9b6 | 161 | request_percpu_irq(unsigned int irq, irq_handler_t handler, |
c80081b9 DL |
162 | const char *devname, void __percpu *percpu_dev_id) |
163 | { | |
164 | return __request_percpu_irq(irq, handler, 0, | |
165 | devname, percpu_dev_id); | |
166 | } | |
3aa551c9 | 167 | |
25ce4be7 | 168 | extern const void *free_irq(unsigned int, void *); |
31d9d9b6 | 169 | extern void free_percpu_irq(unsigned int, void __percpu *); |
1da177e4 | 170 | |
0af3678f AV |
171 | struct device; |
172 | ||
935bd5b9 AV |
173 | extern int __must_check |
174 | devm_request_threaded_irq(struct device *dev, unsigned int irq, | |
175 | irq_handler_t handler, irq_handler_t thread_fn, | |
176 | unsigned long irqflags, const char *devname, | |
177 | void *dev_id); | |
178 | ||
179 | static inline int __must_check | |
180 | devm_request_irq(struct device *dev, unsigned int irq, irq_handler_t handler, | |
181 | unsigned long irqflags, const char *devname, void *dev_id) | |
182 | { | |
183 | return devm_request_threaded_irq(dev, irq, handler, NULL, irqflags, | |
184 | devname, dev_id); | |
185 | } | |
186 | ||
0668d306 SB |
187 | extern int __must_check |
188 | devm_request_any_context_irq(struct device *dev, unsigned int irq, | |
189 | irq_handler_t handler, unsigned long irqflags, | |
190 | const char *devname, void *dev_id); | |
191 | ||
9ac7849e TH |
192 | extern void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id); |
193 | ||
d7e9629d IM |
194 | /* |
195 | * On lockdep we dont want to enable hardirqs in hardirq | |
196 | * context. Use local_irq_enable_in_hardirq() to annotate | |
197 | * kernel code that has to do this nevertheless (pretty much | |
198 | * the only valid case is for old/broken hardware that is | |
199 | * insanely slow). | |
200 | * | |
201 | * NOTE: in theory this might break fragile code that relies | |
202 | * on hardirq delivery - in practice we dont seem to have such | |
203 | * places left. So the only effect should be slightly increased | |
204 | * irqs-off latencies. | |
205 | */ | |
206 | #ifdef CONFIG_LOCKDEP | |
207 | # define local_irq_enable_in_hardirq() do { } while (0) | |
208 | #else | |
209 | # define local_irq_enable_in_hardirq() local_irq_enable() | |
210 | #endif | |
1da177e4 | 211 | |
1da177e4 | 212 | extern void disable_irq_nosync(unsigned int irq); |
02cea395 | 213 | extern bool disable_hardirq(unsigned int irq); |
1da177e4 | 214 | extern void disable_irq(unsigned int irq); |
31d9d9b6 | 215 | extern void disable_percpu_irq(unsigned int irq); |
1da177e4 | 216 | extern void enable_irq(unsigned int irq); |
1e7c5fd2 | 217 | extern void enable_percpu_irq(unsigned int irq, unsigned int type); |
f0cb3220 | 218 | extern bool irq_percpu_is_enabled(unsigned int irq); |
a92444c6 | 219 | extern void irq_wake_thread(unsigned int irq, void *dev_id); |
ba9a2331 | 220 | |
0a0c5168 RW |
221 | /* The following three functions are for the core kernel use only. */ |
222 | extern void suspend_device_irqs(void); | |
223 | extern void resume_device_irqs(void); | |
0a0c5168 | 224 | |
f0ba3d05 EP |
225 | /** |
226 | * struct irq_affinity_notify - context for notification of IRQ affinity changes | |
227 | * @irq: Interrupt to which notification applies | |
228 | * @kref: Reference count, for internal use | |
229 | * @work: Work item, for internal use | |
230 | * @notify: Function to be called on change. This will be | |
231 | * called in process context. | |
232 | * @release: Function to be called on release. This will be | |
233 | * called in process context. Once registered, the | |
234 | * structure must only be freed when this function is | |
235 | * called or later. | |
236 | */ | |
237 | struct irq_affinity_notify { | |
238 | unsigned int irq; | |
239 | struct kref kref; | |
240 | struct work_struct work; | |
241 | void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask); | |
242 | void (*release)(struct kref *ref); | |
243 | }; | |
244 | ||
20e407e1 CH |
245 | /** |
246 | * struct irq_affinity - Description for automatic irq affinity assignements | |
247 | * @pre_vectors: Don't apply affinity to @pre_vectors at beginning of | |
248 | * the MSI(-X) vector space | |
249 | * @post_vectors: Don't apply affinity to @post_vectors at end of | |
250 | * the MSI(-X) vector space | |
251 | */ | |
252 | struct irq_affinity { | |
253 | int pre_vectors; | |
254 | int post_vectors; | |
255 | }; | |
256 | ||
0244ad00 | 257 | #if defined(CONFIG_SMP) |
d7b90689 | 258 | |
d036e67b | 259 | extern cpumask_var_t irq_default_affinity; |
18404756 | 260 | |
01f8fa4f TG |
261 | /* Internal implementation. Use the helpers below */ |
262 | extern int __irq_set_affinity(unsigned int irq, const struct cpumask *cpumask, | |
263 | bool force); | |
264 | ||
265 | /** | |
266 | * irq_set_affinity - Set the irq affinity of a given irq | |
267 | * @irq: Interrupt to set affinity | |
def5f127 | 268 | * @cpumask: cpumask |
01f8fa4f TG |
269 | * |
270 | * Fails if cpumask does not contain an online CPU | |
271 | */ | |
272 | static inline int | |
273 | irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |
274 | { | |
275 | return __irq_set_affinity(irq, cpumask, false); | |
276 | } | |
277 | ||
278 | /** | |
279 | * irq_force_affinity - Force the irq affinity of a given irq | |
280 | * @irq: Interrupt to set affinity | |
def5f127 | 281 | * @cpumask: cpumask |
01f8fa4f TG |
282 | * |
283 | * Same as irq_set_affinity, but without checking the mask against | |
284 | * online cpus. | |
285 | * | |
286 | * Solely for low level cpu hotplug code, where we need to make per | |
287 | * cpu interrupts affine before the cpu becomes online. | |
288 | */ | |
289 | static inline int | |
290 | irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) | |
291 | { | |
292 | return __irq_set_affinity(irq, cpumask, true); | |
293 | } | |
294 | ||
d7b90689 | 295 | extern int irq_can_set_affinity(unsigned int irq); |
18404756 | 296 | extern int irq_select_affinity(unsigned int irq); |
d7b90689 | 297 | |
e7a297b0 | 298 | extern int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m); |
cd7eab44 | 299 | |
cd7eab44 BH |
300 | extern int |
301 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify); | |
302 | ||
67c93c21 | 303 | struct cpumask *irq_create_affinity_masks(int nvec, const struct irq_affinity *affd); |
6f9a22bc | 304 | int irq_calc_affinity_vectors(int minvec, int maxvec, const struct irq_affinity *affd); |
5e385a6e | 305 | |
d7b90689 RK |
306 | #else /* CONFIG_SMP */ |
307 | ||
0de26520 | 308 | static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m) |
d7b90689 RK |
309 | { |
310 | return -EINVAL; | |
311 | } | |
312 | ||
4c88d7f9 AB |
313 | static inline int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) |
314 | { | |
315 | return 0; | |
316 | } | |
317 | ||
d7b90689 RK |
318 | static inline int irq_can_set_affinity(unsigned int irq) |
319 | { | |
320 | return 0; | |
321 | } | |
322 | ||
18404756 MK |
323 | static inline int irq_select_affinity(unsigned int irq) { return 0; } |
324 | ||
e7a297b0 | 325 | static inline int irq_set_affinity_hint(unsigned int irq, |
cd7eab44 | 326 | const struct cpumask *m) |
e7a297b0 PWJ |
327 | { |
328 | return -EINVAL; | |
329 | } | |
f0ba3d05 EP |
330 | |
331 | static inline int | |
332 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) | |
333 | { | |
334 | return 0; | |
335 | } | |
5e385a6e | 336 | |
34c3d981 | 337 | static inline struct cpumask * |
67c93c21 | 338 | irq_create_affinity_masks(int nvec, const struct irq_affinity *affd) |
34c3d981 TG |
339 | { |
340 | return NULL; | |
341 | } | |
342 | ||
343 | static inline int | |
6f9a22bc | 344 | irq_calc_affinity_vectors(int minvec, int maxvec, const struct irq_affinity *affd) |
34c3d981 TG |
345 | { |
346 | return maxvec; | |
347 | } | |
348 | ||
0244ad00 | 349 | #endif /* CONFIG_SMP */ |
d7b90689 | 350 | |
c01d403b IM |
351 | /* |
352 | * Special lockdep variants of irq disabling/enabling. | |
353 | * These should be used for locking constructs that | |
354 | * know that a particular irq context which is disabled, | |
355 | * and which is the only irq-context user of a lock, | |
356 | * that it's safe to take the lock in the irq-disabled | |
357 | * section without disabling hardirqs. | |
358 | * | |
359 | * On !CONFIG_LOCKDEP they are equivalent to the normal | |
360 | * irq disable/enable methods. | |
361 | */ | |
362 | static inline void disable_irq_nosync_lockdep(unsigned int irq) | |
363 | { | |
364 | disable_irq_nosync(irq); | |
365 | #ifdef CONFIG_LOCKDEP | |
366 | local_irq_disable(); | |
367 | #endif | |
368 | } | |
369 | ||
e8106b94 AV |
370 | static inline void disable_irq_nosync_lockdep_irqsave(unsigned int irq, unsigned long *flags) |
371 | { | |
372 | disable_irq_nosync(irq); | |
373 | #ifdef CONFIG_LOCKDEP | |
374 | local_irq_save(*flags); | |
375 | #endif | |
376 | } | |
377 | ||
c01d403b IM |
378 | static inline void disable_irq_lockdep(unsigned int irq) |
379 | { | |
380 | disable_irq(irq); | |
381 | #ifdef CONFIG_LOCKDEP | |
382 | local_irq_disable(); | |
383 | #endif | |
384 | } | |
385 | ||
386 | static inline void enable_irq_lockdep(unsigned int irq) | |
387 | { | |
388 | #ifdef CONFIG_LOCKDEP | |
389 | local_irq_enable(); | |
390 | #endif | |
391 | enable_irq(irq); | |
392 | } | |
393 | ||
e8106b94 AV |
394 | static inline void enable_irq_lockdep_irqrestore(unsigned int irq, unsigned long *flags) |
395 | { | |
396 | #ifdef CONFIG_LOCKDEP | |
397 | local_irq_restore(*flags); | |
398 | #endif | |
399 | enable_irq(irq); | |
400 | } | |
401 | ||
ba9a2331 | 402 | /* IRQ wakeup (PM) control: */ |
a0cd9ca2 TG |
403 | extern int irq_set_irq_wake(unsigned int irq, unsigned int on); |
404 | ||
ba9a2331 TG |
405 | static inline int enable_irq_wake(unsigned int irq) |
406 | { | |
a0cd9ca2 | 407 | return irq_set_irq_wake(irq, 1); |
ba9a2331 TG |
408 | } |
409 | ||
410 | static inline int disable_irq_wake(unsigned int irq) | |
411 | { | |
a0cd9ca2 | 412 | return irq_set_irq_wake(irq, 0); |
ba9a2331 TG |
413 | } |
414 | ||
1b7047ed MZ |
415 | /* |
416 | * irq_get_irqchip_state/irq_set_irqchip_state specific flags | |
417 | */ | |
418 | enum irqchip_irq_state { | |
419 | IRQCHIP_STATE_PENDING, /* Is interrupt pending? */ | |
420 | IRQCHIP_STATE_ACTIVE, /* Is interrupt in progress? */ | |
421 | IRQCHIP_STATE_MASKED, /* Is interrupt masked? */ | |
422 | IRQCHIP_STATE_LINE_LEVEL, /* Is IRQ line high? */ | |
423 | }; | |
424 | ||
425 | extern int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which, | |
426 | bool *state); | |
427 | extern int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, | |
428 | bool state); | |
8d32a307 TG |
429 | |
430 | #ifdef CONFIG_IRQ_FORCED_THREADING | |
431 | extern bool force_irqthreads; | |
432 | #else | |
433 | #define force_irqthreads (0) | |
434 | #endif | |
435 | ||
3f74478b AK |
436 | #ifndef __ARCH_SET_SOFTIRQ_PENDING |
437 | #define set_softirq_pending(x) (local_softirq_pending() = (x)) | |
438 | #define or_softirq_pending(x) (local_softirq_pending() |= (x)) | |
439 | #endif | |
440 | ||
2d3fbbb3 BH |
441 | /* Some architectures might implement lazy enabling/disabling of |
442 | * interrupts. In some cases, such as stop_machine, we might want | |
443 | * to ensure that after a local_irq_disable(), interrupts have | |
444 | * really been disabled in hardware. Such architectures need to | |
445 | * implement the following hook. | |
446 | */ | |
447 | #ifndef hard_irq_disable | |
448 | #define hard_irq_disable() do { } while(0) | |
449 | #endif | |
450 | ||
1da177e4 LT |
451 | /* PLEASE, avoid to allocate new softirqs, if you need not _really_ high |
452 | frequency threaded job scheduling. For almost all the purposes | |
453 | tasklets are more than enough. F.e. all serial device BHs et | |
454 | al. should be converted to tasklets, not to softirqs. | |
455 | */ | |
456 | ||
457 | enum | |
458 | { | |
459 | HI_SOFTIRQ=0, | |
460 | TIMER_SOFTIRQ, | |
461 | NET_TX_SOFTIRQ, | |
462 | NET_RX_SOFTIRQ, | |
ff856bad | 463 | BLOCK_SOFTIRQ, |
511cbce2 | 464 | IRQ_POLL_SOFTIRQ, |
c9819f45 CL |
465 | TASKLET_SOFTIRQ, |
466 | SCHED_SOFTIRQ, | |
c6eb3f70 TG |
467 | HRTIMER_SOFTIRQ, /* Unused, but kept as tools rely on the |
468 | numbering. Sigh! */ | |
09223371 | 469 | RCU_SOFTIRQ, /* Preferable RCU should always be the last softirq */ |
978b0116 AD |
470 | |
471 | NR_SOFTIRQS | |
1da177e4 LT |
472 | }; |
473 | ||
803b0eba PM |
474 | #define SOFTIRQ_STOP_IDLE_MASK (~(1 << RCU_SOFTIRQ)) |
475 | ||
5d592b44 JB |
476 | /* map softirq index to softirq name. update 'softirq_to_name' in |
477 | * kernel/softirq.c when adding a new softirq. | |
478 | */ | |
ce85b4f2 | 479 | extern const char * const softirq_to_name[NR_SOFTIRQS]; |
5d592b44 | 480 | |
1da177e4 LT |
481 | /* softirq mask and active fields moved to irq_cpustat_t in |
482 | * asm/hardirq.h to get better cache usage. KAO | |
483 | */ | |
484 | ||
485 | struct softirq_action | |
486 | { | |
487 | void (*action)(struct softirq_action *); | |
1da177e4 LT |
488 | }; |
489 | ||
490 | asmlinkage void do_softirq(void); | |
eb0f1c44 | 491 | asmlinkage void __do_softirq(void); |
7d65f4a6 FW |
492 | |
493 | #ifdef __ARCH_HAS_DO_SOFTIRQ | |
494 | void do_softirq_own_stack(void); | |
495 | #else | |
496 | static inline void do_softirq_own_stack(void) | |
497 | { | |
498 | __do_softirq(); | |
499 | } | |
500 | #endif | |
501 | ||
962cf36c | 502 | extern void open_softirq(int nr, void (*action)(struct softirq_action *)); |
1da177e4 | 503 | extern void softirq_init(void); |
f069686e | 504 | extern void __raise_softirq_irqoff(unsigned int nr); |
2bf2160d | 505 | |
b3c97528 HH |
506 | extern void raise_softirq_irqoff(unsigned int nr); |
507 | extern void raise_softirq(unsigned int nr); | |
1da177e4 | 508 | |
4dd53d89 VP |
509 | DECLARE_PER_CPU(struct task_struct *, ksoftirqd); |
510 | ||
511 | static inline struct task_struct *this_cpu_ksoftirqd(void) | |
512 | { | |
513 | return this_cpu_read(ksoftirqd); | |
514 | } | |
515 | ||
1da177e4 LT |
516 | /* Tasklets --- multithreaded analogue of BHs. |
517 | ||
518 | Main feature differing them of generic softirqs: tasklet | |
519 | is running only on one CPU simultaneously. | |
520 | ||
521 | Main feature differing them of BHs: different tasklets | |
522 | may be run simultaneously on different CPUs. | |
523 | ||
524 | Properties: | |
525 | * If tasklet_schedule() is called, then tasklet is guaranteed | |
526 | to be executed on some cpu at least once after this. | |
25985edc | 527 | * If the tasklet is already scheduled, but its execution is still not |
1da177e4 LT |
528 | started, it will be executed only once. |
529 | * If this tasklet is already running on another CPU (or schedule is called | |
530 | from tasklet itself), it is rescheduled for later. | |
531 | * Tasklet is strictly serialized wrt itself, but not | |
532 | wrt another tasklets. If client needs some intertask synchronization, | |
533 | he makes it with spinlocks. | |
534 | */ | |
535 | ||
536 | struct tasklet_struct | |
537 | { | |
538 | struct tasklet_struct *next; | |
539 | unsigned long state; | |
540 | atomic_t count; | |
541 | void (*func)(unsigned long); | |
542 | unsigned long data; | |
543 | }; | |
544 | ||
545 | #define DECLARE_TASKLET(name, func, data) \ | |
546 | struct tasklet_struct name = { NULL, 0, ATOMIC_INIT(0), func, data } | |
547 | ||
548 | #define DECLARE_TASKLET_DISABLED(name, func, data) \ | |
549 | struct tasklet_struct name = { NULL, 0, ATOMIC_INIT(1), func, data } | |
550 | ||
551 | ||
552 | enum | |
553 | { | |
554 | TASKLET_STATE_SCHED, /* Tasklet is scheduled for execution */ | |
555 | TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ | |
556 | }; | |
557 | ||
558 | #ifdef CONFIG_SMP | |
559 | static inline int tasklet_trylock(struct tasklet_struct *t) | |
560 | { | |
561 | return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); | |
562 | } | |
563 | ||
564 | static inline void tasklet_unlock(struct tasklet_struct *t) | |
565 | { | |
4e857c58 | 566 | smp_mb__before_atomic(); |
1da177e4 LT |
567 | clear_bit(TASKLET_STATE_RUN, &(t)->state); |
568 | } | |
569 | ||
570 | static inline void tasklet_unlock_wait(struct tasklet_struct *t) | |
571 | { | |
572 | while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { barrier(); } | |
573 | } | |
574 | #else | |
575 | #define tasklet_trylock(t) 1 | |
576 | #define tasklet_unlock_wait(t) do { } while (0) | |
577 | #define tasklet_unlock(t) do { } while (0) | |
578 | #endif | |
579 | ||
b3c97528 | 580 | extern void __tasklet_schedule(struct tasklet_struct *t); |
1da177e4 LT |
581 | |
582 | static inline void tasklet_schedule(struct tasklet_struct *t) | |
583 | { | |
584 | if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) | |
585 | __tasklet_schedule(t); | |
586 | } | |
587 | ||
b3c97528 | 588 | extern void __tasklet_hi_schedule(struct tasklet_struct *t); |
1da177e4 LT |
589 | |
590 | static inline void tasklet_hi_schedule(struct tasklet_struct *t) | |
591 | { | |
592 | if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) | |
593 | __tasklet_hi_schedule(t); | |
594 | } | |
595 | ||
7c692cba VN |
596 | extern void __tasklet_hi_schedule_first(struct tasklet_struct *t); |
597 | ||
598 | /* | |
599 | * This version avoids touching any other tasklets. Needed for kmemcheck | |
600 | * in order not to take any page faults while enqueueing this tasklet; | |
601 | * consider VERY carefully whether you really need this or | |
602 | * tasklet_hi_schedule()... | |
603 | */ | |
604 | static inline void tasklet_hi_schedule_first(struct tasklet_struct *t) | |
605 | { | |
606 | if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) | |
607 | __tasklet_hi_schedule_first(t); | |
608 | } | |
609 | ||
1da177e4 LT |
610 | |
611 | static inline void tasklet_disable_nosync(struct tasklet_struct *t) | |
612 | { | |
613 | atomic_inc(&t->count); | |
4e857c58 | 614 | smp_mb__after_atomic(); |
1da177e4 LT |
615 | } |
616 | ||
617 | static inline void tasklet_disable(struct tasklet_struct *t) | |
618 | { | |
619 | tasklet_disable_nosync(t); | |
620 | tasklet_unlock_wait(t); | |
621 | smp_mb(); | |
622 | } | |
623 | ||
624 | static inline void tasklet_enable(struct tasklet_struct *t) | |
625 | { | |
4e857c58 | 626 | smp_mb__before_atomic(); |
1da177e4 LT |
627 | atomic_dec(&t->count); |
628 | } | |
629 | ||
1da177e4 LT |
630 | extern void tasklet_kill(struct tasklet_struct *t); |
631 | extern void tasklet_kill_immediate(struct tasklet_struct *t, unsigned int cpu); | |
632 | extern void tasklet_init(struct tasklet_struct *t, | |
633 | void (*func)(unsigned long), unsigned long data); | |
634 | ||
9ba5f005 PZ |
635 | struct tasklet_hrtimer { |
636 | struct hrtimer timer; | |
637 | struct tasklet_struct tasklet; | |
638 | enum hrtimer_restart (*function)(struct hrtimer *); | |
639 | }; | |
640 | ||
641 | extern void | |
642 | tasklet_hrtimer_init(struct tasklet_hrtimer *ttimer, | |
643 | enum hrtimer_restart (*function)(struct hrtimer *), | |
644 | clockid_t which_clock, enum hrtimer_mode mode); | |
645 | ||
646 | static inline | |
61699e13 TG |
647 | void tasklet_hrtimer_start(struct tasklet_hrtimer *ttimer, ktime_t time, |
648 | const enum hrtimer_mode mode) | |
9ba5f005 | 649 | { |
61699e13 | 650 | hrtimer_start(&ttimer->timer, time, mode); |
9ba5f005 PZ |
651 | } |
652 | ||
653 | static inline | |
654 | void tasklet_hrtimer_cancel(struct tasklet_hrtimer *ttimer) | |
655 | { | |
656 | hrtimer_cancel(&ttimer->timer); | |
657 | tasklet_kill(&ttimer->tasklet); | |
658 | } | |
659 | ||
1da177e4 LT |
660 | /* |
661 | * Autoprobing for irqs: | |
662 | * | |
663 | * probe_irq_on() and probe_irq_off() provide robust primitives | |
664 | * for accurate IRQ probing during kernel initialization. They are | |
665 | * reasonably simple to use, are not "fooled" by spurious interrupts, | |
666 | * and, unlike other attempts at IRQ probing, they do not get hung on | |
667 | * stuck interrupts (such as unused PS2 mouse interfaces on ASUS boards). | |
668 | * | |
669 | * For reasonably foolproof probing, use them as follows: | |
670 | * | |
671 | * 1. clear and/or mask the device's internal interrupt. | |
672 | * 2. sti(); | |
673 | * 3. irqs = probe_irq_on(); // "take over" all unassigned idle IRQs | |
674 | * 4. enable the device and cause it to trigger an interrupt. | |
675 | * 5. wait for the device to interrupt, using non-intrusive polling or a delay. | |
676 | * 6. irq = probe_irq_off(irqs); // get IRQ number, 0=none, negative=multiple | |
677 | * 7. service the device to clear its pending interrupt. | |
678 | * 8. loop again if paranoia is required. | |
679 | * | |
680 | * probe_irq_on() returns a mask of allocated irq's. | |
681 | * | |
682 | * probe_irq_off() takes the mask as a parameter, | |
683 | * and returns the irq number which occurred, | |
684 | * or zero if none occurred, or a negative irq number | |
685 | * if more than one irq occurred. | |
686 | */ | |
687 | ||
0244ad00 | 688 | #if !defined(CONFIG_GENERIC_IRQ_PROBE) |
1da177e4 LT |
689 | static inline unsigned long probe_irq_on(void) |
690 | { | |
691 | return 0; | |
692 | } | |
693 | static inline int probe_irq_off(unsigned long val) | |
694 | { | |
695 | return 0; | |
696 | } | |
697 | static inline unsigned int probe_irq_mask(unsigned long val) | |
698 | { | |
699 | return 0; | |
700 | } | |
701 | #else | |
702 | extern unsigned long probe_irq_on(void); /* returns 0 on failure */ | |
703 | extern int probe_irq_off(unsigned long); /* returns 0 or negative on failure */ | |
704 | extern unsigned int probe_irq_mask(unsigned long); /* returns mask of ISA interrupts */ | |
705 | #endif | |
706 | ||
6168a702 AM |
707 | #ifdef CONFIG_PROC_FS |
708 | /* Initialize /proc/irq/ */ | |
709 | extern void init_irq_proc(void); | |
710 | #else | |
711 | static inline void init_irq_proc(void) | |
712 | { | |
713 | } | |
714 | #endif | |
715 | ||
b2d3d61a DL |
716 | #ifdef CONFIG_IRQ_TIMINGS |
717 | void irq_timings_enable(void); | |
718 | void irq_timings_disable(void); | |
e1c92149 | 719 | u64 irq_timings_next_event(u64 now); |
b2d3d61a DL |
720 | #endif |
721 | ||
d43c36dc | 722 | struct seq_file; |
f74596d0 | 723 | int show_interrupts(struct seq_file *p, void *v); |
c78b9b65 | 724 | int arch_show_interrupts(struct seq_file *p, int prec); |
f74596d0 | 725 | |
43a25632 | 726 | extern int early_irq_init(void); |
4a046d17 | 727 | extern int arch_probe_nr_irqs(void); |
43a25632 | 728 | extern int arch_early_irq_init(void); |
43a25632 | 729 | |
be7635e7 AP |
730 | /* |
731 | * We want to know which function is an entrypoint of a hardirq or a softirq. | |
732 | */ | |
733 | #define __irq_entry __attribute__((__section__(".irqentry.text"))) | |
734 | #define __softirq_entry \ | |
735 | __attribute__((__section__(".softirqentry.text"))) | |
736 | ||
1da177e4 | 737 | #endif |