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1da177e4 LT |
1 | /* interrupt.h */ |
2 | #ifndef _LINUX_INTERRUPT_H | |
3 | #define _LINUX_INTERRUPT_H | |
4 | ||
1da177e4 LT |
5 | #include <linux/kernel.h> |
6 | #include <linux/linkage.h> | |
7 | #include <linux/bitops.h> | |
8 | #include <linux/preempt.h> | |
9 | #include <linux/cpumask.h> | |
908dcecd | 10 | #include <linux/irqreturn.h> |
1da177e4 | 11 | #include <linux/hardirq.h> |
f037360f | 12 | #include <linux/sched.h> |
de30a2b3 | 13 | #include <linux/irqflags.h> |
1da177e4 LT |
14 | #include <asm/atomic.h> |
15 | #include <asm/ptrace.h> | |
16 | #include <asm/system.h> | |
17 | ||
6e213616 TG |
18 | /* |
19 | * These correspond to the IORESOURCE_IRQ_* defines in | |
20 | * linux/ioport.h to select the interrupt line behaviour. When | |
21 | * requesting an interrupt without specifying a IRQF_TRIGGER, the | |
22 | * setting should be assumed to be "as already configured", which | |
23 | * may be as per machine or firmware initialisation. | |
24 | */ | |
25 | #define IRQF_TRIGGER_NONE 0x00000000 | |
26 | #define IRQF_TRIGGER_RISING 0x00000001 | |
27 | #define IRQF_TRIGGER_FALLING 0x00000002 | |
28 | #define IRQF_TRIGGER_HIGH 0x00000004 | |
29 | #define IRQF_TRIGGER_LOW 0x00000008 | |
30 | #define IRQF_TRIGGER_MASK (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW | \ | |
31 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING) | |
32 | #define IRQF_TRIGGER_PROBE 0x00000010 | |
33 | ||
34 | /* | |
35 | * These flags used only by the kernel as part of the | |
36 | * irq handling routines. | |
37 | * | |
38 | * IRQF_DISABLED - keep irqs disabled when calling the action handler | |
39 | * IRQF_SAMPLE_RANDOM - irq is used to feed the random generator | |
40 | * IRQF_SHARED - allow sharing the irq among several devices | |
41 | * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur | |
42 | * IRQF_TIMER - Flag to mark this interrupt as timer interrupt | |
950f4427 TG |
43 | * IRQF_PERCPU - Interrupt is per cpu |
44 | * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing | |
d85a60d8 BW |
45 | * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is |
46 | * registered first in an shared interrupt is considered for | |
47 | * performance reasons) | |
6e213616 TG |
48 | */ |
49 | #define IRQF_DISABLED 0x00000020 | |
50 | #define IRQF_SAMPLE_RANDOM 0x00000040 | |
51 | #define IRQF_SHARED 0x00000080 | |
52 | #define IRQF_PROBE_SHARED 0x00000100 | |
53 | #define IRQF_TIMER 0x00000200 | |
284c6680 | 54 | #define IRQF_PERCPU 0x00000400 |
950f4427 | 55 | #define IRQF_NOBALANCING 0x00000800 |
d85a60d8 | 56 | #define IRQF_IRQPOLL 0x00001000 |
6e213616 | 57 | |
7d12e780 | 58 | typedef irqreturn_t (*irq_handler_t)(int, void *); |
da482792 | 59 | |
1da177e4 | 60 | struct irqaction { |
da482792 | 61 | irq_handler_t handler; |
1da177e4 LT |
62 | unsigned long flags; |
63 | cpumask_t mask; | |
64 | const char *name; | |
65 | void *dev_id; | |
66 | struct irqaction *next; | |
67 | int irq; | |
68 | struct proc_dir_entry *dir; | |
69 | }; | |
70 | ||
7d12e780 | 71 | extern irqreturn_t no_action(int cpl, void *dev_id); |
616883df | 72 | extern int __must_check request_irq(unsigned int, irq_handler_t handler, |
1da177e4 LT |
73 | unsigned long, const char *, void *); |
74 | extern void free_irq(unsigned int, void *); | |
75 | ||
0af3678f AV |
76 | struct device; |
77 | ||
616883df | 78 | extern int __must_check devm_request_irq(struct device *dev, unsigned int irq, |
9ac7849e TH |
79 | irq_handler_t handler, unsigned long irqflags, |
80 | const char *devname, void *dev_id); | |
81 | extern void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id); | |
82 | ||
d7e9629d IM |
83 | /* |
84 | * On lockdep we dont want to enable hardirqs in hardirq | |
85 | * context. Use local_irq_enable_in_hardirq() to annotate | |
86 | * kernel code that has to do this nevertheless (pretty much | |
87 | * the only valid case is for old/broken hardware that is | |
88 | * insanely slow). | |
89 | * | |
90 | * NOTE: in theory this might break fragile code that relies | |
91 | * on hardirq delivery - in practice we dont seem to have such | |
92 | * places left. So the only effect should be slightly increased | |
93 | * irqs-off latencies. | |
94 | */ | |
95 | #ifdef CONFIG_LOCKDEP | |
96 | # define local_irq_enable_in_hardirq() do { } while (0) | |
97 | #else | |
98 | # define local_irq_enable_in_hardirq() local_irq_enable() | |
99 | #endif | |
1da177e4 | 100 | |
1da177e4 LT |
101 | extern void disable_irq_nosync(unsigned int irq); |
102 | extern void disable_irq(unsigned int irq); | |
103 | extern void enable_irq(unsigned int irq); | |
ba9a2331 | 104 | |
d7b90689 RK |
105 | #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS) |
106 | ||
18404756 MK |
107 | extern cpumask_t irq_default_affinity; |
108 | ||
d7b90689 RK |
109 | extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask); |
110 | extern int irq_can_set_affinity(unsigned int irq); | |
18404756 | 111 | extern int irq_select_affinity(unsigned int irq); |
d7b90689 RK |
112 | |
113 | #else /* CONFIG_SMP */ | |
114 | ||
115 | static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask) | |
116 | { | |
117 | return -EINVAL; | |
118 | } | |
119 | ||
120 | static inline int irq_can_set_affinity(unsigned int irq) | |
121 | { | |
122 | return 0; | |
123 | } | |
124 | ||
18404756 MK |
125 | static inline int irq_select_affinity(unsigned int irq) { return 0; } |
126 | ||
d7b90689 RK |
127 | #endif /* CONFIG_SMP && CONFIG_GENERIC_HARDIRQS */ |
128 | ||
e9ed7e72 | 129 | #ifdef CONFIG_GENERIC_HARDIRQS |
c01d403b IM |
130 | /* |
131 | * Special lockdep variants of irq disabling/enabling. | |
132 | * These should be used for locking constructs that | |
133 | * know that a particular irq context which is disabled, | |
134 | * and which is the only irq-context user of a lock, | |
135 | * that it's safe to take the lock in the irq-disabled | |
136 | * section without disabling hardirqs. | |
137 | * | |
138 | * On !CONFIG_LOCKDEP they are equivalent to the normal | |
139 | * irq disable/enable methods. | |
140 | */ | |
141 | static inline void disable_irq_nosync_lockdep(unsigned int irq) | |
142 | { | |
143 | disable_irq_nosync(irq); | |
144 | #ifdef CONFIG_LOCKDEP | |
145 | local_irq_disable(); | |
146 | #endif | |
147 | } | |
148 | ||
e8106b94 AV |
149 | static inline void disable_irq_nosync_lockdep_irqsave(unsigned int irq, unsigned long *flags) |
150 | { | |
151 | disable_irq_nosync(irq); | |
152 | #ifdef CONFIG_LOCKDEP | |
153 | local_irq_save(*flags); | |
154 | #endif | |
155 | } | |
156 | ||
c01d403b IM |
157 | static inline void disable_irq_lockdep(unsigned int irq) |
158 | { | |
159 | disable_irq(irq); | |
160 | #ifdef CONFIG_LOCKDEP | |
161 | local_irq_disable(); | |
162 | #endif | |
163 | } | |
164 | ||
165 | static inline void enable_irq_lockdep(unsigned int irq) | |
166 | { | |
167 | #ifdef CONFIG_LOCKDEP | |
168 | local_irq_enable(); | |
169 | #endif | |
170 | enable_irq(irq); | |
171 | } | |
172 | ||
e8106b94 AV |
173 | static inline void enable_irq_lockdep_irqrestore(unsigned int irq, unsigned long *flags) |
174 | { | |
175 | #ifdef CONFIG_LOCKDEP | |
176 | local_irq_restore(*flags); | |
177 | #endif | |
178 | enable_irq(irq); | |
179 | } | |
180 | ||
ba9a2331 TG |
181 | /* IRQ wakeup (PM) control: */ |
182 | extern int set_irq_wake(unsigned int irq, unsigned int on); | |
183 | ||
184 | static inline int enable_irq_wake(unsigned int irq) | |
185 | { | |
186 | return set_irq_wake(irq, 1); | |
187 | } | |
188 | ||
189 | static inline int disable_irq_wake(unsigned int irq) | |
190 | { | |
191 | return set_irq_wake(irq, 0); | |
192 | } | |
193 | ||
c01d403b IM |
194 | #else /* !CONFIG_GENERIC_HARDIRQS */ |
195 | /* | |
196 | * NOTE: non-genirq architectures, if they want to support the lock | |
197 | * validator need to define the methods below in their asm/irq.h | |
198 | * files, under an #ifdef CONFIG_LOCKDEP section. | |
199 | */ | |
b3e2fd9c | 200 | #ifndef CONFIG_LOCKDEP |
c01d403b | 201 | # define disable_irq_nosync_lockdep(irq) disable_irq_nosync(irq) |
b3e2fd9c RZ |
202 | # define disable_irq_nosync_lockdep_irqsave(irq, flags) \ |
203 | disable_irq_nosync(irq) | |
c01d403b IM |
204 | # define disable_irq_lockdep(irq) disable_irq(irq) |
205 | # define enable_irq_lockdep(irq) enable_irq(irq) | |
b3e2fd9c RZ |
206 | # define enable_irq_lockdep_irqrestore(irq, flags) \ |
207 | enable_irq(irq) | |
c01d403b IM |
208 | # endif |
209 | ||
aa5346a2 GL |
210 | static inline int enable_irq_wake(unsigned int irq) |
211 | { | |
212 | return 0; | |
213 | } | |
214 | ||
215 | static inline int disable_irq_wake(unsigned int irq) | |
216 | { | |
217 | return 0; | |
218 | } | |
c01d403b | 219 | #endif /* CONFIG_GENERIC_HARDIRQS */ |
1da177e4 | 220 | |
3f74478b AK |
221 | #ifndef __ARCH_SET_SOFTIRQ_PENDING |
222 | #define set_softirq_pending(x) (local_softirq_pending() = (x)) | |
223 | #define or_softirq_pending(x) (local_softirq_pending() |= (x)) | |
224 | #endif | |
225 | ||
1da177e4 LT |
226 | /* |
227 | * Temporary defines for UP kernels, until all code gets fixed. | |
228 | */ | |
229 | #ifndef CONFIG_SMP | |
230 | static inline void __deprecated cli(void) | |
231 | { | |
232 | local_irq_disable(); | |
233 | } | |
234 | static inline void __deprecated sti(void) | |
235 | { | |
236 | local_irq_enable(); | |
237 | } | |
238 | static inline void __deprecated save_flags(unsigned long *x) | |
239 | { | |
240 | local_save_flags(*x); | |
241 | } | |
ef9ceab2 | 242 | #define save_flags(x) save_flags(&x) |
1da177e4 LT |
243 | static inline void __deprecated restore_flags(unsigned long x) |
244 | { | |
245 | local_irq_restore(x); | |
246 | } | |
247 | ||
248 | static inline void __deprecated save_and_cli(unsigned long *x) | |
249 | { | |
250 | local_irq_save(*x); | |
251 | } | |
252 | #define save_and_cli(x) save_and_cli(&x) | |
253 | #endif /* CONFIG_SMP */ | |
254 | ||
2d3fbbb3 BH |
255 | /* Some architectures might implement lazy enabling/disabling of |
256 | * interrupts. In some cases, such as stop_machine, we might want | |
257 | * to ensure that after a local_irq_disable(), interrupts have | |
258 | * really been disabled in hardware. Such architectures need to | |
259 | * implement the following hook. | |
260 | */ | |
261 | #ifndef hard_irq_disable | |
262 | #define hard_irq_disable() do { } while(0) | |
263 | #endif | |
264 | ||
1da177e4 LT |
265 | /* PLEASE, avoid to allocate new softirqs, if you need not _really_ high |
266 | frequency threaded job scheduling. For almost all the purposes | |
267 | tasklets are more than enough. F.e. all serial device BHs et | |
268 | al. should be converted to tasklets, not to softirqs. | |
269 | */ | |
270 | ||
271 | enum | |
272 | { | |
273 | HI_SOFTIRQ=0, | |
274 | TIMER_SOFTIRQ, | |
275 | NET_TX_SOFTIRQ, | |
276 | NET_RX_SOFTIRQ, | |
ff856bad | 277 | BLOCK_SOFTIRQ, |
c9819f45 CL |
278 | TASKLET_SOFTIRQ, |
279 | SCHED_SOFTIRQ, | |
54cdfdb4 TG |
280 | #ifdef CONFIG_HIGH_RES_TIMERS |
281 | HRTIMER_SOFTIRQ, | |
282 | #endif | |
c2d727aa | 283 | RCU_SOFTIRQ, /* Preferable RCU should always be the last softirq */ |
1da177e4 LT |
284 | }; |
285 | ||
286 | /* softirq mask and active fields moved to irq_cpustat_t in | |
287 | * asm/hardirq.h to get better cache usage. KAO | |
288 | */ | |
289 | ||
290 | struct softirq_action | |
291 | { | |
292 | void (*action)(struct softirq_action *); | |
1da177e4 LT |
293 | }; |
294 | ||
295 | asmlinkage void do_softirq(void); | |
eb0f1c44 | 296 | asmlinkage void __do_softirq(void); |
962cf36c | 297 | extern void open_softirq(int nr, void (*action)(struct softirq_action *)); |
1da177e4 | 298 | extern void softirq_init(void); |
3f74478b | 299 | #define __raise_softirq_irqoff(nr) do { or_softirq_pending(1UL << (nr)); } while (0) |
b3c97528 HH |
300 | extern void raise_softirq_irqoff(unsigned int nr); |
301 | extern void raise_softirq(unsigned int nr); | |
1da177e4 LT |
302 | |
303 | ||
304 | /* Tasklets --- multithreaded analogue of BHs. | |
305 | ||
306 | Main feature differing them of generic softirqs: tasklet | |
307 | is running only on one CPU simultaneously. | |
308 | ||
309 | Main feature differing them of BHs: different tasklets | |
310 | may be run simultaneously on different CPUs. | |
311 | ||
312 | Properties: | |
313 | * If tasklet_schedule() is called, then tasklet is guaranteed | |
314 | to be executed on some cpu at least once after this. | |
315 | * If the tasklet is already scheduled, but its excecution is still not | |
316 | started, it will be executed only once. | |
317 | * If this tasklet is already running on another CPU (or schedule is called | |
318 | from tasklet itself), it is rescheduled for later. | |
319 | * Tasklet is strictly serialized wrt itself, but not | |
320 | wrt another tasklets. If client needs some intertask synchronization, | |
321 | he makes it with spinlocks. | |
322 | */ | |
323 | ||
324 | struct tasklet_struct | |
325 | { | |
326 | struct tasklet_struct *next; | |
327 | unsigned long state; | |
328 | atomic_t count; | |
329 | void (*func)(unsigned long); | |
330 | unsigned long data; | |
331 | }; | |
332 | ||
333 | #define DECLARE_TASKLET(name, func, data) \ | |
334 | struct tasklet_struct name = { NULL, 0, ATOMIC_INIT(0), func, data } | |
335 | ||
336 | #define DECLARE_TASKLET_DISABLED(name, func, data) \ | |
337 | struct tasklet_struct name = { NULL, 0, ATOMIC_INIT(1), func, data } | |
338 | ||
339 | ||
340 | enum | |
341 | { | |
342 | TASKLET_STATE_SCHED, /* Tasklet is scheduled for execution */ | |
343 | TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ | |
344 | }; | |
345 | ||
346 | #ifdef CONFIG_SMP | |
347 | static inline int tasklet_trylock(struct tasklet_struct *t) | |
348 | { | |
349 | return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); | |
350 | } | |
351 | ||
352 | static inline void tasklet_unlock(struct tasklet_struct *t) | |
353 | { | |
354 | smp_mb__before_clear_bit(); | |
355 | clear_bit(TASKLET_STATE_RUN, &(t)->state); | |
356 | } | |
357 | ||
358 | static inline void tasklet_unlock_wait(struct tasklet_struct *t) | |
359 | { | |
360 | while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { barrier(); } | |
361 | } | |
362 | #else | |
363 | #define tasklet_trylock(t) 1 | |
364 | #define tasklet_unlock_wait(t) do { } while (0) | |
365 | #define tasklet_unlock(t) do { } while (0) | |
366 | #endif | |
367 | ||
b3c97528 | 368 | extern void __tasklet_schedule(struct tasklet_struct *t); |
1da177e4 LT |
369 | |
370 | static inline void tasklet_schedule(struct tasklet_struct *t) | |
371 | { | |
372 | if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) | |
373 | __tasklet_schedule(t); | |
374 | } | |
375 | ||
b3c97528 | 376 | extern void __tasklet_hi_schedule(struct tasklet_struct *t); |
1da177e4 LT |
377 | |
378 | static inline void tasklet_hi_schedule(struct tasklet_struct *t) | |
379 | { | |
380 | if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) | |
381 | __tasklet_hi_schedule(t); | |
382 | } | |
383 | ||
384 | ||
385 | static inline void tasklet_disable_nosync(struct tasklet_struct *t) | |
386 | { | |
387 | atomic_inc(&t->count); | |
388 | smp_mb__after_atomic_inc(); | |
389 | } | |
390 | ||
391 | static inline void tasklet_disable(struct tasklet_struct *t) | |
392 | { | |
393 | tasklet_disable_nosync(t); | |
394 | tasklet_unlock_wait(t); | |
395 | smp_mb(); | |
396 | } | |
397 | ||
398 | static inline void tasklet_enable(struct tasklet_struct *t) | |
399 | { | |
400 | smp_mb__before_atomic_dec(); | |
401 | atomic_dec(&t->count); | |
402 | } | |
403 | ||
404 | static inline void tasklet_hi_enable(struct tasklet_struct *t) | |
405 | { | |
406 | smp_mb__before_atomic_dec(); | |
407 | atomic_dec(&t->count); | |
408 | } | |
409 | ||
410 | extern void tasklet_kill(struct tasklet_struct *t); | |
411 | extern void tasklet_kill_immediate(struct tasklet_struct *t, unsigned int cpu); | |
412 | extern void tasklet_init(struct tasklet_struct *t, | |
413 | void (*func)(unsigned long), unsigned long data); | |
414 | ||
415 | /* | |
416 | * Autoprobing for irqs: | |
417 | * | |
418 | * probe_irq_on() and probe_irq_off() provide robust primitives | |
419 | * for accurate IRQ probing during kernel initialization. They are | |
420 | * reasonably simple to use, are not "fooled" by spurious interrupts, | |
421 | * and, unlike other attempts at IRQ probing, they do not get hung on | |
422 | * stuck interrupts (such as unused PS2 mouse interfaces on ASUS boards). | |
423 | * | |
424 | * For reasonably foolproof probing, use them as follows: | |
425 | * | |
426 | * 1. clear and/or mask the device's internal interrupt. | |
427 | * 2. sti(); | |
428 | * 3. irqs = probe_irq_on(); // "take over" all unassigned idle IRQs | |
429 | * 4. enable the device and cause it to trigger an interrupt. | |
430 | * 5. wait for the device to interrupt, using non-intrusive polling or a delay. | |
431 | * 6. irq = probe_irq_off(irqs); // get IRQ number, 0=none, negative=multiple | |
432 | * 7. service the device to clear its pending interrupt. | |
433 | * 8. loop again if paranoia is required. | |
434 | * | |
435 | * probe_irq_on() returns a mask of allocated irq's. | |
436 | * | |
437 | * probe_irq_off() takes the mask as a parameter, | |
438 | * and returns the irq number which occurred, | |
439 | * or zero if none occurred, or a negative irq number | |
440 | * if more than one irq occurred. | |
441 | */ | |
442 | ||
443 | #if defined(CONFIG_GENERIC_HARDIRQS) && !defined(CONFIG_GENERIC_IRQ_PROBE) | |
444 | static inline unsigned long probe_irq_on(void) | |
445 | { | |
446 | return 0; | |
447 | } | |
448 | static inline int probe_irq_off(unsigned long val) | |
449 | { | |
450 | return 0; | |
451 | } | |
452 | static inline unsigned int probe_irq_mask(unsigned long val) | |
453 | { | |
454 | return 0; | |
455 | } | |
456 | #else | |
457 | extern unsigned long probe_irq_on(void); /* returns 0 on failure */ | |
458 | extern int probe_irq_off(unsigned long); /* returns 0 or negative on failure */ | |
459 | extern unsigned int probe_irq_mask(unsigned long); /* returns mask of ISA interrupts */ | |
460 | #endif | |
461 | ||
6168a702 AM |
462 | #ifdef CONFIG_PROC_FS |
463 | /* Initialize /proc/irq/ */ | |
464 | extern void init_irq_proc(void); | |
465 | #else | |
466 | static inline void init_irq_proc(void) | |
467 | { | |
468 | } | |
469 | #endif | |
470 | ||
f74596d0 AB |
471 | int show_interrupts(struct seq_file *p, void *v); |
472 | ||
1da177e4 | 473 | #endif |