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c27a0d75 BS |
1 | /* |
2 | * Copyright 2006 PathScale, Inc. All Rights Reserved. | |
3 | * | |
4 | * This file is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License | |
6 | * as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program; if not, write to the Free Software Foundation, | |
15 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. | |
16 | */ | |
17 | ||
18 | #ifndef _LINUX_IO_H | |
19 | #define _LINUX_IO_H | |
20 | ||
cb1055fb | 21 | #include <linux/types.h> |
d6472302 | 22 | #include <linux/init.h> |
41e94a85 CH |
23 | #include <linux/bug.h> |
24 | #include <linux/err.h> | |
c27a0d75 | 25 | #include <asm/io.h> |
74588d8b | 26 | #include <asm/page.h> |
c27a0d75 | 27 | |
7f253770 | 28 | struct device; |
41e94a85 | 29 | struct resource; |
7f253770 | 30 | |
d47d5c81 | 31 | __visible void __iowrite32_copy(void __iomem *to, const void *from, size_t count); |
a9aec588 | 32 | void __ioread32_copy(void *to, const void __iomem *from, size_t count); |
22ae813b | 33 | void __iowrite64_copy(void __iomem *to, const void *from, size_t count); |
c27a0d75 | 34 | |
218f0aae | 35 | #ifdef CONFIG_MMU |
74588d8b | 36 | int ioremap_page_range(unsigned long addr, unsigned long end, |
ffa71f33 | 37 | phys_addr_t phys_addr, pgprot_t prot); |
218f0aae PM |
38 | #else |
39 | static inline int ioremap_page_range(unsigned long addr, unsigned long end, | |
ffa71f33 | 40 | phys_addr_t phys_addr, pgprot_t prot) |
218f0aae PM |
41 | { |
42 | return 0; | |
43 | } | |
44 | #endif | |
74588d8b | 45 | |
0ddab1d2 TK |
46 | #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP |
47 | void __init ioremap_huge_init(void); | |
48 | int arch_ioremap_pud_supported(void); | |
49 | int arch_ioremap_pmd_supported(void); | |
50 | #else | |
51 | static inline void ioremap_huge_init(void) { } | |
52 | #endif | |
53 | ||
9ac7849e TH |
54 | /* |
55 | * Managed iomap interface | |
56 | */ | |
ce816fa8 | 57 | #ifdef CONFIG_HAS_IOPORT_MAP |
9ac7849e TH |
58 | void __iomem * devm_ioport_map(struct device *dev, unsigned long port, |
59 | unsigned int nr); | |
60 | void devm_ioport_unmap(struct device *dev, void __iomem *addr); | |
93da2879 RK |
61 | #else |
62 | static inline void __iomem *devm_ioport_map(struct device *dev, | |
63 | unsigned long port, | |
64 | unsigned int nr) | |
65 | { | |
66 | return NULL; | |
67 | } | |
68 | ||
69 | static inline void devm_ioport_unmap(struct device *dev, void __iomem *addr) | |
70 | { | |
71 | } | |
72 | #endif | |
9ac7849e | 73 | |
efd342fb MB |
74 | #define IOMEM_ERR_PTR(err) (__force void __iomem *)ERR_PTR(err) |
75 | ||
4f452e8a | 76 | void __iomem *devm_ioremap(struct device *dev, resource_size_t offset, |
5559b7bc | 77 | resource_size_t size); |
4f452e8a | 78 | void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset, |
5559b7bc | 79 | resource_size_t size); |
34644524 AK |
80 | void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset, |
81 | resource_size_t size); | |
9ac7849e | 82 | void devm_iounmap(struct device *dev, void __iomem *addr); |
cc2ea416 AM |
83 | int check_signature(const volatile void __iomem *io_addr, |
84 | const unsigned char *signature, int length); | |
b41e5fff | 85 | void devm_ioremap_release(struct device *dev, void *res); |
e50190a8 | 86 | |
7d3dcf26 CH |
87 | void *devm_memremap(struct device *dev, resource_size_t offset, |
88 | size_t size, unsigned long flags); | |
89 | void devm_memunmap(struct device *dev, void *addr); | |
90 | ||
41e94a85 CH |
91 | void *__devm_memremap_pages(struct device *dev, struct resource *res); |
92 | ||
cf9ea8ca LP |
93 | #ifdef CONFIG_PCI |
94 | /* | |
95 | * The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and | |
96 | * Posting") mandate non-posted configuration transactions. There is | |
97 | * no ioremap API in the kernel that can guarantee non-posted write | |
98 | * semantics across arches so provide a default implementation for | |
99 | * mapping PCI config space that defaults to ioremap_nocache(); arches | |
100 | * should override it if they have memory mapping implementations that | |
101 | * guarantee non-posted writes semantics to make the memory mapping | |
102 | * compliant with the PCI specification. | |
103 | */ | |
104 | #ifndef pci_remap_cfgspace | |
105 | #define pci_remap_cfgspace pci_remap_cfgspace | |
106 | static inline void __iomem *pci_remap_cfgspace(phys_addr_t offset, | |
107 | size_t size) | |
108 | { | |
109 | return ioremap_nocache(offset, size); | |
110 | } | |
111 | #endif | |
112 | #endif | |
113 | ||
e1612de9 HM |
114 | /* |
115 | * Some systems do not have legacy ISA devices. | |
116 | * /dev/port is not a valid interface on these systems. | |
117 | * So for those archs, <asm/io.h> should define the following symbol. | |
118 | */ | |
119 | #ifndef arch_has_dev_port | |
120 | #define arch_has_dev_port() (1) | |
121 | #endif | |
122 | ||
d0d98eed AL |
123 | /* |
124 | * Some systems (x86 without PAT) have a somewhat reliable way to mark a | |
125 | * physical address range such that uncached mappings will actually | |
126 | * end up write-combining. This facility should be used in conjunction | |
127 | * with pgprot_writecombine, ioremap-wc, or set_memory_wc, since it has | |
128 | * no effect if the per-page mechanisms are functional. | |
129 | * (On x86 without PAT, these functions manipulate MTRRs.) | |
130 | * | |
131 | * arch_phys_del_wc(0) or arch_phys_del_wc(any error code) is guaranteed | |
132 | * to have no effect. | |
133 | */ | |
134 | #ifndef arch_phys_wc_add | |
135 | static inline int __must_check arch_phys_wc_add(unsigned long base, | |
136 | unsigned long size) | |
137 | { | |
138 | return 0; /* It worked (i.e. did nothing). */ | |
139 | } | |
140 | ||
141 | static inline void arch_phys_wc_del(int handle) | |
142 | { | |
143 | } | |
144 | ||
145 | #define arch_phys_wc_add arch_phys_wc_add | |
7d010fdf LR |
146 | #ifndef arch_phys_wc_index |
147 | static inline int arch_phys_wc_index(int handle) | |
148 | { | |
149 | return -1; | |
150 | } | |
151 | #define arch_phys_wc_index arch_phys_wc_index | |
152 | #endif | |
d0d98eed AL |
153 | #endif |
154 | ||
92281dee DW |
155 | enum { |
156 | /* See memremap() kernel-doc for usage description... */ | |
157 | MEMREMAP_WB = 1 << 0, | |
158 | MEMREMAP_WT = 1 << 1, | |
c907e0eb | 159 | MEMREMAP_WC = 1 << 2, |
92281dee DW |
160 | }; |
161 | ||
162 | void *memremap(resource_size_t offset, size_t size, unsigned long flags); | |
163 | void memunmap(void *addr); | |
164 | ||
8ef42276 DA |
165 | /* |
166 | * On x86 PAT systems we have memory tracking that keeps track of | |
167 | * the allowed mappings on memory ranges. This tracking works for | |
168 | * all the in-kernel mapping APIs (ioremap*), but where the user | |
169 | * wishes to map a range from a physical device into user memory | |
170 | * the tracking won't be updated. This API is to be used by | |
171 | * drivers which remap physical device pages into userspace, | |
172 | * and wants to make sure they are mapped WC and not UC. | |
173 | */ | |
174 | #ifndef arch_io_reserve_memtype_wc | |
175 | static inline int arch_io_reserve_memtype_wc(resource_size_t base, | |
176 | resource_size_t size) | |
177 | { | |
178 | return 0; | |
179 | } | |
180 | ||
181 | static inline void arch_io_free_memtype_wc(resource_size_t base, | |
182 | resource_size_t size) | |
183 | { | |
184 | } | |
185 | #endif | |
186 | ||
c27a0d75 | 187 | #endif /* _LINUX_IO_H */ |