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2d0cfb52 PG |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (c) 2005 Stanislaw Skowronek <skylark@linux-mips.org> | |
7 | */ | |
8 | ||
9 | #ifndef _LINUX_IOC3_H | |
10 | #define _LINUX_IOC3_H | |
11 | ||
12 | #include <asm/sn/ioc3.h> | |
13 | ||
14 | #define IOC3_MAX_SUBMODULES 32 | |
15 | ||
16 | #define IOC3_CLASS_NONE 0 | |
17 | #define IOC3_CLASS_BASE_IP27 1 | |
18 | #define IOC3_CLASS_BASE_IP30 2 | |
19 | #define IOC3_CLASS_MENET_123 3 | |
20 | #define IOC3_CLASS_MENET_4 4 | |
21 | #define IOC3_CLASS_CADDUO 5 | |
22 | #define IOC3_CLASS_SERIAL 6 | |
23 | ||
24 | /* One of these per IOC3 */ | |
25 | struct ioc3_driver_data { | |
26 | struct list_head list; | |
27 | int id; /* IOC3 sequence number */ | |
28 | /* PCI mapping */ | |
29 | unsigned long pma; /* physical address */ | |
d6561010 | 30 | struct ioc3 __iomem *vma; /* pointer to registers */ |
2d0cfb52 PG |
31 | struct pci_dev *pdev; /* PCI device */ |
32 | /* IRQ stuff */ | |
33 | int dual_irq; /* set if separate IRQs are used */ | |
34 | int irq_io, irq_eth; /* IRQ numbers */ | |
35 | /* GPIO magic */ | |
36 | spinlock_t gpio_lock; | |
37 | unsigned int gpdr_shadow; | |
38 | /* NIC identifiers */ | |
39 | char nic_part[32]; | |
40 | char nic_serial[16]; | |
41 | char nic_mac[6]; | |
42 | /* submodule set */ | |
43 | int class; | |
44 | void *data[IOC3_MAX_SUBMODULES]; /* for submodule use */ | |
45 | int active[IOC3_MAX_SUBMODULES]; /* set if probe succeeds */ | |
46 | /* is_ir_lock must be held while | |
47 | * modifying sio_ie values, so | |
48 | * we can be sure that sio_ie is | |
49 | * not changing when we read it | |
50 | * along with sio_ir. | |
51 | */ | |
52 | spinlock_t ir_lock; /* SIO_IE[SC] mod lock */ | |
53 | }; | |
54 | ||
55 | /* One per submodule */ | |
56 | struct ioc3_submodule { | |
57 | char *name; /* descriptive submodule name */ | |
58 | struct module *owner; /* owning kernel module */ | |
59 | int ethernet; /* set for ethernet drivers */ | |
60 | int (*probe) (struct ioc3_submodule *, struct ioc3_driver_data *); | |
61 | int (*remove) (struct ioc3_submodule *, struct ioc3_driver_data *); | |
62 | int id; /* assigned by IOC3, index for the "data" array */ | |
63 | /* IRQ stuff */ | |
64 | unsigned int irq_mask; /* IOC3 IRQ mask, leave clear for Ethernet */ | |
65 | int reset_mask; /* non-zero if you want the ioc3.c module to reset interrupts */ | |
7d12e780 | 66 | int (*intr) (struct ioc3_submodule *, struct ioc3_driver_data *, unsigned int); |
2d0cfb52 PG |
67 | /* private submodule data */ |
68 | void *data; /* assigned by submodule */ | |
69 | }; | |
70 | ||
71 | /********************************** | |
72 | * Functions needed by submodules * | |
73 | **********************************/ | |
74 | ||
75 | #define IOC3_W_IES 0 | |
76 | #define IOC3_W_IEC 1 | |
77 | ||
78 | /* registers a submodule for all existing and future IOC3 chips */ | |
79 | extern int ioc3_register_submodule(struct ioc3_submodule *); | |
80 | /* unregisters a submodule */ | |
81 | extern void ioc3_unregister_submodule(struct ioc3_submodule *); | |
82 | /* enables IRQs indicated by irq_mask for a specified IOC3 chip */ | |
83 | extern void ioc3_enable(struct ioc3_submodule *, struct ioc3_driver_data *, unsigned int); | |
84 | /* ackowledges specified IRQs */ | |
85 | extern void ioc3_ack(struct ioc3_submodule *, struct ioc3_driver_data *, unsigned int); | |
86 | /* disables IRQs indicated by irq_mask for a specified IOC3 chip */ | |
87 | extern void ioc3_disable(struct ioc3_submodule *, struct ioc3_driver_data *, unsigned int); | |
88 | /* atomically sets GPCR bits */ | |
89 | extern void ioc3_gpcr_set(struct ioc3_driver_data *, unsigned int); | |
90 | /* general ireg writer */ | |
91 | extern void ioc3_write_ireg(struct ioc3_driver_data *idd, uint32_t value, int reg); | |
92 | ||
93 | #endif |