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45051539 1/* SPDX-License-Identifier: GPL-2.0-only */
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2/*
3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <joerg.roedel@amd.com>
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5 */
6
7#ifndef __LINUX_IOMMU_H
8#define __LINUX_IOMMU_H
9
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10#include <linux/scatterlist.h>
11#include <linux/device.h>
12#include <linux/types.h>
74315ccc 13#include <linux/errno.h>
9a08d376 14#include <linux/err.h>
d0f60a44 15#include <linux/of.h>
808be0aa 16#include <linux/ioasid.h>
4e32348b 17#include <uapi/linux/iommu.h>
74315ccc 18
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19#define IOMMU_READ (1 << 0)
20#define IOMMU_WRITE (1 << 1)
21#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
a720b41c 22#define IOMMU_NOEXEC (1 << 3)
31e6850e 23#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
579b2a65 24/*
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25 * Where the bus hardware includes a privilege level as part of its access type
26 * markings, and certain devices are capable of issuing transactions marked as
27 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
28 * given permission flags only apply to accesses at the higher privilege level,
29 * and that unprivileged transactions should have as little access as possible.
30 * This would usually imply the same permissions as kernel mappings on the CPU,
31 * if the IOMMU page table format is equivalent.
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32 */
33#define IOMMU_PRIV (1 << 5)
90ec7a76 34/*
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35 * Non-coherent masters can use this page protection flag to set cacheable
36 * memory attributes for only a transparent outer level of cache, also known as
37 * the last-level or system cache.
90ec7a76 38 */
dd5ddd3c 39#define IOMMU_SYS_CACHE_ONLY (1 << 6)
4a77a6cf 40
905d66c1 41struct iommu_ops;
d72e31c9 42struct iommu_group;
ff21776d 43struct bus_type;
4a77a6cf 44struct device;
4f3f8d9d 45struct iommu_domain;
ba1eabfa 46struct notifier_block;
26b25a2b 47struct iommu_sva;
4e32348b 48struct iommu_fault_event;
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49
50/* iommu fault flags */
51#define IOMMU_FAULT_READ 0x0
52#define IOMMU_FAULT_WRITE 0x1
53
54typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
77ca2332 55 struct device *, unsigned long, int, void *);
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56typedef int (*iommu_mm_exit_handler_t)(struct device *dev, struct iommu_sva *,
57 void *);
4e32348b 58typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *);
4a77a6cf 59
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60struct iommu_domain_geometry {
61 dma_addr_t aperture_start; /* First address that can be mapped */
62 dma_addr_t aperture_end; /* Last address that can be mapped */
63 bool force_aperture; /* DMA only allowed in mappable range? */
64};
65
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66/* Domain feature flags */
67#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
68#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
69 implementation */
70#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
71
72/*
73 * This are the possible domain-types
74 *
75 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
76 * devices
77 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
78 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
79 * for VMs
80 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
81 * This flag allows IOMMU drivers to implement
82 * certain optimizations for these domains
83 */
84#define IOMMU_DOMAIN_BLOCKED (0U)
85#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
86#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
87#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
88 __IOMMU_DOMAIN_DMA_API)
89
4a77a6cf 90struct iommu_domain {
8539c7c1 91 unsigned type;
b22f6434 92 const struct iommu_ops *ops;
d16e0faa 93 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
4f3f8d9d 94 iommu_fault_handler_t handler;
77ca2332 95 void *handler_token;
0ff64f80 96 struct iommu_domain_geometry geometry;
0db2e5d1 97 void *iova_cookie;
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98};
99
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100enum iommu_cap {
101 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
102 transactions */
103 IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
c4986649 104 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
1aed0748 105};
dbb9fd86 106
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107/*
108 * Following constraints are specifc to FSL_PAMUV1:
109 * -aperture must be power of 2, and naturally aligned
110 * -number of windows must be power of 2, and address space size
111 * of each window is determined by aperture size / # of windows
112 * -the actual size of the mapped region of a window must be power
113 * of 2 starting with 4KB and physical address must be naturally
114 * aligned.
115 * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
116 * The caller can invoke iommu_domain_get_attr to check if the underlying
117 * iommu implementation supports these constraints.
118 */
119
0cd76dd1 120enum iommu_attr {
0ff64f80 121 DOMAIN_ATTR_GEOMETRY,
d2e12160 122 DOMAIN_ATTR_PAGING,
69356712 123 DOMAIN_ATTR_WINDOWS,
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124 DOMAIN_ATTR_FSL_PAMU_STASH,
125 DOMAIN_ATTR_FSL_PAMU_ENABLE,
126 DOMAIN_ATTR_FSL_PAMUV1,
c02607aa 127 DOMAIN_ATTR_NESTING, /* two stages of translation */
2da274cd 128 DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
a8b8a88a 129 DOMAIN_ATTR_MAX,
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130};
131
d30ddcaa 132/* These are the possible reserved region types */
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133enum iommu_resv_type {
134 /* Memory regions which must be mapped 1:1 at all times */
135 IOMMU_RESV_DIRECT,
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136 /*
137 * Memory regions which are advertised to be 1:1 but are
138 * commonly considered relaxable in some conditions,
139 * for instance in device assignment use case (USB, Graphics)
140 */
141 IOMMU_RESV_DIRECT_RELAXABLE,
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142 /* Arbitrary "never map this or give it to a device" address ranges */
143 IOMMU_RESV_RESERVED,
144 /* Hardware MSI region (untranslated) */
145 IOMMU_RESV_MSI,
146 /* Software-managed MSI translation window */
147 IOMMU_RESV_SW_MSI,
148};
d30ddcaa 149
a1015c2b 150/**
e5b5234a 151 * struct iommu_resv_region - descriptor for a reserved memory region
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152 * @list: Linked list pointers
153 * @start: System physical start address of the region
154 * @length: Length of the region in bytes
155 * @prot: IOMMU Protection flags (READ/WRITE/...)
d30ddcaa 156 * @type: Type of the reserved region
a1015c2b 157 */
e5b5234a 158struct iommu_resv_region {
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159 struct list_head list;
160 phys_addr_t start;
161 size_t length;
162 int prot;
9d3a4de4 163 enum iommu_resv_type type;
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164};
165
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166/* Per device IOMMU features */
167enum iommu_dev_features {
168 IOMMU_DEV_FEAT_AUX, /* Aux-domain feature */
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169 IOMMU_DEV_FEAT_SVA, /* Shared Virtual Addresses */
170};
171
172#define IOMMU_PASID_INVALID (-1U)
173
174/**
175 * struct iommu_sva_ops - device driver callbacks for an SVA context
176 *
177 * @mm_exit: called when the mm is about to be torn down by exit_mmap. After
178 * @mm_exit returns, the device must not issue any more transaction
179 * with the PASID given as argument.
180 *
181 * The @mm_exit handler is allowed to sleep. Be careful about the
182 * locks taken in @mm_exit, because they might lead to deadlocks if
183 * they are also held when dropping references to the mm. Consider the
184 * following call chain:
185 * mutex_lock(A); mmput(mm) -> exit_mm() -> @mm_exit() -> mutex_lock(A)
186 * Using mmput_async() prevents this scenario.
187 *
188 */
189struct iommu_sva_ops {
190 iommu_mm_exit_handler_t mm_exit;
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191};
192
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193#ifdef CONFIG_IOMMU_API
194
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195/**
196 * struct iommu_iotlb_gather - Range information for a pending IOTLB flush
197 *
198 * @start: IOVA representing the start of the range to be flushed
199 * @end: IOVA representing the end of the range to be flushed (exclusive)
200 * @pgsize: The interval at which to perform the flush
201 *
202 * This structure is intended to be updated by multiple calls to the
203 * ->unmap() function in struct iommu_ops before eventually being passed
204 * into ->iotlb_sync().
205 */
206struct iommu_iotlb_gather {
207 unsigned long start;
208 unsigned long end;
209 size_t pgsize;
210};
211
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212/**
213 * struct iommu_ops - iommu ops and capabilities
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214 * @capable: check capability
215 * @domain_alloc: allocate iommu domain
216 * @domain_free: free iommu domain
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217 * @attach_dev: attach device to an iommu domain
218 * @detach_dev: detach device from an iommu domain
219 * @map: map a physically contiguous memory region to an iommu domain
220 * @unmap: unmap a physically contiguous memory region from an iommu domain
db04d4a3 221 * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain
2405bc16 222 * @iotlb_sync_map: Sync mappings created recently using @map to the hardware
51eb7809 223 * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
add02cfd 224 * queue
7d3002cc 225 * @iova_to_phys: translate iova to physical address
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226 * @probe_device: Add device to iommu driver handling
227 * @release_device: Remove device from iommu driver handling
228 * @probe_finalize: Do final setup work after the device is added to an IOMMU
229 * group and attached to the groups domain
0d9bacb6 230 * @device_group: find iommu group for a particular device
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231 * @domain_get_attr: Query domain attributes
232 * @domain_set_attr: Change domain attributes
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233 * @get_resv_regions: Request list of reserved regions for a device
234 * @put_resv_regions: Free list of reserved regions for a device
235 * @apply_resv_region: Temporary helper call-back for iova reserved ranges
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236 * @domain_window_enable: Configure and enable a particular window for a domain
237 * @domain_window_disable: Disable a particular window for a domain
d0f60a44 238 * @of_xlate: add OF master IDs to iommu grouping
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239 * @is_attach_deferred: Check if domain attach should be deferred from iommu
240 * driver init to device driver init (default no)
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241 * @dev_has/enable/disable_feat: per device entries to check/enable/disable
242 * iommu specific features.
243 * @dev_feat_enabled: check enabled feature
244 * @aux_attach/detach_dev: aux-domain specific attach/detach entries.
245 * @aux_get_pasid: get the pasid given an aux-domain
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246 * @sva_bind: Bind process address space to device
247 * @sva_unbind: Unbind process address space from device
248 * @sva_get_pasid: Get PASID associated to a SVA handle
bf3255b3 249 * @page_response: handle page request response
4c7c171f 250 * @cache_invalidate: invalidate translation caches
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251 * @sva_bind_gpasid: bind guest pasid and mm
252 * @sva_unbind_gpasid: unbind guest pasid and mm
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253 * @def_domain_type: device default domain type, return value:
254 * - IOMMU_DOMAIN_IDENTITY: must use an identity domain
255 * - IOMMU_DOMAIN_DMA: must use a dma domain
256 * - 0: use the default setting
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257 * @pgsize_bitmap: bitmap of all possible supported page sizes
258 * @owner: Driver module providing these ops
7d3002cc 259 */
4a77a6cf 260struct iommu_ops {
3c0e0ca0 261 bool (*capable)(enum iommu_cap);
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262
263 /* Domain allocation and freeing by the iommu driver */
8539c7c1 264 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
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265 void (*domain_free)(struct iommu_domain *);
266
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267 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
268 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
67651786 269 int (*map)(struct iommu_domain *domain, unsigned long iova,
781ca2de 270 phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
5009065d 271 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
56f8af5e 272 size_t size, struct iommu_iotlb_gather *iotlb_gather);
add02cfd 273 void (*flush_iotlb_all)(struct iommu_domain *domain);
1d7ae53b 274 void (*iotlb_sync_map)(struct iommu_domain *domain);
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275 void (*iotlb_sync)(struct iommu_domain *domain,
276 struct iommu_iotlb_gather *iotlb_gather);
bb5547ac 277 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
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278 struct iommu_device *(*probe_device)(struct device *dev);
279 void (*release_device)(struct device *dev);
280 void (*probe_finalize)(struct device *dev);
46c6b2bc 281 struct iommu_group *(*device_group)(struct device *dev);
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282 int (*domain_get_attr)(struct iommu_domain *domain,
283 enum iommu_attr attr, void *data);
284 int (*domain_set_attr)(struct iommu_domain *domain,
285 enum iommu_attr attr, void *data);
d7787d57 286
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287 /* Request/Free a list of reserved regions for a device */
288 void (*get_resv_regions)(struct device *dev, struct list_head *list);
289 void (*put_resv_regions)(struct device *dev, struct list_head *list);
290 void (*apply_resv_region)(struct device *dev,
291 struct iommu_domain *domain,
292 struct iommu_resv_region *region);
a1015c2b 293
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294 /* Window handling functions */
295 int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f 296 phys_addr_t paddr, u64 size, int prot);
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297 void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
298
d0f60a44 299 int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
e01d1913 300 bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
d0f60a44 301
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302 /* Per device IOMMU features */
303 bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
304 bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
305 int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
306 int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
307
308 /* Aux-domain specific attach/detach entries */
309 int (*aux_attach_dev)(struct iommu_domain *domain, struct device *dev);
310 void (*aux_detach_dev)(struct iommu_domain *domain, struct device *dev);
311 int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev);
312
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313 struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
314 void *drvdata);
315 void (*sva_unbind)(struct iommu_sva *handle);
316 int (*sva_get_pasid)(struct iommu_sva *handle);
317
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318 int (*page_response)(struct device *dev,
319 struct iommu_fault_event *evt,
320 struct iommu_page_response *msg);
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321 int (*cache_invalidate)(struct iommu_domain *domain, struct device *dev,
322 struct iommu_cache_invalidate_info *inv_info);
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323 int (*sva_bind_gpasid)(struct iommu_domain *domain,
324 struct device *dev, struct iommu_gpasid_bind_data *data);
325
326 int (*sva_unbind_gpasid)(struct device *dev, int pasid);
bf3255b3 327
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328 int (*def_domain_type)(struct device *dev);
329
7d3002cc 330 unsigned long pgsize_bitmap;
25f003de 331 struct module *owner;
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332};
333
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334/**
335 * struct iommu_device - IOMMU core representation of one IOMMU hardware
336 * instance
337 * @list: Used by the iommu-core to keep a list of registered iommus
338 * @ops: iommu-ops for talking to this iommu
39ab9555 339 * @dev: struct device for sysfs handling
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340 */
341struct iommu_device {
342 struct list_head list;
343 const struct iommu_ops *ops;
c73e1ac8 344 struct fwnode_handle *fwnode;
2926a2aa 345 struct device *dev;
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346};
347
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348/**
349 * struct iommu_fault_event - Generic fault event
350 *
351 * Can represent recoverable faults such as a page requests or
352 * unrecoverable faults such as DMA or IRQ remapping faults.
353 *
354 * @fault: fault descriptor
bf3255b3 355 * @list: pending fault event list, used for tracking responses
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356 */
357struct iommu_fault_event {
358 struct iommu_fault fault;
bf3255b3 359 struct list_head list;
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360};
361
362/**
363 * struct iommu_fault_param - per-device IOMMU fault data
364 * @handler: Callback function to handle IOMMU faults at device level
365 * @data: handler private data
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366 * @faults: holds the pending faults which needs response
367 * @lock: protect pending faults list
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368 */
369struct iommu_fault_param {
370 iommu_dev_fault_handler_t handler;
371 void *data;
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372 struct list_head faults;
373 struct mutex lock;
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374};
375
376/**
045a7042 377 * struct dev_iommu - Collection of per-device IOMMU data
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378 *
379 * @fault_param: IOMMU detected device fault reporting data
72acd9df 380 * @fwspec: IOMMU fwspec data
a6a4c7e2 381 * @iommu_dev: IOMMU device this device is linked to
986d5ecc 382 * @priv: IOMMU Driver private data
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383 *
384 * TODO: migrate other per device data pointers under iommu_dev_data, e.g.
385 * struct iommu_group *iommu_group;
4e32348b 386 */
045a7042 387struct dev_iommu {
0c830e6b 388 struct mutex lock;
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389 struct iommu_fault_param *fault_param;
390 struct iommu_fwspec *fwspec;
a6a4c7e2 391 struct iommu_device *iommu_dev;
986d5ecc 392 void *priv;
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393};
394
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395int iommu_device_register(struct iommu_device *iommu);
396void iommu_device_unregister(struct iommu_device *iommu);
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397int iommu_device_sysfs_add(struct iommu_device *iommu,
398 struct device *parent,
399 const struct attribute_group **groups,
400 const char *fmt, ...) __printf(4, 5);
401void iommu_device_sysfs_remove(struct iommu_device *iommu);
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402int iommu_device_link(struct iommu_device *iommu, struct device *link);
403void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
b0119e87 404
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405static inline void __iommu_device_set_ops(struct iommu_device *iommu,
406 const struct iommu_ops *ops)
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407{
408 iommu->ops = ops;
409}
410
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411#define iommu_device_set_ops(iommu, ops) \
412do { \
413 struct iommu_ops *__ops = (struct iommu_ops *)(ops); \
414 __ops->owner = THIS_MODULE; \
415 __iommu_device_set_ops(iommu, __ops); \
416} while (0)
417
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418static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
419 struct fwnode_handle *fwnode)
420{
421 iommu->fwnode = fwnode;
422}
423
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424static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
425{
426 return (struct iommu_device *)dev_get_drvdata(dev);
427}
428
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429static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
430{
431 *gather = (struct iommu_iotlb_gather) {
432 .start = ULONG_MAX,
433 };
434}
435
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436#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
437#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
438#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
439#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
440#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
441#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
442
b22f6434 443extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
5012c396 444extern int bus_iommu_probe(struct bus_type *bus);
a1b60c1c 445extern bool iommu_present(struct bus_type *bus);
3c0e0ca0 446extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
905d66c1 447extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
aa16bea9 448extern struct iommu_group *iommu_group_get_by_id(int id);
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449extern void iommu_domain_free(struct iommu_domain *domain);
450extern int iommu_attach_device(struct iommu_domain *domain,
451 struct device *dev);
452extern void iommu_detach_device(struct iommu_domain *domain,
453 struct device *dev);
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454extern int iommu_cache_invalidate(struct iommu_domain *domain,
455 struct device *dev,
456 struct iommu_cache_invalidate_info *inv_info);
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457extern int iommu_sva_bind_gpasid(struct iommu_domain *domain,
458 struct device *dev, struct iommu_gpasid_bind_data *data);
459extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
460 struct device *dev, ioasid_t pasid);
2c1296d9 461extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
6af588fe 462extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
cefc53c7 463extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
7d3002cc 464 phys_addr_t paddr, size_t size, int prot);
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465extern int iommu_map_atomic(struct iommu_domain *domain, unsigned long iova,
466 phys_addr_t paddr, size_t size, int prot);
7d3002cc 467extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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468 size_t size);
469extern size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
470 unsigned long iova, size_t size,
471 struct iommu_iotlb_gather *iotlb_gather);
d88e61fa
CH
472extern size_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
473 struct scatterlist *sg,unsigned int nents, int prot);
781ca2de
TM
474extern size_t iommu_map_sg_atomic(struct iommu_domain *domain,
475 unsigned long iova, struct scatterlist *sg,
476 unsigned int nents, int prot);
bb5547ac 477extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
4f3f8d9d 478extern void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 479 iommu_fault_handler_t handler, void *token);
d72e31c9 480
e5b5234a
EA
481extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
482extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
f9f6971e
TR
483extern void generic_iommu_put_resv_regions(struct device *dev,
484 struct list_head *list);
d290f1e7 485extern int iommu_request_dm_for_dev(struct device *dev);
7423e017 486extern int iommu_request_dma_domain_for_dev(struct device *dev);
8a69961c
JR
487extern void iommu_set_default_passthrough(bool cmd_line);
488extern void iommu_set_default_translated(bool cmd_line);
489extern bool iommu_default_passthrough(void);
2b20cbba 490extern struct iommu_resv_region *
9d3a4de4
RM
491iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
492 enum iommu_resv_type type);
6c65fb31
EA
493extern int iommu_get_group_resv_regions(struct iommu_group *group,
494 struct list_head *head);
a1015c2b 495
d72e31c9
AW
496extern int iommu_attach_group(struct iommu_domain *domain,
497 struct iommu_group *group);
498extern void iommu_detach_group(struct iommu_domain *domain,
499 struct iommu_group *group);
500extern struct iommu_group *iommu_group_alloc(void);
501extern void *iommu_group_get_iommudata(struct iommu_group *group);
502extern void iommu_group_set_iommudata(struct iommu_group *group,
503 void *iommu_data,
504 void (*release)(void *iommu_data));
505extern int iommu_group_set_name(struct iommu_group *group, const char *name);
506extern int iommu_group_add_device(struct iommu_group *group,
507 struct device *dev);
508extern void iommu_group_remove_device(struct device *dev);
509extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
510 int (*fn)(struct device *, void *));
511extern struct iommu_group *iommu_group_get(struct device *dev);
13f59a78 512extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
d72e31c9
AW
513extern void iommu_group_put(struct iommu_group *group);
514extern int iommu_group_register_notifier(struct iommu_group *group,
515 struct notifier_block *nb);
516extern int iommu_group_unregister_notifier(struct iommu_group *group,
517 struct notifier_block *nb);
0c830e6b
JP
518extern int iommu_register_device_fault_handler(struct device *dev,
519 iommu_dev_fault_handler_t handler,
520 void *data);
521
522extern int iommu_unregister_device_fault_handler(struct device *dev);
523
524extern int iommu_report_device_fault(struct device *dev,
525 struct iommu_fault_event *evt);
bf3255b3
JPB
526extern int iommu_page_response(struct device *dev,
527 struct iommu_page_response *msg);
0c830e6b 528
d72e31c9 529extern int iommu_group_id(struct iommu_group *group);
6827ca83 530extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
4f3f8d9d 531
0cd76dd1
JR
532extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
533 void *data);
534extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
535 void *data);
4f3f8d9d 536
d7787d57
JR
537/* Window handling function prototypes */
538extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f
VS
539 phys_addr_t offset, u64 size,
540 int prot);
d7787d57 541extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
207c6e36
JR
542
543extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
544 unsigned long iova, int flags);
4a77a6cf 545
add02cfd
JR
546static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
547{
548 if (domain->ops->flush_iotlb_all)
549 domain->ops->flush_iotlb_all(domain);
550}
551
a7d20dc1
WD
552static inline void iommu_tlb_sync(struct iommu_domain *domain,
553 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
554{
555 if (domain->ops->iotlb_sync)
56f8af5e 556 domain->ops->iotlb_sync(domain, iotlb_gather);
a7d20dc1
WD
557
558 iommu_iotlb_gather_init(iotlb_gather);
add02cfd
JR
559}
560
4fcf8544
WD
561static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
562 struct iommu_iotlb_gather *gather,
563 unsigned long iova, size_t size)
564{
565 unsigned long start = iova, end = start + size;
566
567 /*
568 * If the new page is disjoint from the current range or is mapped at
569 * a different granularity, then sync the TLB so that the gather
570 * structure can be rewritten.
571 */
572 if (gather->pgsize != size ||
573 end < gather->start || start > gather->end) {
574 if (gather->pgsize)
575 iommu_tlb_sync(domain, gather);
576 gather->pgsize = size;
577 }
578
579 if (gather->end < end)
580 gather->end = end;
581
582 if (gather->start > start)
583 gather->start = start;
584}
585
5e62292b
JR
586/* PCI device grouping function */
587extern struct iommu_group *pci_device_group(struct device *dev);
6eab556a
JR
588/* Generic device grouping function */
589extern struct iommu_group *generic_device_group(struct device *dev);
eab03e2a
NG
590/* FSL-MC device grouping function */
591struct iommu_group *fsl_mc_device_group(struct device *dev);
5e62292b 592
57f98d2f
RM
593/**
594 * struct iommu_fwspec - per-device IOMMU instance data
595 * @ops: ops for this device's IOMMU
596 * @iommu_fwnode: firmware handle for this device's IOMMU
597 * @iommu_priv: IOMMU driver private data for this device
89535821 598 * @num_pasid_bits: number of PASID bits supported by this device
57f98d2f
RM
599 * @num_ids: number of associated device IDs
600 * @ids: IDs which this device may present to the IOMMU
601 */
602struct iommu_fwspec {
603 const struct iommu_ops *ops;
604 struct fwnode_handle *iommu_fwnode;
5702ee24 605 u32 flags;
89535821 606 u32 num_pasid_bits;
57f98d2f 607 unsigned int num_ids;
098accf2 608 u32 ids[];
57f98d2f
RM
609};
610
5702ee24
JPB
611/* ATS is supported */
612#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
613
26b25a2b
JPB
614/**
615 * struct iommu_sva - handle to a device-mm bond
616 */
617struct iommu_sva {
618 struct device *dev;
619 const struct iommu_sva_ops *ops;
620};
621
57f98d2f
RM
622int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
623 const struct iommu_ops *ops);
624void iommu_fwspec_free(struct device *dev);
625int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
534766df 626const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
57f98d2f 627
b4ef725e
JR
628static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
629{
72acd9df
JR
630 if (dev->iommu)
631 return dev->iommu->fwspec;
632 else
633 return NULL;
b4ef725e
JR
634}
635
636static inline void dev_iommu_fwspec_set(struct device *dev,
637 struct iommu_fwspec *fwspec)
638{
72acd9df 639 dev->iommu->fwspec = fwspec;
b4ef725e
JR
640}
641
f9867f41
JR
642static inline void *dev_iommu_priv_get(struct device *dev)
643{
986d5ecc 644 return dev->iommu->priv;
f9867f41
JR
645}
646
647static inline void dev_iommu_priv_set(struct device *dev, void *priv)
648{
986d5ecc 649 dev->iommu->priv = priv;
f9867f41
JR
650}
651
cc5aed44
JR
652int iommu_probe_device(struct device *dev);
653void iommu_release_device(struct device *dev);
654
a3a19592
LB
655bool iommu_dev_has_feature(struct device *dev, enum iommu_dev_features f);
656int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
657int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
658bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f);
659int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev);
660void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev);
661int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev);
662
26b25a2b
JPB
663struct iommu_sva *iommu_sva_bind_device(struct device *dev,
664 struct mm_struct *mm,
665 void *drvdata);
666void iommu_sva_unbind_device(struct iommu_sva *handle);
667int iommu_sva_set_ops(struct iommu_sva *handle,
668 const struct iommu_sva_ops *ops);
669int iommu_sva_get_pasid(struct iommu_sva *handle);
670
4a77a6cf
JR
671#else /* CONFIG_IOMMU_API */
672
39d4ebb9 673struct iommu_ops {};
d72e31c9 674struct iommu_group {};
57f98d2f 675struct iommu_fwspec {};
b0119e87 676struct iommu_device {};
4e32348b 677struct iommu_fault_param {};
a7d20dc1 678struct iommu_iotlb_gather {};
4a77a6cf 679
a1b60c1c 680static inline bool iommu_present(struct bus_type *bus)
4a77a6cf
JR
681{
682 return false;
683}
684
3c0e0ca0
JR
685static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
686{
687 return false;
688}
689
905d66c1 690static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
4a77a6cf
JR
691{
692 return NULL;
693}
694
b62dfd29
AK
695static inline struct iommu_group *iommu_group_get_by_id(int id)
696{
697 return NULL;
698}
699
4a77a6cf
JR
700static inline void iommu_domain_free(struct iommu_domain *domain)
701{
702}
703
704static inline int iommu_attach_device(struct iommu_domain *domain,
705 struct device *dev)
706{
707 return -ENODEV;
708}
709
710static inline void iommu_detach_device(struct iommu_domain *domain,
711 struct device *dev)
712{
713}
714
2c1296d9
JR
715static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
716{
717 return NULL;
718}
719
cefc53c7 720static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
ebae3e83 721 phys_addr_t paddr, size_t size, int prot)
cefc53c7
JR
722{
723 return -ENODEV;
724}
725
781ca2de
TM
726static inline int iommu_map_atomic(struct iommu_domain *domain,
727 unsigned long iova, phys_addr_t paddr,
728 size_t size, int prot)
729{
730 return -ENODEV;
731}
732
c5611a87
SS
733static inline size_t iommu_unmap(struct iommu_domain *domain,
734 unsigned long iova, size_t size)
cefc53c7 735{
c5611a87 736 return 0;
cefc53c7
JR
737}
738
c5611a87 739static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
740 unsigned long iova, int gfp_order,
741 struct iommu_iotlb_gather *iotlb_gather)
cefc53c7 742{
c5611a87 743 return 0;
cefc53c7
JR
744}
745
315786eb
OH
746static inline size_t iommu_map_sg(struct iommu_domain *domain,
747 unsigned long iova, struct scatterlist *sg,
748 unsigned int nents, int prot)
749{
c5611a87 750 return 0;
315786eb
OH
751}
752
781ca2de
TM
753static inline size_t iommu_map_sg_atomic(struct iommu_domain *domain,
754 unsigned long iova, struct scatterlist *sg,
755 unsigned int nents, int prot)
756{
757 return 0;
758}
759
add02cfd
JR
760static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
761{
762}
763
a7d20dc1
WD
764static inline void iommu_tlb_sync(struct iommu_domain *domain,
765 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
766{
767}
768
d7787d57
JR
769static inline int iommu_domain_window_enable(struct iommu_domain *domain,
770 u32 wnd_nr, phys_addr_t paddr,
80f97f0f 771 u64 size, int prot)
d7787d57
JR
772{
773 return -ENODEV;
774}
775
776static inline void iommu_domain_window_disable(struct iommu_domain *domain,
777 u32 wnd_nr)
778{
779}
780
bb5547ac 781static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
4a77a6cf
JR
782{
783 return 0;
784}
785
4f3f8d9d 786static inline void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 787 iommu_fault_handler_t handler, void *token)
4f3f8d9d
OBC
788{
789}
790
e5b5234a 791static inline void iommu_get_resv_regions(struct device *dev,
a1015c2b
JR
792 struct list_head *list)
793{
794}
795
e5b5234a 796static inline void iommu_put_resv_regions(struct device *dev,
a1015c2b
JR
797 struct list_head *list)
798{
799}
800
6c65fb31
EA
801static inline int iommu_get_group_resv_regions(struct iommu_group *group,
802 struct list_head *head)
803{
804 return -ENODEV;
805}
806
d290f1e7
JR
807static inline int iommu_request_dm_for_dev(struct device *dev)
808{
809 return -ENODEV;
810}
811
7423e017
LB
812static inline int iommu_request_dma_domain_for_dev(struct device *dev)
813{
814 return -ENODEV;
815}
816
8a69961c
JR
817static inline void iommu_set_default_passthrough(bool cmd_line)
818{
819}
820
821static inline void iommu_set_default_translated(bool cmd_line)
822{
823}
824
825static inline bool iommu_default_passthrough(void)
826{
827 return true;
828}
829
bef83de5
AW
830static inline int iommu_attach_group(struct iommu_domain *domain,
831 struct iommu_group *group)
d72e31c9
AW
832{
833 return -ENODEV;
834}
835
bef83de5
AW
836static inline void iommu_detach_group(struct iommu_domain *domain,
837 struct iommu_group *group)
d72e31c9
AW
838{
839}
840
bef83de5 841static inline struct iommu_group *iommu_group_alloc(void)
d72e31c9
AW
842{
843 return ERR_PTR(-ENODEV);
844}
845
bef83de5 846static inline void *iommu_group_get_iommudata(struct iommu_group *group)
d72e31c9
AW
847{
848 return NULL;
849}
850
bef83de5
AW
851static inline void iommu_group_set_iommudata(struct iommu_group *group,
852 void *iommu_data,
853 void (*release)(void *iommu_data))
d72e31c9
AW
854{
855}
856
bef83de5
AW
857static inline int iommu_group_set_name(struct iommu_group *group,
858 const char *name)
d72e31c9
AW
859{
860 return -ENODEV;
861}
862
bef83de5
AW
863static inline int iommu_group_add_device(struct iommu_group *group,
864 struct device *dev)
d72e31c9
AW
865{
866 return -ENODEV;
867}
868
bef83de5 869static inline void iommu_group_remove_device(struct device *dev)
d72e31c9
AW
870{
871}
872
bef83de5
AW
873static inline int iommu_group_for_each_dev(struct iommu_group *group,
874 void *data,
875 int (*fn)(struct device *, void *))
d72e31c9
AW
876{
877 return -ENODEV;
878}
879
bef83de5 880static inline struct iommu_group *iommu_group_get(struct device *dev)
d72e31c9
AW
881{
882 return NULL;
883}
884
bef83de5 885static inline void iommu_group_put(struct iommu_group *group)
d72e31c9
AW
886{
887}
888
bef83de5
AW
889static inline int iommu_group_register_notifier(struct iommu_group *group,
890 struct notifier_block *nb)
1460432c
AW
891{
892 return -ENODEV;
893}
894
bef83de5
AW
895static inline int iommu_group_unregister_notifier(struct iommu_group *group,
896 struct notifier_block *nb)
d72e31c9
AW
897{
898 return 0;
899}
900
0c830e6b
JP
901static inline
902int iommu_register_device_fault_handler(struct device *dev,
903 iommu_dev_fault_handler_t handler,
904 void *data)
905{
906 return -ENODEV;
907}
908
909static inline int iommu_unregister_device_fault_handler(struct device *dev)
910{
911 return 0;
912}
913
914static inline
915int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt)
916{
917 return -ENODEV;
918}
919
bf3255b3
JPB
920static inline int iommu_page_response(struct device *dev,
921 struct iommu_page_response *msg)
922{
923 return -ENODEV;
924}
925
bef83de5 926static inline int iommu_group_id(struct iommu_group *group)
d72e31c9
AW
927{
928 return -ENODEV;
929}
1460432c 930
0cd76dd1
JR
931static inline int iommu_domain_get_attr(struct iommu_domain *domain,
932 enum iommu_attr attr, void *data)
933{
934 return -EINVAL;
935}
936
937static inline int iommu_domain_set_attr(struct iommu_domain *domain,
938 enum iommu_attr attr, void *data)
939{
940 return -EINVAL;
941}
942
39ab9555 943static inline int iommu_device_register(struct iommu_device *iommu)
c61959ec 944{
39ab9555 945 return -ENODEV;
c61959ec
AW
946}
947
39ab9555
JR
948static inline void iommu_device_set_ops(struct iommu_device *iommu,
949 const struct iommu_ops *ops)
c61959ec 950{
c61959ec
AW
951}
952
c73e1ac8
JR
953static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
954 struct fwnode_handle *fwnode)
c61959ec 955{
c61959ec
AW
956}
957
2926a2aa
JR
958static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
959{
960 return NULL;
961}
962
a7d20dc1
WD
963static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
964{
965}
966
4fcf8544
WD
967static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
968 struct iommu_iotlb_gather *gather,
969 unsigned long iova, size_t size)
970{
971}
972
39ab9555 973static inline void iommu_device_unregister(struct iommu_device *iommu)
c61959ec 974{
c61959ec
AW
975}
976
39ab9555
JR
977static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
978 struct device *parent,
979 const struct attribute_group **groups,
980 const char *fmt, ...)
b0119e87 981{
39ab9555 982 return -ENODEV;
b0119e87
JR
983}
984
39ab9555 985static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
c61959ec
AW
986{
987}
988
e09f8ea5 989static inline int iommu_device_link(struct device *dev, struct device *link)
c61959ec
AW
990{
991 return -EINVAL;
992}
993
e09f8ea5 994static inline void iommu_device_unlink(struct device *dev, struct device *link)
c61959ec
AW
995{
996}
997
57f98d2f
RM
998static inline int iommu_fwspec_init(struct device *dev,
999 struct fwnode_handle *iommu_fwnode,
1000 const struct iommu_ops *ops)
1001{
1002 return -ENODEV;
1003}
1004
1005static inline void iommu_fwspec_free(struct device *dev)
1006{
1007}
1008
1009static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
1010 int num_ids)
1011{
1012 return -ENODEV;
1013}
1014
e4f10ffe 1015static inline
534766df 1016const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
e4f10ffe
LP
1017{
1018 return NULL;
1019}
1020
a3a19592
LB
1021static inline bool
1022iommu_dev_has_feature(struct device *dev, enum iommu_dev_features feat)
1023{
1024 return false;
1025}
1026
1027static inline bool
1028iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat)
1029{
1030 return false;
1031}
1032
1033static inline int
1034iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat)
1035{
1036 return -ENODEV;
1037}
1038
1039static inline int
1040iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
1041{
1042 return -ENODEV;
1043}
1044
1045static inline int
1046iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev)
1047{
1048 return -ENODEV;
1049}
1050
1051static inline void
1052iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev)
1053{
1054}
1055
1056static inline int
1057iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev)
1058{
1059 return -ENODEV;
1060}
1061
26b25a2b
JPB
1062static inline struct iommu_sva *
1063iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata)
1064{
1065 return NULL;
1066}
1067
1068static inline void iommu_sva_unbind_device(struct iommu_sva *handle)
1069{
1070}
1071
1072static inline int iommu_sva_set_ops(struct iommu_sva *handle,
1073 const struct iommu_sva_ops *ops)
1074{
1075 return -EINVAL;
1076}
1077
1078static inline int iommu_sva_get_pasid(struct iommu_sva *handle)
1079{
1080 return IOMMU_PASID_INVALID;
1081}
1082
4c7c171f
YL
1083static inline int
1084iommu_cache_invalidate(struct iommu_domain *domain,
1085 struct device *dev,
1086 struct iommu_cache_invalidate_info *inv_info)
1087{
1088 return -ENODEV;
1089}
808be0aa
JP
1090static inline int iommu_sva_bind_gpasid(struct iommu_domain *domain,
1091 struct device *dev, struct iommu_gpasid_bind_data *data)
1092{
1093 return -ENODEV;
1094}
1095
1096static inline int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
1097 struct device *dev, int pasid)
1098{
1099 return -ENODEV;
1100}
4c7c171f 1101
0008d0c3
JR
1102static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
1103{
1104 return NULL;
1105}
4a77a6cf
JR
1106#endif /* CONFIG_IOMMU_API */
1107
bad614b2
GH
1108#ifdef CONFIG_IOMMU_DEBUGFS
1109extern struct dentry *iommu_debugfs_dir;
1110void iommu_debugfs_setup(void);
1111#else
1112static inline void iommu_debugfs_setup(void) {}
1113#endif
1114
4a77a6cf 1115#endif /* __LINUX_IOMMU_H */