]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - include/linux/iommu.h
block: Fix writeback throttling W=1 compiler warnings
[mirror_ubuntu-bionic-kernel.git] / include / linux / iommu.h
CommitLineData
4a77a6cf
JR
1/*
2 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
3 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef __LINUX_IOMMU_H
20#define __LINUX_IOMMU_H
21
e8245c1b
JR
22#include <linux/scatterlist.h>
23#include <linux/device.h>
24#include <linux/types.h>
74315ccc 25#include <linux/errno.h>
9a08d376 26#include <linux/err.h>
d0f60a44 27#include <linux/of.h>
74315ccc 28
ca13bb3d
WD
29#define IOMMU_READ (1 << 0)
30#define IOMMU_WRITE (1 << 1)
31#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
a720b41c 32#define IOMMU_NOEXEC (1 << 3)
31e6850e 33#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
579b2a65 34/*
adf5e516
RM
35 * Where the bus hardware includes a privilege level as part of its access type
36 * markings, and certain devices are capable of issuing transactions marked as
37 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
38 * given permission flags only apply to accesses at the higher privilege level,
39 * and that unprivileged transactions should have as little access as possible.
40 * This would usually imply the same permissions as kernel mappings on the CPU,
41 * if the IOMMU page table format is equivalent.
579b2a65
MH
42 */
43#define IOMMU_PRIV (1 << 5)
4a77a6cf 44
905d66c1 45struct iommu_ops;
d72e31c9 46struct iommu_group;
ff21776d 47struct bus_type;
4a77a6cf 48struct device;
4f3f8d9d 49struct iommu_domain;
ba1eabfa 50struct notifier_block;
4f3f8d9d
OBC
51
52/* iommu fault flags */
53#define IOMMU_FAULT_READ 0x0
54#define IOMMU_FAULT_WRITE 0x1
55
56typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
77ca2332 57 struct device *, unsigned long, int, void *);
4a77a6cf 58
0ff64f80
JR
59struct iommu_domain_geometry {
60 dma_addr_t aperture_start; /* First address that can be mapped */
61 dma_addr_t aperture_end; /* Last address that can be mapped */
62 bool force_aperture; /* DMA only allowed in mappable range? */
63};
64
8539c7c1
JR
65/* Domain feature flags */
66#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
67#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
68 implementation */
69#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
70
71/*
72 * This are the possible domain-types
73 *
74 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
75 * devices
76 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
77 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
78 * for VMs
79 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
80 * This flag allows IOMMU drivers to implement
81 * certain optimizations for these domains
82 */
83#define IOMMU_DOMAIN_BLOCKED (0U)
84#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
85#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
86#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
87 __IOMMU_DOMAIN_DMA_API)
88
4a77a6cf 89struct iommu_domain {
8539c7c1 90 unsigned type;
b22f6434 91 const struct iommu_ops *ops;
d16e0faa 92 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
4f3f8d9d 93 iommu_fault_handler_t handler;
77ca2332 94 void *handler_token;
0ff64f80 95 struct iommu_domain_geometry geometry;
0db2e5d1 96 void *iova_cookie;
4a77a6cf
JR
97};
98
1aed0748
JR
99enum iommu_cap {
100 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
101 transactions */
102 IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
c4986649 103 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
1aed0748 104};
dbb9fd86 105
7cabf491
VS
106/*
107 * Following constraints are specifc to FSL_PAMUV1:
108 * -aperture must be power of 2, and naturally aligned
109 * -number of windows must be power of 2, and address space size
110 * of each window is determined by aperture size / # of windows
111 * -the actual size of the mapped region of a window must be power
112 * of 2 starting with 4KB and physical address must be naturally
113 * aligned.
114 * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
115 * The caller can invoke iommu_domain_get_attr to check if the underlying
116 * iommu implementation supports these constraints.
117 */
118
0cd76dd1 119enum iommu_attr {
0ff64f80 120 DOMAIN_ATTR_GEOMETRY,
d2e12160 121 DOMAIN_ATTR_PAGING,
69356712 122 DOMAIN_ATTR_WINDOWS,
7cabf491
VS
123 DOMAIN_ATTR_FSL_PAMU_STASH,
124 DOMAIN_ATTR_FSL_PAMU_ENABLE,
125 DOMAIN_ATTR_FSL_PAMUV1,
c02607aa 126 DOMAIN_ATTR_NESTING, /* two stages of translation */
887389bf 127 DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
a8b8a88a 128 DOMAIN_ATTR_MAX,
0cd76dd1
JR
129};
130
d30ddcaa 131/* These are the possible reserved region types */
9d3a4de4
RM
132enum iommu_resv_type {
133 /* Memory regions which must be mapped 1:1 at all times */
134 IOMMU_RESV_DIRECT,
135 /* Arbitrary "never map this or give it to a device" address ranges */
136 IOMMU_RESV_RESERVED,
137 /* Hardware MSI region (untranslated) */
138 IOMMU_RESV_MSI,
139 /* Software-managed MSI translation window */
140 IOMMU_RESV_SW_MSI,
141};
d30ddcaa 142
a1015c2b 143/**
e5b5234a 144 * struct iommu_resv_region - descriptor for a reserved memory region
a1015c2b
JR
145 * @list: Linked list pointers
146 * @start: System physical start address of the region
147 * @length: Length of the region in bytes
148 * @prot: IOMMU Protection flags (READ/WRITE/...)
d30ddcaa 149 * @type: Type of the reserved region
a1015c2b 150 */
e5b5234a 151struct iommu_resv_region {
a1015c2b
JR
152 struct list_head list;
153 phys_addr_t start;
154 size_t length;
155 int prot;
9d3a4de4 156 enum iommu_resv_type type;
a1015c2b
JR
157};
158
39d4ebb9
JR
159#ifdef CONFIG_IOMMU_API
160
7d3002cc
OBC
161/**
162 * struct iommu_ops - iommu ops and capabilities
0d9bacb6
MD
163 * @capable: check capability
164 * @domain_alloc: allocate iommu domain
165 * @domain_free: free iommu domain
7d3002cc
OBC
166 * @attach_dev: attach device to an iommu domain
167 * @detach_dev: detach device from an iommu domain
168 * @map: map a physically contiguous memory region to an iommu domain
169 * @unmap: unmap a physically contiguous memory region from an iommu domain
315786eb 170 * @map_sg: map a scatter-gather list of physically contiguous memory chunks
50ce6312 171 * to an iommu domain
add02cfd
JR
172 * @flush_tlb_all: Synchronously flush all hardware TLBs for this domain
173 * @tlb_range_add: Add a given iova range to the flush queue for this domain
174 * @tlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
175 * queue
7d3002cc 176 * @iova_to_phys: translate iova to physical address
d72e31c9
AW
177 * @add_device: add device to iommu grouping
178 * @remove_device: remove device from iommu grouping
0d9bacb6 179 * @device_group: find iommu group for a particular device
0cd76dd1
JR
180 * @domain_get_attr: Query domain attributes
181 * @domain_set_attr: Change domain attributes
e5b5234a
EA
182 * @get_resv_regions: Request list of reserved regions for a device
183 * @put_resv_regions: Free list of reserved regions for a device
184 * @apply_resv_region: Temporary helper call-back for iova reserved ranges
0d9bacb6
MD
185 * @domain_window_enable: Configure and enable a particular window for a domain
186 * @domain_window_disable: Disable a particular window for a domain
187 * @domain_set_windows: Set the number of windows for a domain
188 * @domain_get_windows: Return the number of windows for a domain
d0f60a44 189 * @of_xlate: add OF master IDs to iommu grouping
d16e0faa 190 * @pgsize_bitmap: bitmap of all possible supported page sizes
7d3002cc 191 */
4a77a6cf 192struct iommu_ops {
3c0e0ca0 193 bool (*capable)(enum iommu_cap);
938c4709
JR
194
195 /* Domain allocation and freeing by the iommu driver */
8539c7c1 196 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
938c4709
JR
197 void (*domain_free)(struct iommu_domain *);
198
4a77a6cf
JR
199 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
200 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
67651786 201 int (*map)(struct iommu_domain *domain, unsigned long iova,
5009065d
OBC
202 phys_addr_t paddr, size_t size, int prot);
203 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
204 size_t size);
315786eb
OH
205 size_t (*map_sg)(struct iommu_domain *domain, unsigned long iova,
206 struct scatterlist *sg, unsigned int nents, int prot);
add02cfd
JR
207 void (*flush_iotlb_all)(struct iommu_domain *domain);
208 void (*iotlb_range_add)(struct iommu_domain *domain,
209 unsigned long iova, size_t size);
210 void (*iotlb_sync)(struct iommu_domain *domain);
bb5547ac 211 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
d72e31c9
AW
212 int (*add_device)(struct device *dev);
213 void (*remove_device)(struct device *dev);
46c6b2bc 214 struct iommu_group *(*device_group)(struct device *dev);
0cd76dd1
JR
215 int (*domain_get_attr)(struct iommu_domain *domain,
216 enum iommu_attr attr, void *data);
217 int (*domain_set_attr)(struct iommu_domain *domain,
218 enum iommu_attr attr, void *data);
d7787d57 219
e5b5234a
EA
220 /* Request/Free a list of reserved regions for a device */
221 void (*get_resv_regions)(struct device *dev, struct list_head *list);
222 void (*put_resv_regions)(struct device *dev, struct list_head *list);
223 void (*apply_resv_region)(struct device *dev,
224 struct iommu_domain *domain,
225 struct iommu_resv_region *region);
a1015c2b 226
d7787d57
JR
227 /* Window handling functions */
228 int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f 229 phys_addr_t paddr, u64 size, int prot);
d7787d57 230 void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
0d9bacb6 231 /* Set the number of windows per domain */
69356712 232 int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count);
0d9bacb6 233 /* Get the number of windows per domain */
69356712 234 u32 (*domain_get_windows)(struct iommu_domain *domain);
d7787d57 235
d0f60a44 236 int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
e01d1913 237 bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
d0f60a44 238
7d3002cc 239 unsigned long pgsize_bitmap;
4a77a6cf
JR
240};
241
b0119e87
JR
242/**
243 * struct iommu_device - IOMMU core representation of one IOMMU hardware
244 * instance
245 * @list: Used by the iommu-core to keep a list of registered iommus
246 * @ops: iommu-ops for talking to this iommu
39ab9555 247 * @dev: struct device for sysfs handling
b0119e87
JR
248 */
249struct iommu_device {
250 struct list_head list;
251 const struct iommu_ops *ops;
c73e1ac8 252 struct fwnode_handle *fwnode;
2926a2aa 253 struct device *dev;
b0119e87
JR
254};
255
256int iommu_device_register(struct iommu_device *iommu);
257void iommu_device_unregister(struct iommu_device *iommu);
39ab9555
JR
258int iommu_device_sysfs_add(struct iommu_device *iommu,
259 struct device *parent,
260 const struct attribute_group **groups,
261 const char *fmt, ...) __printf(4, 5);
262void iommu_device_sysfs_remove(struct iommu_device *iommu);
e3d10af1
JR
263int iommu_device_link(struct iommu_device *iommu, struct device *link);
264void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
b0119e87
JR
265
266static inline void iommu_device_set_ops(struct iommu_device *iommu,
267 const struct iommu_ops *ops)
268{
269 iommu->ops = ops;
270}
271
c73e1ac8
JR
272static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
273 struct fwnode_handle *fwnode)
274{
275 iommu->fwnode = fwnode;
276}
277
2926a2aa
JR
278static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
279{
280 return (struct iommu_device *)dev_get_drvdata(dev);
281}
282
d72e31c9
AW
283#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
284#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
285#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
286#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
287#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
288#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
289
b22f6434 290extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
a1b60c1c 291extern bool iommu_present(struct bus_type *bus);
3c0e0ca0 292extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
905d66c1 293extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
aa16bea9 294extern struct iommu_group *iommu_group_get_by_id(int id);
4a77a6cf
JR
295extern void iommu_domain_free(struct iommu_domain *domain);
296extern int iommu_attach_device(struct iommu_domain *domain,
297 struct device *dev);
298extern void iommu_detach_device(struct iommu_domain *domain,
299 struct device *dev);
2c1296d9 300extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
cefc53c7 301extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
7d3002cc
OBC
302 phys_addr_t paddr, size_t size, int prot);
303extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
add02cfd
JR
304 size_t size);
305extern size_t iommu_unmap_fast(struct iommu_domain *domain,
306 unsigned long iova, size_t size);
315786eb
OH
307extern size_t default_iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
308 struct scatterlist *sg,unsigned int nents,
309 int prot);
bb5547ac 310extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
4f3f8d9d 311extern void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 312 iommu_fault_handler_t handler, void *token);
d72e31c9 313
e5b5234a
EA
314extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
315extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
d290f1e7 316extern int iommu_request_dm_for_dev(struct device *dev);
2b20cbba 317extern struct iommu_resv_region *
9d3a4de4
RM
318iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
319 enum iommu_resv_type type);
6c65fb31
EA
320extern int iommu_get_group_resv_regions(struct iommu_group *group,
321 struct list_head *head);
a1015c2b 322
d72e31c9
AW
323extern int iommu_attach_group(struct iommu_domain *domain,
324 struct iommu_group *group);
325extern void iommu_detach_group(struct iommu_domain *domain,
326 struct iommu_group *group);
327extern struct iommu_group *iommu_group_alloc(void);
328extern void *iommu_group_get_iommudata(struct iommu_group *group);
329extern void iommu_group_set_iommudata(struct iommu_group *group,
330 void *iommu_data,
331 void (*release)(void *iommu_data));
332extern int iommu_group_set_name(struct iommu_group *group, const char *name);
333extern int iommu_group_add_device(struct iommu_group *group,
334 struct device *dev);
335extern void iommu_group_remove_device(struct device *dev);
336extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
337 int (*fn)(struct device *, void *));
338extern struct iommu_group *iommu_group_get(struct device *dev);
13f59a78 339extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
d72e31c9
AW
340extern void iommu_group_put(struct iommu_group *group);
341extern int iommu_group_register_notifier(struct iommu_group *group,
342 struct notifier_block *nb);
343extern int iommu_group_unregister_notifier(struct iommu_group *group,
344 struct notifier_block *nb);
345extern int iommu_group_id(struct iommu_group *group);
104a1c13 346extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
6827ca83 347extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
4f3f8d9d 348
0cd76dd1
JR
349extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
350 void *data);
351extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
352 void *data);
4f3f8d9d 353
d7787d57
JR
354/* Window handling function prototypes */
355extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f
VS
356 phys_addr_t offset, u64 size,
357 int prot);
d7787d57 358extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
207c6e36
JR
359
360extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
361 unsigned long iova, int flags);
4a77a6cf 362
add02cfd
JR
363static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
364{
365 if (domain->ops->flush_iotlb_all)
366 domain->ops->flush_iotlb_all(domain);
367}
368
369static inline void iommu_tlb_range_add(struct iommu_domain *domain,
370 unsigned long iova, size_t size)
371{
372 if (domain->ops->iotlb_range_add)
373 domain->ops->iotlb_range_add(domain, iova, size);
374}
375
376static inline void iommu_tlb_sync(struct iommu_domain *domain)
377{
378 if (domain->ops->iotlb_sync)
379 domain->ops->iotlb_sync(domain);
380}
381
315786eb
OH
382static inline size_t iommu_map_sg(struct iommu_domain *domain,
383 unsigned long iova, struct scatterlist *sg,
384 unsigned int nents, int prot)
385{
386 return domain->ops->map_sg(domain, iova, sg, nents, prot);
387}
388
5e62292b
JR
389/* PCI device grouping function */
390extern struct iommu_group *pci_device_group(struct device *dev);
6eab556a
JR
391/* Generic device grouping function */
392extern struct iommu_group *generic_device_group(struct device *dev);
5e62292b 393
57f98d2f
RM
394/**
395 * struct iommu_fwspec - per-device IOMMU instance data
396 * @ops: ops for this device's IOMMU
397 * @iommu_fwnode: firmware handle for this device's IOMMU
398 * @iommu_priv: IOMMU driver private data for this device
399 * @num_ids: number of associated device IDs
400 * @ids: IDs which this device may present to the IOMMU
401 */
402struct iommu_fwspec {
403 const struct iommu_ops *ops;
404 struct fwnode_handle *iommu_fwnode;
405 void *iommu_priv;
406 unsigned int num_ids;
407 u32 ids[1];
408};
409
410int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
411 const struct iommu_ops *ops);
412void iommu_fwspec_free(struct device *dev);
413int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
534766df 414const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
57f98d2f 415
4a77a6cf
JR
416#else /* CONFIG_IOMMU_API */
417
39d4ebb9 418struct iommu_ops {};
d72e31c9 419struct iommu_group {};
57f98d2f 420struct iommu_fwspec {};
b0119e87 421struct iommu_device {};
4a77a6cf 422
a1b60c1c 423static inline bool iommu_present(struct bus_type *bus)
4a77a6cf
JR
424{
425 return false;
426}
427
3c0e0ca0
JR
428static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
429{
430 return false;
431}
432
905d66c1 433static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
4a77a6cf
JR
434{
435 return NULL;
436}
437
b62dfd29
AK
438static inline struct iommu_group *iommu_group_get_by_id(int id)
439{
440 return NULL;
441}
442
4a77a6cf
JR
443static inline void iommu_domain_free(struct iommu_domain *domain)
444{
445}
446
447static inline int iommu_attach_device(struct iommu_domain *domain,
448 struct device *dev)
449{
450 return -ENODEV;
451}
452
453static inline void iommu_detach_device(struct iommu_domain *domain,
454 struct device *dev)
455{
456}
457
2c1296d9
JR
458static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
459{
460 return NULL;
461}
462
cefc53c7 463static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
ebae3e83 464 phys_addr_t paddr, size_t size, int prot)
cefc53c7
JR
465{
466 return -ENODEV;
467}
468
469static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova,
ebae3e83 470 size_t size)
cefc53c7
JR
471{
472 return -ENODEV;
473}
474
add02cfd
JR
475static inline int iommu_unmap_fast(struct iommu_domain *domain, unsigned long iova,
476 int gfp_order)
cefc53c7
JR
477{
478 return -ENODEV;
479}
480
315786eb
OH
481static inline size_t iommu_map_sg(struct iommu_domain *domain,
482 unsigned long iova, struct scatterlist *sg,
483 unsigned int nents, int prot)
484{
485 return -ENODEV;
486}
487
add02cfd
JR
488static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
489{
490}
491
492static inline void iommu_tlb_range_add(struct iommu_domain *domain,
493 unsigned long iova, size_t size)
494{
495}
496
497static inline void iommu_tlb_sync(struct iommu_domain *domain)
498{
499}
500
d7787d57
JR
501static inline int iommu_domain_window_enable(struct iommu_domain *domain,
502 u32 wnd_nr, phys_addr_t paddr,
80f97f0f 503 u64 size, int prot)
d7787d57
JR
504{
505 return -ENODEV;
506}
507
508static inline void iommu_domain_window_disable(struct iommu_domain *domain,
509 u32 wnd_nr)
510{
511}
512
bb5547ac 513static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
4a77a6cf
JR
514{
515 return 0;
516}
517
4f3f8d9d 518static inline void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 519 iommu_fault_handler_t handler, void *token)
4f3f8d9d
OBC
520{
521}
522
e5b5234a 523static inline void iommu_get_resv_regions(struct device *dev,
a1015c2b
JR
524 struct list_head *list)
525{
526}
527
e5b5234a 528static inline void iommu_put_resv_regions(struct device *dev,
a1015c2b
JR
529 struct list_head *list)
530{
531}
532
6c65fb31
EA
533static inline int iommu_get_group_resv_regions(struct iommu_group *group,
534 struct list_head *head)
535{
536 return -ENODEV;
537}
538
d290f1e7
JR
539static inline int iommu_request_dm_for_dev(struct device *dev)
540{
541 return -ENODEV;
542}
543
bef83de5
AW
544static inline int iommu_attach_group(struct iommu_domain *domain,
545 struct iommu_group *group)
d72e31c9
AW
546{
547 return -ENODEV;
548}
549
bef83de5
AW
550static inline void iommu_detach_group(struct iommu_domain *domain,
551 struct iommu_group *group)
d72e31c9
AW
552{
553}
554
bef83de5 555static inline struct iommu_group *iommu_group_alloc(void)
d72e31c9
AW
556{
557 return ERR_PTR(-ENODEV);
558}
559
bef83de5 560static inline void *iommu_group_get_iommudata(struct iommu_group *group)
d72e31c9
AW
561{
562 return NULL;
563}
564
bef83de5
AW
565static inline void iommu_group_set_iommudata(struct iommu_group *group,
566 void *iommu_data,
567 void (*release)(void *iommu_data))
d72e31c9
AW
568{
569}
570
bef83de5
AW
571static inline int iommu_group_set_name(struct iommu_group *group,
572 const char *name)
d72e31c9
AW
573{
574 return -ENODEV;
575}
576
bef83de5
AW
577static inline int iommu_group_add_device(struct iommu_group *group,
578 struct device *dev)
d72e31c9
AW
579{
580 return -ENODEV;
581}
582
bef83de5 583static inline void iommu_group_remove_device(struct device *dev)
d72e31c9
AW
584{
585}
586
bef83de5
AW
587static inline int iommu_group_for_each_dev(struct iommu_group *group,
588 void *data,
589 int (*fn)(struct device *, void *))
d72e31c9
AW
590{
591 return -ENODEV;
592}
593
bef83de5 594static inline struct iommu_group *iommu_group_get(struct device *dev)
d72e31c9
AW
595{
596 return NULL;
597}
598
bef83de5 599static inline void iommu_group_put(struct iommu_group *group)
d72e31c9
AW
600{
601}
602
bef83de5
AW
603static inline int iommu_group_register_notifier(struct iommu_group *group,
604 struct notifier_block *nb)
1460432c
AW
605{
606 return -ENODEV;
607}
608
bef83de5
AW
609static inline int iommu_group_unregister_notifier(struct iommu_group *group,
610 struct notifier_block *nb)
d72e31c9
AW
611{
612 return 0;
613}
614
bef83de5 615static inline int iommu_group_id(struct iommu_group *group)
d72e31c9
AW
616{
617 return -ENODEV;
618}
1460432c 619
0cd76dd1
JR
620static inline int iommu_domain_get_attr(struct iommu_domain *domain,
621 enum iommu_attr attr, void *data)
622{
623 return -EINVAL;
624}
625
626static inline int iommu_domain_set_attr(struct iommu_domain *domain,
627 enum iommu_attr attr, void *data)
628{
629 return -EINVAL;
630}
631
39ab9555 632static inline int iommu_device_register(struct iommu_device *iommu)
c61959ec 633{
39ab9555 634 return -ENODEV;
c61959ec
AW
635}
636
39ab9555
JR
637static inline void iommu_device_set_ops(struct iommu_device *iommu,
638 const struct iommu_ops *ops)
c61959ec 639{
c61959ec
AW
640}
641
c73e1ac8
JR
642static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
643 struct fwnode_handle *fwnode)
c61959ec 644{
c61959ec
AW
645}
646
2926a2aa
JR
647static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
648{
649 return NULL;
650}
651
39ab9555 652static inline void iommu_device_unregister(struct iommu_device *iommu)
c61959ec 653{
c61959ec
AW
654}
655
39ab9555
JR
656static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
657 struct device *parent,
658 const struct attribute_group **groups,
659 const char *fmt, ...)
b0119e87 660{
39ab9555 661 return -ENODEV;
b0119e87
JR
662}
663
39ab9555 664static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
c61959ec
AW
665{
666}
667
e09f8ea5 668static inline int iommu_device_link(struct device *dev, struct device *link)
c61959ec
AW
669{
670 return -EINVAL;
671}
672
e09f8ea5 673static inline void iommu_device_unlink(struct device *dev, struct device *link)
c61959ec
AW
674{
675}
676
57f98d2f
RM
677static inline int iommu_fwspec_init(struct device *dev,
678 struct fwnode_handle *iommu_fwnode,
679 const struct iommu_ops *ops)
680{
681 return -ENODEV;
682}
683
684static inline void iommu_fwspec_free(struct device *dev)
685{
686}
687
688static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
689 int num_ids)
690{
691 return -ENODEV;
692}
693
e4f10ffe 694static inline
534766df 695const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
e4f10ffe
LP
696{
697 return NULL;
698}
699
4a77a6cf
JR
700#endif /* CONFIG_IOMMU_API */
701
702#endif /* __LINUX_IOMMU_H */