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45051539 1/* SPDX-License-Identifier: GPL-2.0-only */
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2/*
3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <joerg.roedel@amd.com>
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5 */
6
7#ifndef __LINUX_IOMMU_H
8#define __LINUX_IOMMU_H
9
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10#include <linux/scatterlist.h>
11#include <linux/device.h>
12#include <linux/types.h>
74315ccc 13#include <linux/errno.h>
9a08d376 14#include <linux/err.h>
d0f60a44 15#include <linux/of.h>
808be0aa 16#include <linux/ioasid.h>
4e32348b 17#include <uapi/linux/iommu.h>
74315ccc 18
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19#define IOMMU_READ (1 << 0)
20#define IOMMU_WRITE (1 << 1)
21#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
a720b41c 22#define IOMMU_NOEXEC (1 << 3)
31e6850e 23#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
579b2a65 24/*
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25 * Where the bus hardware includes a privilege level as part of its access type
26 * markings, and certain devices are capable of issuing transactions marked as
27 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
28 * given permission flags only apply to accesses at the higher privilege level,
29 * and that unprivileged transactions should have as little access as possible.
30 * This would usually imply the same permissions as kernel mappings on the CPU,
31 * if the IOMMU page table format is equivalent.
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32 */
33#define IOMMU_PRIV (1 << 5)
90ec7a76 34/*
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35 * Non-coherent masters can use this page protection flag to set cacheable
36 * memory attributes for only a transparent outer level of cache, also known as
37 * the last-level or system cache.
90ec7a76 38 */
dd5ddd3c 39#define IOMMU_SYS_CACHE_ONLY (1 << 6)
4a77a6cf 40
905d66c1 41struct iommu_ops;
d72e31c9 42struct iommu_group;
ff21776d 43struct bus_type;
4a77a6cf 44struct device;
4f3f8d9d 45struct iommu_domain;
ba1eabfa 46struct notifier_block;
26b25a2b 47struct iommu_sva;
4e32348b 48struct iommu_fault_event;
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49
50/* iommu fault flags */
51#define IOMMU_FAULT_READ 0x0
52#define IOMMU_FAULT_WRITE 0x1
53
54typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
77ca2332 55 struct device *, unsigned long, int, void *);
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56typedef int (*iommu_mm_exit_handler_t)(struct device *dev, struct iommu_sva *,
57 void *);
4e32348b 58typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *);
4a77a6cf 59
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60struct iommu_domain_geometry {
61 dma_addr_t aperture_start; /* First address that can be mapped */
62 dma_addr_t aperture_end; /* Last address that can be mapped */
63 bool force_aperture; /* DMA only allowed in mappable range? */
64};
65
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66/* Domain feature flags */
67#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
68#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
69 implementation */
70#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
71
72/*
73 * This are the possible domain-types
74 *
75 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
76 * devices
77 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
78 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
79 * for VMs
80 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
81 * This flag allows IOMMU drivers to implement
82 * certain optimizations for these domains
83 */
84#define IOMMU_DOMAIN_BLOCKED (0U)
85#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
86#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
87#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
88 __IOMMU_DOMAIN_DMA_API)
89
4a77a6cf 90struct iommu_domain {
8539c7c1 91 unsigned type;
b22f6434 92 const struct iommu_ops *ops;
d16e0faa 93 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
4f3f8d9d 94 iommu_fault_handler_t handler;
77ca2332 95 void *handler_token;
0ff64f80 96 struct iommu_domain_geometry geometry;
0db2e5d1 97 void *iova_cookie;
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98};
99
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100enum iommu_cap {
101 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
102 transactions */
103 IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
c4986649 104 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
1aed0748 105};
dbb9fd86 106
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107/*
108 * Following constraints are specifc to FSL_PAMUV1:
109 * -aperture must be power of 2, and naturally aligned
110 * -number of windows must be power of 2, and address space size
111 * of each window is determined by aperture size / # of windows
112 * -the actual size of the mapped region of a window must be power
113 * of 2 starting with 4KB and physical address must be naturally
114 * aligned.
115 * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
116 * The caller can invoke iommu_domain_get_attr to check if the underlying
117 * iommu implementation supports these constraints.
118 */
119
0cd76dd1 120enum iommu_attr {
0ff64f80 121 DOMAIN_ATTR_GEOMETRY,
d2e12160 122 DOMAIN_ATTR_PAGING,
69356712 123 DOMAIN_ATTR_WINDOWS,
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124 DOMAIN_ATTR_FSL_PAMU_STASH,
125 DOMAIN_ATTR_FSL_PAMU_ENABLE,
126 DOMAIN_ATTR_FSL_PAMUV1,
c02607aa 127 DOMAIN_ATTR_NESTING, /* two stages of translation */
2da274cd 128 DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
a8b8a88a 129 DOMAIN_ATTR_MAX,
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130};
131
d30ddcaa 132/* These are the possible reserved region types */
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133enum iommu_resv_type {
134 /* Memory regions which must be mapped 1:1 at all times */
135 IOMMU_RESV_DIRECT,
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136 /*
137 * Memory regions which are advertised to be 1:1 but are
138 * commonly considered relaxable in some conditions,
139 * for instance in device assignment use case (USB, Graphics)
140 */
141 IOMMU_RESV_DIRECT_RELAXABLE,
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142 /* Arbitrary "never map this or give it to a device" address ranges */
143 IOMMU_RESV_RESERVED,
144 /* Hardware MSI region (untranslated) */
145 IOMMU_RESV_MSI,
146 /* Software-managed MSI translation window */
147 IOMMU_RESV_SW_MSI,
148};
d30ddcaa 149
a1015c2b 150/**
e5b5234a 151 * struct iommu_resv_region - descriptor for a reserved memory region
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152 * @list: Linked list pointers
153 * @start: System physical start address of the region
154 * @length: Length of the region in bytes
155 * @prot: IOMMU Protection flags (READ/WRITE/...)
d30ddcaa 156 * @type: Type of the reserved region
a1015c2b 157 */
e5b5234a 158struct iommu_resv_region {
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159 struct list_head list;
160 phys_addr_t start;
161 size_t length;
162 int prot;
9d3a4de4 163 enum iommu_resv_type type;
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164};
165
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166/* Per device IOMMU features */
167enum iommu_dev_features {
168 IOMMU_DEV_FEAT_AUX, /* Aux-domain feature */
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169 IOMMU_DEV_FEAT_SVA, /* Shared Virtual Addresses */
170};
171
172#define IOMMU_PASID_INVALID (-1U)
173
174/**
175 * struct iommu_sva_ops - device driver callbacks for an SVA context
176 *
177 * @mm_exit: called when the mm is about to be torn down by exit_mmap. After
178 * @mm_exit returns, the device must not issue any more transaction
179 * with the PASID given as argument.
180 *
181 * The @mm_exit handler is allowed to sleep. Be careful about the
182 * locks taken in @mm_exit, because they might lead to deadlocks if
183 * they are also held when dropping references to the mm. Consider the
184 * following call chain:
185 * mutex_lock(A); mmput(mm) -> exit_mm() -> @mm_exit() -> mutex_lock(A)
186 * Using mmput_async() prevents this scenario.
187 *
188 */
189struct iommu_sva_ops {
190 iommu_mm_exit_handler_t mm_exit;
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191};
192
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193#ifdef CONFIG_IOMMU_API
194
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195/**
196 * struct iommu_iotlb_gather - Range information for a pending IOTLB flush
197 *
198 * @start: IOVA representing the start of the range to be flushed
199 * @end: IOVA representing the end of the range to be flushed (exclusive)
200 * @pgsize: The interval at which to perform the flush
201 *
202 * This structure is intended to be updated by multiple calls to the
203 * ->unmap() function in struct iommu_ops before eventually being passed
204 * into ->iotlb_sync().
205 */
206struct iommu_iotlb_gather {
207 unsigned long start;
208 unsigned long end;
209 size_t pgsize;
210};
211
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212/**
213 * struct iommu_ops - iommu ops and capabilities
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214 * @capable: check capability
215 * @domain_alloc: allocate iommu domain
216 * @domain_free: free iommu domain
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217 * @attach_dev: attach device to an iommu domain
218 * @detach_dev: detach device from an iommu domain
219 * @map: map a physically contiguous memory region to an iommu domain
220 * @unmap: unmap a physically contiguous memory region from an iommu domain
db04d4a3 221 * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain
2405bc16 222 * @iotlb_sync_map: Sync mappings created recently using @map to the hardware
51eb7809 223 * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
add02cfd 224 * queue
7d3002cc 225 * @iova_to_phys: translate iova to physical address
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226 * @add_device: add device to iommu grouping
227 * @remove_device: remove device from iommu grouping
0d9bacb6 228 * @device_group: find iommu group for a particular device
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229 * @domain_get_attr: Query domain attributes
230 * @domain_set_attr: Change domain attributes
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231 * @get_resv_regions: Request list of reserved regions for a device
232 * @put_resv_regions: Free list of reserved regions for a device
233 * @apply_resv_region: Temporary helper call-back for iova reserved ranges
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234 * @domain_window_enable: Configure and enable a particular window for a domain
235 * @domain_window_disable: Disable a particular window for a domain
d0f60a44 236 * @of_xlate: add OF master IDs to iommu grouping
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237 * @is_attach_deferred: Check if domain attach should be deferred from iommu
238 * driver init to device driver init (default no)
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239 * @dev_has/enable/disable_feat: per device entries to check/enable/disable
240 * iommu specific features.
241 * @dev_feat_enabled: check enabled feature
242 * @aux_attach/detach_dev: aux-domain specific attach/detach entries.
243 * @aux_get_pasid: get the pasid given an aux-domain
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244 * @sva_bind: Bind process address space to device
245 * @sva_unbind: Unbind process address space from device
246 * @sva_get_pasid: Get PASID associated to a SVA handle
bf3255b3 247 * @page_response: handle page request response
4c7c171f 248 * @cache_invalidate: invalidate translation caches
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249 * @sva_bind_gpasid: bind guest pasid and mm
250 * @sva_unbind_gpasid: unbind guest pasid and mm
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251 * @pgsize_bitmap: bitmap of all possible supported page sizes
252 * @owner: Driver module providing these ops
7d3002cc 253 */
4a77a6cf 254struct iommu_ops {
3c0e0ca0 255 bool (*capable)(enum iommu_cap);
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256
257 /* Domain allocation and freeing by the iommu driver */
8539c7c1 258 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
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259 void (*domain_free)(struct iommu_domain *);
260
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261 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
262 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
67651786 263 int (*map)(struct iommu_domain *domain, unsigned long iova,
781ca2de 264 phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
5009065d 265 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
56f8af5e 266 size_t size, struct iommu_iotlb_gather *iotlb_gather);
add02cfd 267 void (*flush_iotlb_all)(struct iommu_domain *domain);
1d7ae53b 268 void (*iotlb_sync_map)(struct iommu_domain *domain);
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269 void (*iotlb_sync)(struct iommu_domain *domain,
270 struct iommu_iotlb_gather *iotlb_gather);
bb5547ac 271 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
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272 int (*add_device)(struct device *dev);
273 void (*remove_device)(struct device *dev);
46c6b2bc 274 struct iommu_group *(*device_group)(struct device *dev);
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275 int (*domain_get_attr)(struct iommu_domain *domain,
276 enum iommu_attr attr, void *data);
277 int (*domain_set_attr)(struct iommu_domain *domain,
278 enum iommu_attr attr, void *data);
d7787d57 279
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280 /* Request/Free a list of reserved regions for a device */
281 void (*get_resv_regions)(struct device *dev, struct list_head *list);
282 void (*put_resv_regions)(struct device *dev, struct list_head *list);
283 void (*apply_resv_region)(struct device *dev,
284 struct iommu_domain *domain,
285 struct iommu_resv_region *region);
a1015c2b 286
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287 /* Window handling functions */
288 int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f 289 phys_addr_t paddr, u64 size, int prot);
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290 void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
291
d0f60a44 292 int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
e01d1913 293 bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
d0f60a44 294
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295 /* Per device IOMMU features */
296 bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
297 bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
298 int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
299 int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
300
301 /* Aux-domain specific attach/detach entries */
302 int (*aux_attach_dev)(struct iommu_domain *domain, struct device *dev);
303 void (*aux_detach_dev)(struct iommu_domain *domain, struct device *dev);
304 int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev);
305
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306 struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
307 void *drvdata);
308 void (*sva_unbind)(struct iommu_sva *handle);
309 int (*sva_get_pasid)(struct iommu_sva *handle);
310
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311 int (*page_response)(struct device *dev,
312 struct iommu_fault_event *evt,
313 struct iommu_page_response *msg);
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314 int (*cache_invalidate)(struct iommu_domain *domain, struct device *dev,
315 struct iommu_cache_invalidate_info *inv_info);
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316 int (*sva_bind_gpasid)(struct iommu_domain *domain,
317 struct device *dev, struct iommu_gpasid_bind_data *data);
318
319 int (*sva_unbind_gpasid)(struct device *dev, int pasid);
bf3255b3 320
7d3002cc 321 unsigned long pgsize_bitmap;
25f003de 322 struct module *owner;
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323};
324
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325/**
326 * struct iommu_device - IOMMU core representation of one IOMMU hardware
327 * instance
328 * @list: Used by the iommu-core to keep a list of registered iommus
329 * @ops: iommu-ops for talking to this iommu
39ab9555 330 * @dev: struct device for sysfs handling
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331 */
332struct iommu_device {
333 struct list_head list;
334 const struct iommu_ops *ops;
c73e1ac8 335 struct fwnode_handle *fwnode;
2926a2aa 336 struct device *dev;
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337};
338
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339/**
340 * struct iommu_fault_event - Generic fault event
341 *
342 * Can represent recoverable faults such as a page requests or
343 * unrecoverable faults such as DMA or IRQ remapping faults.
344 *
345 * @fault: fault descriptor
bf3255b3 346 * @list: pending fault event list, used for tracking responses
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347 */
348struct iommu_fault_event {
349 struct iommu_fault fault;
bf3255b3 350 struct list_head list;
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351};
352
353/**
354 * struct iommu_fault_param - per-device IOMMU fault data
355 * @handler: Callback function to handle IOMMU faults at device level
356 * @data: handler private data
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357 * @faults: holds the pending faults which needs response
358 * @lock: protect pending faults list
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359 */
360struct iommu_fault_param {
361 iommu_dev_fault_handler_t handler;
362 void *data;
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363 struct list_head faults;
364 struct mutex lock;
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365};
366
367/**
368 * struct iommu_param - collection of per-device IOMMU data
369 *
370 * @fault_param: IOMMU detected device fault reporting data
371 *
372 * TODO: migrate other per device data pointers under iommu_dev_data, e.g.
373 * struct iommu_group *iommu_group;
374 * struct iommu_fwspec *iommu_fwspec;
375 */
376struct iommu_param {
0c830e6b 377 struct mutex lock;
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378 struct iommu_fault_param *fault_param;
379};
380
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381int iommu_device_register(struct iommu_device *iommu);
382void iommu_device_unregister(struct iommu_device *iommu);
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383int iommu_device_sysfs_add(struct iommu_device *iommu,
384 struct device *parent,
385 const struct attribute_group **groups,
386 const char *fmt, ...) __printf(4, 5);
387void iommu_device_sysfs_remove(struct iommu_device *iommu);
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388int iommu_device_link(struct iommu_device *iommu, struct device *link);
389void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
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390
391static inline void iommu_device_set_ops(struct iommu_device *iommu,
392 const struct iommu_ops *ops)
393{
394 iommu->ops = ops;
395}
396
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397static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
398 struct fwnode_handle *fwnode)
399{
400 iommu->fwnode = fwnode;
401}
402
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403static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
404{
405 return (struct iommu_device *)dev_get_drvdata(dev);
406}
407
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408static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
409{
410 *gather = (struct iommu_iotlb_gather) {
411 .start = ULONG_MAX,
412 };
413}
414
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415#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
416#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
417#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
418#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
419#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
420#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
421
b22f6434 422extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
a1b60c1c 423extern bool iommu_present(struct bus_type *bus);
3c0e0ca0 424extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
905d66c1 425extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
aa16bea9 426extern struct iommu_group *iommu_group_get_by_id(int id);
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427extern void iommu_domain_free(struct iommu_domain *domain);
428extern int iommu_attach_device(struct iommu_domain *domain,
429 struct device *dev);
430extern void iommu_detach_device(struct iommu_domain *domain,
431 struct device *dev);
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432extern int iommu_cache_invalidate(struct iommu_domain *domain,
433 struct device *dev,
434 struct iommu_cache_invalidate_info *inv_info);
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435extern int iommu_sva_bind_gpasid(struct iommu_domain *domain,
436 struct device *dev, struct iommu_gpasid_bind_data *data);
437extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
438 struct device *dev, ioasid_t pasid);
2c1296d9 439extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
6af588fe 440extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
cefc53c7 441extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
7d3002cc 442 phys_addr_t paddr, size_t size, int prot);
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443extern int iommu_map_atomic(struct iommu_domain *domain, unsigned long iova,
444 phys_addr_t paddr, size_t size, int prot);
7d3002cc 445extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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446 size_t size);
447extern size_t iommu_unmap_fast(struct iommu_domain *domain,
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448 unsigned long iova, size_t size,
449 struct iommu_iotlb_gather *iotlb_gather);
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450extern size_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
451 struct scatterlist *sg,unsigned int nents, int prot);
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452extern size_t iommu_map_sg_atomic(struct iommu_domain *domain,
453 unsigned long iova, struct scatterlist *sg,
454 unsigned int nents, int prot);
bb5547ac 455extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
4f3f8d9d 456extern void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 457 iommu_fault_handler_t handler, void *token);
d72e31c9 458
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459extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
460extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
d290f1e7 461extern int iommu_request_dm_for_dev(struct device *dev);
7423e017 462extern int iommu_request_dma_domain_for_dev(struct device *dev);
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463extern void iommu_set_default_passthrough(bool cmd_line);
464extern void iommu_set_default_translated(bool cmd_line);
465extern bool iommu_default_passthrough(void);
2b20cbba 466extern struct iommu_resv_region *
9d3a4de4
RM
467iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
468 enum iommu_resv_type type);
6c65fb31
EA
469extern int iommu_get_group_resv_regions(struct iommu_group *group,
470 struct list_head *head);
a1015c2b 471
d72e31c9
AW
472extern int iommu_attach_group(struct iommu_domain *domain,
473 struct iommu_group *group);
474extern void iommu_detach_group(struct iommu_domain *domain,
475 struct iommu_group *group);
476extern struct iommu_group *iommu_group_alloc(void);
477extern void *iommu_group_get_iommudata(struct iommu_group *group);
478extern void iommu_group_set_iommudata(struct iommu_group *group,
479 void *iommu_data,
480 void (*release)(void *iommu_data));
481extern int iommu_group_set_name(struct iommu_group *group, const char *name);
482extern int iommu_group_add_device(struct iommu_group *group,
483 struct device *dev);
484extern void iommu_group_remove_device(struct device *dev);
485extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
486 int (*fn)(struct device *, void *));
487extern struct iommu_group *iommu_group_get(struct device *dev);
13f59a78 488extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
d72e31c9
AW
489extern void iommu_group_put(struct iommu_group *group);
490extern int iommu_group_register_notifier(struct iommu_group *group,
491 struct notifier_block *nb);
492extern int iommu_group_unregister_notifier(struct iommu_group *group,
493 struct notifier_block *nb);
0c830e6b
JP
494extern int iommu_register_device_fault_handler(struct device *dev,
495 iommu_dev_fault_handler_t handler,
496 void *data);
497
498extern int iommu_unregister_device_fault_handler(struct device *dev);
499
500extern int iommu_report_device_fault(struct device *dev,
501 struct iommu_fault_event *evt);
bf3255b3
JPB
502extern int iommu_page_response(struct device *dev,
503 struct iommu_page_response *msg);
0c830e6b 504
d72e31c9 505extern int iommu_group_id(struct iommu_group *group);
104a1c13 506extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
6827ca83 507extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
4f3f8d9d 508
0cd76dd1
JR
509extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
510 void *data);
511extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
512 void *data);
4f3f8d9d 513
d7787d57
JR
514/* Window handling function prototypes */
515extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f
VS
516 phys_addr_t offset, u64 size,
517 int prot);
d7787d57 518extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
207c6e36
JR
519
520extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
521 unsigned long iova, int flags);
4a77a6cf 522
add02cfd
JR
523static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
524{
525 if (domain->ops->flush_iotlb_all)
526 domain->ops->flush_iotlb_all(domain);
527}
528
a7d20dc1
WD
529static inline void iommu_tlb_sync(struct iommu_domain *domain,
530 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
531{
532 if (domain->ops->iotlb_sync)
56f8af5e 533 domain->ops->iotlb_sync(domain, iotlb_gather);
a7d20dc1
WD
534
535 iommu_iotlb_gather_init(iotlb_gather);
add02cfd
JR
536}
537
4fcf8544
WD
538static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
539 struct iommu_iotlb_gather *gather,
540 unsigned long iova, size_t size)
541{
542 unsigned long start = iova, end = start + size;
543
544 /*
545 * If the new page is disjoint from the current range or is mapped at
546 * a different granularity, then sync the TLB so that the gather
547 * structure can be rewritten.
548 */
549 if (gather->pgsize != size ||
550 end < gather->start || start > gather->end) {
551 if (gather->pgsize)
552 iommu_tlb_sync(domain, gather);
553 gather->pgsize = size;
554 }
555
556 if (gather->end < end)
557 gather->end = end;
558
559 if (gather->start > start)
560 gather->start = start;
561}
562
5e62292b
JR
563/* PCI device grouping function */
564extern struct iommu_group *pci_device_group(struct device *dev);
6eab556a
JR
565/* Generic device grouping function */
566extern struct iommu_group *generic_device_group(struct device *dev);
eab03e2a
NG
567/* FSL-MC device grouping function */
568struct iommu_group *fsl_mc_device_group(struct device *dev);
5e62292b 569
57f98d2f
RM
570/**
571 * struct iommu_fwspec - per-device IOMMU instance data
572 * @ops: ops for this device's IOMMU
573 * @iommu_fwnode: firmware handle for this device's IOMMU
574 * @iommu_priv: IOMMU driver private data for this device
575 * @num_ids: number of associated device IDs
576 * @ids: IDs which this device may present to the IOMMU
577 */
578struct iommu_fwspec {
579 const struct iommu_ops *ops;
580 struct fwnode_handle *iommu_fwnode;
581 void *iommu_priv;
5702ee24 582 u32 flags;
57f98d2f
RM
583 unsigned int num_ids;
584 u32 ids[1];
585};
586
5702ee24
JPB
587/* ATS is supported */
588#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
589
26b25a2b
JPB
590/**
591 * struct iommu_sva - handle to a device-mm bond
592 */
593struct iommu_sva {
594 struct device *dev;
595 const struct iommu_sva_ops *ops;
596};
597
57f98d2f
RM
598int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
599 const struct iommu_ops *ops);
600void iommu_fwspec_free(struct device *dev);
601int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
534766df 602const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
57f98d2f 603
b4ef725e
JR
604static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
605{
606 return dev->iommu_fwspec;
607}
608
609static inline void dev_iommu_fwspec_set(struct device *dev,
610 struct iommu_fwspec *fwspec)
611{
612 dev->iommu_fwspec = fwspec;
613}
614
cc5aed44
JR
615int iommu_probe_device(struct device *dev);
616void iommu_release_device(struct device *dev);
617
a3a19592
LB
618bool iommu_dev_has_feature(struct device *dev, enum iommu_dev_features f);
619int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
620int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
621bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f);
622int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev);
623void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev);
624int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev);
625
26b25a2b
JPB
626struct iommu_sva *iommu_sva_bind_device(struct device *dev,
627 struct mm_struct *mm,
628 void *drvdata);
629void iommu_sva_unbind_device(struct iommu_sva *handle);
630int iommu_sva_set_ops(struct iommu_sva *handle,
631 const struct iommu_sva_ops *ops);
632int iommu_sva_get_pasid(struct iommu_sva *handle);
633
4a77a6cf
JR
634#else /* CONFIG_IOMMU_API */
635
39d4ebb9 636struct iommu_ops {};
d72e31c9 637struct iommu_group {};
57f98d2f 638struct iommu_fwspec {};
b0119e87 639struct iommu_device {};
4e32348b 640struct iommu_fault_param {};
a7d20dc1 641struct iommu_iotlb_gather {};
4a77a6cf 642
a1b60c1c 643static inline bool iommu_present(struct bus_type *bus)
4a77a6cf
JR
644{
645 return false;
646}
647
3c0e0ca0
JR
648static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
649{
650 return false;
651}
652
905d66c1 653static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
4a77a6cf
JR
654{
655 return NULL;
656}
657
b62dfd29
AK
658static inline struct iommu_group *iommu_group_get_by_id(int id)
659{
660 return NULL;
661}
662
4a77a6cf
JR
663static inline void iommu_domain_free(struct iommu_domain *domain)
664{
665}
666
667static inline int iommu_attach_device(struct iommu_domain *domain,
668 struct device *dev)
669{
670 return -ENODEV;
671}
672
673static inline void iommu_detach_device(struct iommu_domain *domain,
674 struct device *dev)
675{
676}
677
2c1296d9
JR
678static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
679{
680 return NULL;
681}
682
cefc53c7 683static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
ebae3e83 684 phys_addr_t paddr, size_t size, int prot)
cefc53c7
JR
685{
686 return -ENODEV;
687}
688
781ca2de
TM
689static inline int iommu_map_atomic(struct iommu_domain *domain,
690 unsigned long iova, phys_addr_t paddr,
691 size_t size, int prot)
692{
693 return -ENODEV;
694}
695
c5611a87
SS
696static inline size_t iommu_unmap(struct iommu_domain *domain,
697 unsigned long iova, size_t size)
cefc53c7 698{
c5611a87 699 return 0;
cefc53c7
JR
700}
701
c5611a87 702static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
703 unsigned long iova, int gfp_order,
704 struct iommu_iotlb_gather *iotlb_gather)
cefc53c7 705{
c5611a87 706 return 0;
cefc53c7
JR
707}
708
315786eb
OH
709static inline size_t iommu_map_sg(struct iommu_domain *domain,
710 unsigned long iova, struct scatterlist *sg,
711 unsigned int nents, int prot)
712{
c5611a87 713 return 0;
315786eb
OH
714}
715
781ca2de
TM
716static inline size_t iommu_map_sg_atomic(struct iommu_domain *domain,
717 unsigned long iova, struct scatterlist *sg,
718 unsigned int nents, int prot)
719{
720 return 0;
721}
722
add02cfd
JR
723static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
724{
725}
726
a7d20dc1
WD
727static inline void iommu_tlb_sync(struct iommu_domain *domain,
728 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
729{
730}
731
d7787d57
JR
732static inline int iommu_domain_window_enable(struct iommu_domain *domain,
733 u32 wnd_nr, phys_addr_t paddr,
80f97f0f 734 u64 size, int prot)
d7787d57
JR
735{
736 return -ENODEV;
737}
738
739static inline void iommu_domain_window_disable(struct iommu_domain *domain,
740 u32 wnd_nr)
741{
742}
743
bb5547ac 744static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
4a77a6cf
JR
745{
746 return 0;
747}
748
4f3f8d9d 749static inline void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 750 iommu_fault_handler_t handler, void *token)
4f3f8d9d
OBC
751{
752}
753
e5b5234a 754static inline void iommu_get_resv_regions(struct device *dev,
a1015c2b
JR
755 struct list_head *list)
756{
757}
758
e5b5234a 759static inline void iommu_put_resv_regions(struct device *dev,
a1015c2b
JR
760 struct list_head *list)
761{
762}
763
6c65fb31
EA
764static inline int iommu_get_group_resv_regions(struct iommu_group *group,
765 struct list_head *head)
766{
767 return -ENODEV;
768}
769
d290f1e7
JR
770static inline int iommu_request_dm_for_dev(struct device *dev)
771{
772 return -ENODEV;
773}
774
7423e017
LB
775static inline int iommu_request_dma_domain_for_dev(struct device *dev)
776{
777 return -ENODEV;
778}
779
8a69961c
JR
780static inline void iommu_set_default_passthrough(bool cmd_line)
781{
782}
783
784static inline void iommu_set_default_translated(bool cmd_line)
785{
786}
787
788static inline bool iommu_default_passthrough(void)
789{
790 return true;
791}
792
bef83de5
AW
793static inline int iommu_attach_group(struct iommu_domain *domain,
794 struct iommu_group *group)
d72e31c9
AW
795{
796 return -ENODEV;
797}
798
bef83de5
AW
799static inline void iommu_detach_group(struct iommu_domain *domain,
800 struct iommu_group *group)
d72e31c9
AW
801{
802}
803
bef83de5 804static inline struct iommu_group *iommu_group_alloc(void)
d72e31c9
AW
805{
806 return ERR_PTR(-ENODEV);
807}
808
bef83de5 809static inline void *iommu_group_get_iommudata(struct iommu_group *group)
d72e31c9
AW
810{
811 return NULL;
812}
813
bef83de5
AW
814static inline void iommu_group_set_iommudata(struct iommu_group *group,
815 void *iommu_data,
816 void (*release)(void *iommu_data))
d72e31c9
AW
817{
818}
819
bef83de5
AW
820static inline int iommu_group_set_name(struct iommu_group *group,
821 const char *name)
d72e31c9
AW
822{
823 return -ENODEV;
824}
825
bef83de5
AW
826static inline int iommu_group_add_device(struct iommu_group *group,
827 struct device *dev)
d72e31c9
AW
828{
829 return -ENODEV;
830}
831
bef83de5 832static inline void iommu_group_remove_device(struct device *dev)
d72e31c9
AW
833{
834}
835
bef83de5
AW
836static inline int iommu_group_for_each_dev(struct iommu_group *group,
837 void *data,
838 int (*fn)(struct device *, void *))
d72e31c9
AW
839{
840 return -ENODEV;
841}
842
bef83de5 843static inline struct iommu_group *iommu_group_get(struct device *dev)
d72e31c9
AW
844{
845 return NULL;
846}
847
bef83de5 848static inline void iommu_group_put(struct iommu_group *group)
d72e31c9
AW
849{
850}
851
bef83de5
AW
852static inline int iommu_group_register_notifier(struct iommu_group *group,
853 struct notifier_block *nb)
1460432c
AW
854{
855 return -ENODEV;
856}
857
bef83de5
AW
858static inline int iommu_group_unregister_notifier(struct iommu_group *group,
859 struct notifier_block *nb)
d72e31c9
AW
860{
861 return 0;
862}
863
0c830e6b
JP
864static inline
865int iommu_register_device_fault_handler(struct device *dev,
866 iommu_dev_fault_handler_t handler,
867 void *data)
868{
869 return -ENODEV;
870}
871
872static inline int iommu_unregister_device_fault_handler(struct device *dev)
873{
874 return 0;
875}
876
877static inline
878int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt)
879{
880 return -ENODEV;
881}
882
bf3255b3
JPB
883static inline int iommu_page_response(struct device *dev,
884 struct iommu_page_response *msg)
885{
886 return -ENODEV;
887}
888
bef83de5 889static inline int iommu_group_id(struct iommu_group *group)
d72e31c9
AW
890{
891 return -ENODEV;
892}
1460432c 893
0cd76dd1
JR
894static inline int iommu_domain_get_attr(struct iommu_domain *domain,
895 enum iommu_attr attr, void *data)
896{
897 return -EINVAL;
898}
899
900static inline int iommu_domain_set_attr(struct iommu_domain *domain,
901 enum iommu_attr attr, void *data)
902{
903 return -EINVAL;
904}
905
39ab9555 906static inline int iommu_device_register(struct iommu_device *iommu)
c61959ec 907{
39ab9555 908 return -ENODEV;
c61959ec
AW
909}
910
39ab9555
JR
911static inline void iommu_device_set_ops(struct iommu_device *iommu,
912 const struct iommu_ops *ops)
c61959ec 913{
c61959ec
AW
914}
915
c73e1ac8
JR
916static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
917 struct fwnode_handle *fwnode)
c61959ec 918{
c61959ec
AW
919}
920
2926a2aa
JR
921static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
922{
923 return NULL;
924}
925
a7d20dc1
WD
926static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
927{
928}
929
4fcf8544
WD
930static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
931 struct iommu_iotlb_gather *gather,
932 unsigned long iova, size_t size)
933{
934}
935
39ab9555 936static inline void iommu_device_unregister(struct iommu_device *iommu)
c61959ec 937{
c61959ec
AW
938}
939
39ab9555
JR
940static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
941 struct device *parent,
942 const struct attribute_group **groups,
943 const char *fmt, ...)
b0119e87 944{
39ab9555 945 return -ENODEV;
b0119e87
JR
946}
947
39ab9555 948static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
c61959ec
AW
949{
950}
951
e09f8ea5 952static inline int iommu_device_link(struct device *dev, struct device *link)
c61959ec
AW
953{
954 return -EINVAL;
955}
956
e09f8ea5 957static inline void iommu_device_unlink(struct device *dev, struct device *link)
c61959ec
AW
958{
959}
960
57f98d2f
RM
961static inline int iommu_fwspec_init(struct device *dev,
962 struct fwnode_handle *iommu_fwnode,
963 const struct iommu_ops *ops)
964{
965 return -ENODEV;
966}
967
968static inline void iommu_fwspec_free(struct device *dev)
969{
970}
971
972static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
973 int num_ids)
974{
975 return -ENODEV;
976}
977
e4f10ffe 978static inline
534766df 979const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
e4f10ffe
LP
980{
981 return NULL;
982}
983
a3a19592
LB
984static inline bool
985iommu_dev_has_feature(struct device *dev, enum iommu_dev_features feat)
986{
987 return false;
988}
989
990static inline bool
991iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat)
992{
993 return false;
994}
995
996static inline int
997iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat)
998{
999 return -ENODEV;
1000}
1001
1002static inline int
1003iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
1004{
1005 return -ENODEV;
1006}
1007
1008static inline int
1009iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev)
1010{
1011 return -ENODEV;
1012}
1013
1014static inline void
1015iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev)
1016{
1017}
1018
1019static inline int
1020iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev)
1021{
1022 return -ENODEV;
1023}
1024
26b25a2b
JPB
1025static inline struct iommu_sva *
1026iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata)
1027{
1028 return NULL;
1029}
1030
1031static inline void iommu_sva_unbind_device(struct iommu_sva *handle)
1032{
1033}
1034
1035static inline int iommu_sva_set_ops(struct iommu_sva *handle,
1036 const struct iommu_sva_ops *ops)
1037{
1038 return -EINVAL;
1039}
1040
1041static inline int iommu_sva_get_pasid(struct iommu_sva *handle)
1042{
1043 return IOMMU_PASID_INVALID;
1044}
1045
4c7c171f
YL
1046static inline int
1047iommu_cache_invalidate(struct iommu_domain *domain,
1048 struct device *dev,
1049 struct iommu_cache_invalidate_info *inv_info)
1050{
1051 return -ENODEV;
1052}
808be0aa
JP
1053static inline int iommu_sva_bind_gpasid(struct iommu_domain *domain,
1054 struct device *dev, struct iommu_gpasid_bind_data *data)
1055{
1056 return -ENODEV;
1057}
1058
1059static inline int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
1060 struct device *dev, int pasid)
1061{
1062 return -ENODEV;
1063}
4c7c171f 1064
4a77a6cf
JR
1065#endif /* CONFIG_IOMMU_API */
1066
bad614b2
GH
1067#ifdef CONFIG_IOMMU_DEBUGFS
1068extern struct dentry *iommu_debugfs_dir;
1069void iommu_debugfs_setup(void);
1070#else
1071static inline void iommu_debugfs_setup(void) {}
1072#endif
1073
4a77a6cf 1074#endif /* __LINUX_IOMMU_H */