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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * Copyright 2003-2005 Red Hat, Inc. All rights reserved. |
3 | * Copyright 2003-2005 Jeff Garzik | |
4 | * | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2, or (at your option) | |
9 | * any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; see the file COPYING. If not, write to | |
18 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | * | |
20 | * | |
21 | * libata documentation is available via 'make {ps|pdf}docs', | |
22 | * as Documentation/DocBook/libata.* | |
23 | * | |
1da177e4 LT |
24 | */ |
25 | ||
26 | #ifndef __LINUX_LIBATA_H__ | |
27 | #define __LINUX_LIBATA_H__ | |
28 | ||
29 | #include <linux/delay.h> | |
30 | #include <linux/interrupt.h> | |
31 | #include <linux/pci.h> | |
1c72d8d9 | 32 | #include <linux/dma-mapping.h> |
1da177e4 LT |
33 | #include <asm/io.h> |
34 | #include <linux/ata.h> | |
35 | #include <linux/workqueue.h> | |
36 | ||
37 | /* | |
bfd60579 RD |
38 | * compile-time options: to be removed as soon as all the drivers are |
39 | * converted to the new debugging mechanism | |
1da177e4 LT |
40 | */ |
41 | #undef ATA_DEBUG /* debugging output */ | |
42 | #undef ATA_VERBOSE_DEBUG /* yet more debugging output */ | |
43 | #undef ATA_IRQ_TRAP /* define to ack screaming irqs */ | |
44 | #undef ATA_NDEBUG /* define to disable quick runtime checks */ | |
1da177e4 LT |
45 | #undef ATA_ENABLE_PATA /* define to enable PATA support in some |
46 | * low-level drivers */ | |
47 | #undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */ | |
48 | ||
49 | ||
50 | /* note: prints function name for you */ | |
51 | #ifdef ATA_DEBUG | |
52 | #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) | |
53 | #ifdef ATA_VERBOSE_DEBUG | |
54 | #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) | |
55 | #else | |
56 | #define VPRINTK(fmt, args...) | |
57 | #endif /* ATA_VERBOSE_DEBUG */ | |
58 | #else | |
59 | #define DPRINTK(fmt, args...) | |
60 | #define VPRINTK(fmt, args...) | |
61 | #endif /* ATA_DEBUG */ | |
62 | ||
2c13b7ce JG |
63 | #define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) |
64 | ||
bfd60579 RD |
65 | /* NEW: debug levels */ |
66 | #define HAVE_LIBATA_MSG 1 | |
67 | ||
68 | enum { | |
69 | ATA_MSG_DRV = 0x0001, | |
70 | ATA_MSG_INFO = 0x0002, | |
71 | ATA_MSG_PROBE = 0x0004, | |
72 | ATA_MSG_WARN = 0x0008, | |
73 | ATA_MSG_MALLOC = 0x0010, | |
74 | ATA_MSG_CTL = 0x0020, | |
75 | ATA_MSG_INTR = 0x0040, | |
76 | ATA_MSG_ERR = 0x0080, | |
77 | }; | |
78 | ||
79 | #define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV) | |
80 | #define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO) | |
81 | #define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE) | |
82 | #define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN) | |
83 | #define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC) | |
84 | #define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL) | |
85 | #define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR) | |
86 | #define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR) | |
87 | ||
88 | static inline u32 ata_msg_init(int dval, int default_msg_enable_bits) | |
89 | { | |
90 | if (dval < 0 || dval >= (sizeof(u32) * 8)) | |
91 | return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */ | |
92 | if (!dval) | |
93 | return 0; | |
94 | return (1 << dval) - 1; | |
95 | } | |
96 | ||
1da177e4 LT |
97 | /* defines only for the constants which don't work well as enums */ |
98 | #define ATA_TAG_POISON 0xfafbfcfdU | |
99 | ||
100 | /* move to PCI layer? */ | |
101 | static inline struct device *pci_dev_to_dev(struct pci_dev *pdev) | |
102 | { | |
103 | return &pdev->dev; | |
104 | } | |
105 | ||
106 | enum { | |
107 | /* various global constants */ | |
108 | LIBATA_MAX_PRD = ATA_MAX_PRD / 2, | |
109 | ATA_MAX_PORTS = 8, | |
110 | ATA_DEF_QUEUE = 1, | |
111 | ATA_MAX_QUEUE = 1, | |
112 | ATA_MAX_SECTORS = 200, /* FIXME */ | |
113 | ATA_MAX_BUS = 2, | |
114 | ATA_DEF_BUSY_WAIT = 10000, | |
115 | ATA_SHORT_PAUSE = (HZ >> 6) + 1, | |
116 | ||
117 | ATA_SHT_EMULATED = 1, | |
118 | ATA_SHT_CMD_PER_LUN = 1, | |
119 | ATA_SHT_THIS_ID = -1, | |
cf482935 | 120 | ATA_SHT_USE_CLUSTERING = 1, |
1da177e4 LT |
121 | |
122 | /* struct ata_device stuff */ | |
949b38af TH |
123 | ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */ |
124 | ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */ | |
ea1dd4e1 | 125 | ATA_DFLAG_CFG_MASK = (1 << 8) - 1, |
949b38af TH |
126 | |
127 | ATA_DFLAG_PIO = (1 << 8), /* device currently in PIO mode */ | |
1da177e4 LT |
128 | |
129 | ATA_DEV_UNKNOWN = 0, /* unknown device */ | |
130 | ATA_DEV_ATA = 1, /* ATA device */ | |
131 | ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */ | |
132 | ATA_DEV_ATAPI = 3, /* ATAPI device */ | |
133 | ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */ | |
134 | ATA_DEV_NONE = 5, /* no device */ | |
135 | ||
136 | /* struct ata_port flags */ | |
949b38af | 137 | ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */ |
1da177e4 | 138 | /* (doesn't imply presence) */ |
949b38af TH |
139 | ATA_FLAG_SATA = (1 << 1), |
140 | ATA_FLAG_NO_LEGACY = (1 << 2), /* no legacy mode check */ | |
141 | ATA_FLAG_MMIO = (1 << 3), /* use MMIO, not PIO */ | |
142 | ATA_FLAG_SRST = (1 << 4), /* (obsolete) use ATA SRST, not E.D.D. */ | |
143 | ATA_FLAG_SATA_RESET = (1 << 5), /* (obsolete) use COMRESET */ | |
144 | ATA_FLAG_NO_ATAPI = (1 << 6), /* No ATAPI support */ | |
145 | ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */ | |
146 | ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */ | |
147 | ATA_FLAG_IRQ_MASK = (1 << 9), /* Mask IRQ in PIO xfers */ | |
148 | ||
149 | ATA_FLAG_NOINTR = (1 << 16), /* FIXME: Remove this once | |
150 | * proper HSM is in place. */ | |
151 | ATA_FLAG_DEBUGMSG = (1 << 17), | |
152 | ATA_FLAG_FLUSH_PORT_TASK = (1 << 18), /* flush port task */ | |
153 | ||
198e0fed | 154 | ATA_FLAG_DISABLED = (1 << 19), /* port is disabled, ignore it */ |
949b38af TH |
155 | ATA_FLAG_SUSPENDED = (1 << 20), /* port is suspended */ |
156 | ||
157 | /* bits 24:31 of ap->flags are reserved for LLDD specific flags */ | |
158 | ||
159 | /* struct ata_queued_cmd flags */ | |
160 | ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */ | |
161 | ATA_QCFLAG_SG = (1 << 1), /* have s/g table? */ | |
162 | ATA_QCFLAG_SINGLE = (1 << 2), /* no s/g, just a single buffer */ | |
1da177e4 | 163 | ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE, |
949b38af | 164 | ATA_QCFLAG_EH_SCHEDULED = (1 << 3), /* EH scheduled */ |
1da177e4 | 165 | |
4e5ec5db AC |
166 | /* host set flags */ |
167 | ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */ | |
168 | ||
1da177e4 | 169 | /* various lengths of time */ |
1da177e4 | 170 | ATA_TMOUT_PIO = 30 * HZ, |
8d238e01 AC |
171 | ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ |
172 | ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */ | |
1da177e4 LT |
173 | ATA_TMOUT_CDB = 30 * HZ, |
174 | ATA_TMOUT_CDB_QUICK = 5 * HZ, | |
a2a7a662 TH |
175 | ATA_TMOUT_INTERNAL = 30 * HZ, |
176 | ATA_TMOUT_INTERNAL_QUICK = 5 * HZ, | |
1da177e4 LT |
177 | |
178 | /* ATA bus states */ | |
179 | BUS_UNKNOWN = 0, | |
180 | BUS_DMA = 1, | |
181 | BUS_IDLE = 2, | |
182 | BUS_NOINTR = 3, | |
183 | BUS_NODATA = 4, | |
184 | BUS_TIMER = 5, | |
185 | BUS_PIO = 6, | |
186 | BUS_EDD = 7, | |
187 | BUS_IDENTIFY = 8, | |
188 | BUS_PACKET = 9, | |
189 | ||
190 | /* SATA port states */ | |
191 | PORT_UNKNOWN = 0, | |
192 | PORT_ENABLED = 1, | |
193 | PORT_DISABLED = 2, | |
194 | ||
195 | /* encoding various smaller bitmaps into a single | |
1da7b0d0 | 196 | * unsigned int bitmap |
1da177e4 | 197 | */ |
1da7b0d0 TH |
198 | ATA_BITS_PIO = 5, |
199 | ATA_BITS_MWDMA = 3, | |
200 | ATA_BITS_UDMA = 8, | |
201 | ||
202 | ATA_SHIFT_PIO = 0, | |
203 | ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO, | |
204 | ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA, | |
205 | ||
206 | ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO, | |
207 | ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA, | |
208 | ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA, | |
cedc9a47 JG |
209 | |
210 | /* size of buffer to pad xfers ending on unaligned boundaries */ | |
211 | ATA_DMA_PAD_SZ = 4, | |
212 | ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE, | |
949b38af TH |
213 | |
214 | /* masks for port functions */ | |
47a86593 AC |
215 | ATA_PORT_PRIMARY = (1 << 0), |
216 | ATA_PORT_SECONDARY = (1 << 1), | |
14d2bac1 TH |
217 | |
218 | /* how hard are we gonna try to probe/recover devices */ | |
219 | ATA_PROBE_MAX_TRIES = 3, | |
1da177e4 LT |
220 | }; |
221 | ||
14be71f4 AL |
222 | enum hsm_task_states { |
223 | HSM_ST_UNKNOWN, | |
224 | HSM_ST_IDLE, | |
225 | HSM_ST_POLL, | |
226 | HSM_ST_TMOUT, | |
227 | HSM_ST, | |
228 | HSM_ST_LAST, | |
229 | HSM_ST_LAST_POLL, | |
230 | HSM_ST_ERR, | |
1da177e4 LT |
231 | }; |
232 | ||
a7dac447 | 233 | enum ata_completion_errors { |
11a56d24 TH |
234 | AC_ERR_DEV = (1 << 0), /* device reported error */ |
235 | AC_ERR_HSM = (1 << 1), /* host state machine violation */ | |
236 | AC_ERR_TIMEOUT = (1 << 2), /* timeout */ | |
237 | AC_ERR_MEDIA = (1 << 3), /* media error */ | |
238 | AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */ | |
239 | AC_ERR_HOST_BUS = (1 << 5), /* host bus error */ | |
240 | AC_ERR_SYSTEM = (1 << 6), /* system error */ | |
241 | AC_ERR_INVALID = (1 << 7), /* invalid argument */ | |
242 | AC_ERR_OTHER = (1 << 8), /* unknown */ | |
a7dac447 JG |
243 | }; |
244 | ||
1da177e4 LT |
245 | /* forward declarations */ |
246 | struct scsi_device; | |
247 | struct ata_port_operations; | |
248 | struct ata_port; | |
249 | struct ata_queued_cmd; | |
250 | ||
251 | /* typedefs */ | |
77853bf2 | 252 | typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc); |
7944ea95 | 253 | typedef void (*ata_probeinit_fn_t)(struct ata_port *); |
a62c0fc5 TH |
254 | typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *); |
255 | typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *); | |
1da177e4 LT |
256 | |
257 | struct ata_ioports { | |
258 | unsigned long cmd_addr; | |
259 | unsigned long data_addr; | |
260 | unsigned long error_addr; | |
261 | unsigned long feature_addr; | |
262 | unsigned long nsect_addr; | |
263 | unsigned long lbal_addr; | |
264 | unsigned long lbam_addr; | |
265 | unsigned long lbah_addr; | |
266 | unsigned long device_addr; | |
267 | unsigned long status_addr; | |
268 | unsigned long command_addr; | |
269 | unsigned long altstatus_addr; | |
270 | unsigned long ctl_addr; | |
271 | unsigned long bmdma_addr; | |
272 | unsigned long scr_addr; | |
273 | }; | |
274 | ||
275 | struct ata_probe_ent { | |
276 | struct list_head node; | |
277 | struct device *dev; | |
057ace5e | 278 | const struct ata_port_operations *port_ops; |
193515d5 | 279 | struct scsi_host_template *sht; |
1da177e4 LT |
280 | struct ata_ioports port[ATA_MAX_PORTS]; |
281 | unsigned int n_ports; | |
282 | unsigned int hard_port_no; | |
283 | unsigned int pio_mask; | |
284 | unsigned int mwdma_mask; | |
285 | unsigned int udma_mask; | |
286 | unsigned int legacy_mode; | |
287 | unsigned long irq; | |
288 | unsigned int irq_flags; | |
289 | unsigned long host_flags; | |
4e5ec5db | 290 | unsigned long host_set_flags; |
1da177e4 LT |
291 | void __iomem *mmio_base; |
292 | void *private_data; | |
293 | }; | |
294 | ||
295 | struct ata_host_set { | |
296 | spinlock_t lock; | |
297 | struct device *dev; | |
298 | unsigned long irq; | |
299 | void __iomem *mmio_base; | |
300 | unsigned int n_ports; | |
301 | void *private_data; | |
057ace5e | 302 | const struct ata_port_operations *ops; |
5444a6f4 AC |
303 | unsigned long flags; |
304 | int simplex_claimed; /* Keep seperate in case we | |
305 | ever need to do this locked */ | |
1da177e4 LT |
306 | struct ata_port * ports[0]; |
307 | }; | |
308 | ||
309 | struct ata_queued_cmd { | |
310 | struct ata_port *ap; | |
311 | struct ata_device *dev; | |
312 | ||
313 | struct scsi_cmnd *scsicmd; | |
314 | void (*scsidone)(struct scsi_cmnd *); | |
315 | ||
316 | struct ata_taskfile tf; | |
317 | u8 cdb[ATAPI_CDB_LEN]; | |
318 | ||
319 | unsigned long flags; /* ATA_QCFLAG_xxx */ | |
320 | unsigned int tag; | |
321 | unsigned int n_elem; | |
cedc9a47 | 322 | unsigned int orig_n_elem; |
1da177e4 LT |
323 | |
324 | int dma_dir; | |
325 | ||
cedc9a47 JG |
326 | unsigned int pad_len; |
327 | ||
1da177e4 LT |
328 | unsigned int nsect; |
329 | unsigned int cursect; | |
330 | ||
331 | unsigned int nbytes; | |
332 | unsigned int curbytes; | |
333 | ||
334 | unsigned int cursg; | |
335 | unsigned int cursg_ofs; | |
336 | ||
337 | struct scatterlist sgent; | |
cedc9a47 | 338 | struct scatterlist pad_sgent; |
1da177e4 LT |
339 | void *buf_virt; |
340 | ||
cedc9a47 JG |
341 | /* DO NOT iterate over __sg manually, use ata_for_each_sg() */ |
342 | struct scatterlist *__sg; | |
1da177e4 | 343 | |
a22e2eb0 AL |
344 | unsigned int err_mask; |
345 | ||
1da177e4 LT |
346 | ata_qc_cb_t complete_fn; |
347 | ||
1da177e4 LT |
348 | void *private_data; |
349 | }; | |
350 | ||
351 | struct ata_host_stats { | |
352 | unsigned long unhandled_irq; | |
353 | unsigned long idle_irq; | |
354 | unsigned long rw_reqbuf; | |
355 | }; | |
356 | ||
357 | struct ata_device { | |
358 | u64 n_sectors; /* size of device, if ATA */ | |
359 | unsigned long flags; /* ATA_DFLAG_xxx */ | |
360 | unsigned int class; /* ATA_DEV_xxx */ | |
361 | unsigned int devno; /* 0 or 1 */ | |
d9572b1d | 362 | u16 *id; /* IDENTIFY xxx DEVICE data */ |
1da177e4 LT |
363 | u8 pio_mode; |
364 | u8 dma_mode; | |
365 | u8 xfer_mode; | |
366 | unsigned int xfer_shift; /* ATA_SHIFT_xxx */ | |
367 | ||
8cbd6df1 AL |
368 | unsigned int multi_count; /* sectors count for |
369 | READ/WRITE MULTIPLE */ | |
b00eec1d | 370 | unsigned int max_sectors; /* per-device max sectors */ |
6e7846e9 | 371 | unsigned int cdb_len; |
8bf62ece | 372 | |
acf356b1 TH |
373 | /* per-dev xfer mask */ |
374 | unsigned int pio_mask; | |
375 | unsigned int mwdma_mask; | |
376 | unsigned int udma_mask; | |
377 | ||
8bf62ece AL |
378 | /* for CHS addressing */ |
379 | u16 cylinders; /* Number of cylinders */ | |
380 | u16 heads; /* Number of heads */ | |
381 | u16 sectors; /* Number of sectors per track */ | |
1da177e4 LT |
382 | }; |
383 | ||
384 | struct ata_port { | |
385 | struct Scsi_Host *host; /* our co-allocated scsi host */ | |
057ace5e | 386 | const struct ata_port_operations *ops; |
1da177e4 LT |
387 | unsigned long flags; /* ATA_FLAG_xxx */ |
388 | unsigned int id; /* unique id req'd by scsi midlyr */ | |
389 | unsigned int port_no; /* unique port #; from zero */ | |
390 | unsigned int hard_port_no; /* hardware port #; from zero */ | |
391 | ||
392 | struct ata_prd *prd; /* our SG list */ | |
393 | dma_addr_t prd_dma; /* and its DMA mapping */ | |
394 | ||
cedc9a47 JG |
395 | void *pad; /* array of DMA pad buffers */ |
396 | dma_addr_t pad_dma; | |
397 | ||
1da177e4 LT |
398 | struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */ |
399 | ||
400 | u8 ctl; /* cache of ATA control register */ | |
401 | u8 last_ctl; /* Cache last written value */ | |
1da177e4 LT |
402 | unsigned int pio_mask; |
403 | unsigned int mwdma_mask; | |
404 | unsigned int udma_mask; | |
405 | unsigned int cbl; /* cable type; ATA_CBL_xxx */ | |
1c3fae4d | 406 | unsigned int sata_spd_limit; /* SATA PHY speed limit */ |
1da177e4 LT |
407 | |
408 | struct ata_device device[ATA_MAX_DEVICES]; | |
409 | ||
410 | struct ata_queued_cmd qcmd[ATA_MAX_QUEUE]; | |
411 | unsigned long qactive; | |
412 | unsigned int active_tag; | |
413 | ||
414 | struct ata_host_stats stats; | |
415 | struct ata_host_set *host_set; | |
2f1f610b | 416 | struct device *dev; |
1da177e4 | 417 | |
86e45b6b TH |
418 | struct work_struct port_task; |
419 | ||
14be71f4 | 420 | unsigned int hsm_task_state; |
1da177e4 LT |
421 | unsigned long pio_task_timeout; |
422 | ||
bfd60579 | 423 | u32 msg_enable; |
a72ec4ce | 424 | struct list_head eh_done_q; |
bfd60579 | 425 | |
1da177e4 LT |
426 | void *private_data; |
427 | }; | |
428 | ||
429 | struct ata_port_operations { | |
430 | void (*port_disable) (struct ata_port *); | |
431 | ||
432 | void (*dev_config) (struct ata_port *, struct ata_device *); | |
433 | ||
434 | void (*set_piomode) (struct ata_port *, struct ata_device *); | |
435 | void (*set_dmamode) (struct ata_port *, struct ata_device *); | |
5444a6f4 | 436 | unsigned long (*mode_filter) (const struct ata_port *, struct ata_device *, unsigned long); |
1da177e4 | 437 | |
057ace5e | 438 | void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf); |
1da177e4 LT |
439 | void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf); |
440 | ||
057ace5e | 441 | void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf); |
1da177e4 LT |
442 | u8 (*check_status)(struct ata_port *ap); |
443 | u8 (*check_altstatus)(struct ata_port *ap); | |
1da177e4 LT |
444 | void (*dev_select)(struct ata_port *ap, unsigned int device); |
445 | ||
c19ba8af | 446 | void (*phy_reset) (struct ata_port *ap); /* obsolete */ |
e35a9e01 | 447 | void (*set_mode) (struct ata_port *ap); |
c19ba8af TH |
448 | int (*probe_reset) (struct ata_port *ap, unsigned int *classes); |
449 | ||
1da177e4 LT |
450 | void (*post_set_mode) (struct ata_port *ap); |
451 | ||
452 | int (*check_atapi_dma) (struct ata_queued_cmd *qc); | |
453 | ||
454 | void (*bmdma_setup) (struct ata_queued_cmd *qc); | |
455 | void (*bmdma_start) (struct ata_queued_cmd *qc); | |
456 | ||
457 | void (*qc_prep) (struct ata_queued_cmd *qc); | |
9a3d9eb0 | 458 | unsigned int (*qc_issue) (struct ata_queued_cmd *qc); |
1da177e4 LT |
459 | |
460 | void (*eng_timeout) (struct ata_port *ap); | |
461 | ||
462 | irqreturn_t (*irq_handler)(int, void *, struct pt_regs *); | |
463 | void (*irq_clear) (struct ata_port *); | |
464 | ||
465 | u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg); | |
466 | void (*scr_write) (struct ata_port *ap, unsigned int sc_reg, | |
467 | u32 val); | |
468 | ||
469 | int (*port_start) (struct ata_port *ap); | |
470 | void (*port_stop) (struct ata_port *ap); | |
471 | ||
472 | void (*host_stop) (struct ata_host_set *host_set); | |
473 | ||
b73fc89f | 474 | void (*bmdma_stop) (struct ata_queued_cmd *qc); |
1da177e4 LT |
475 | u8 (*bmdma_status) (struct ata_port *ap); |
476 | }; | |
477 | ||
478 | struct ata_port_info { | |
d0be4a7d | 479 | struct scsi_host_template *sht; |
1da177e4 LT |
480 | unsigned long host_flags; |
481 | unsigned long pio_mask; | |
482 | unsigned long mwdma_mask; | |
483 | unsigned long udma_mask; | |
057ace5e | 484 | const struct ata_port_operations *port_ops; |
e99f8b5e | 485 | void *private_data; |
1da177e4 LT |
486 | }; |
487 | ||
452503f9 AC |
488 | struct ata_timing { |
489 | unsigned short mode; /* ATA mode */ | |
490 | unsigned short setup; /* t1 */ | |
491 | unsigned short act8b; /* t2 for 8-bit I/O */ | |
492 | unsigned short rec8b; /* t2i for 8-bit I/O */ | |
493 | unsigned short cyc8b; /* t0 for 8-bit I/O */ | |
494 | unsigned short active; /* t2 or tD */ | |
495 | unsigned short recover; /* t2i or tK */ | |
496 | unsigned short cycle; /* t0 */ | |
497 | unsigned short udma; /* t2CYCTYP/2 */ | |
498 | }; | |
499 | ||
500 | #define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin) | |
1da177e4 LT |
501 | |
502 | extern void ata_port_probe(struct ata_port *); | |
503 | extern void __sata_phy_reset(struct ata_port *ap); | |
504 | extern void sata_phy_reset(struct ata_port *ap); | |
505 | extern void ata_bus_reset(struct ata_port *ap); | |
a62c0fc5 | 506 | extern int ata_drive_probe_reset(struct ata_port *ap, |
7944ea95 | 507 | ata_probeinit_fn_t probeinit, |
a62c0fc5 TH |
508 | ata_reset_fn_t softreset, ata_reset_fn_t hardreset, |
509 | ata_postreset_fn_t postreset, unsigned int *classes); | |
8a19ac89 | 510 | extern void ata_std_probeinit(struct ata_port *ap); |
c2bd5804 TH |
511 | extern int ata_std_softreset(struct ata_port *ap, int verbose, |
512 | unsigned int *classes); | |
513 | extern int sata_std_hardreset(struct ata_port *ap, int verbose, | |
514 | unsigned int *class); | |
515 | extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes); | |
623a3128 TH |
516 | extern int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev, |
517 | int post_reset); | |
1da177e4 LT |
518 | extern void ata_port_disable(struct ata_port *); |
519 | extern void ata_std_ports(struct ata_ioports *ioaddr); | |
520 | #ifdef CONFIG_PCI | |
521 | extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
522 | unsigned int n_ports); | |
523 | extern void ata_pci_remove_one (struct pci_dev *pdev); | |
9b847548 JA |
524 | extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state); |
525 | extern int ata_pci_device_resume(struct pci_dev *pdev); | |
17bb34a3 | 526 | extern int ata_pci_clear_simplex(struct pci_dev *pdev); |
1da177e4 | 527 | #endif /* CONFIG_PCI */ |
057ace5e | 528 | extern int ata_device_add(const struct ata_probe_ent *ent); |
17b14451 | 529 | extern void ata_host_set_remove(struct ata_host_set *host_set); |
193515d5 | 530 | extern int ata_scsi_detect(struct scsi_host_template *sht); |
1da177e4 LT |
531 | extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg); |
532 | extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)); | |
533 | extern int ata_scsi_error(struct Scsi_Host *host); | |
a72ec4ce TH |
534 | extern void ata_eh_qc_complete(struct ata_queued_cmd *qc); |
535 | extern void ata_eh_qc_retry(struct ata_queued_cmd *qc); | |
1da177e4 LT |
536 | extern int ata_scsi_release(struct Scsi_Host *host); |
537 | extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc); | |
9b847548 | 538 | extern int ata_scsi_device_resume(struct scsi_device *); |
082776e4 | 539 | extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t state); |
9b847548 | 540 | extern int ata_device_resume(struct ata_port *, struct ata_device *); |
082776e4 | 541 | extern int ata_device_suspend(struct ata_port *, struct ata_device *, pm_message_t state); |
67846b30 | 542 | extern int ata_ratelimit(void); |
6f8b9958 TH |
543 | extern unsigned int ata_busy_sleep(struct ata_port *ap, |
544 | unsigned long timeout_pat, | |
545 | unsigned long timeout); | |
86e45b6b TH |
546 | extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), |
547 | void *data, unsigned long delay); | |
67846b30 | 548 | |
1da177e4 LT |
549 | /* |
550 | * Default driver ops implementations | |
551 | */ | |
057ace5e | 552 | extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); |
1da177e4 | 553 | extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf); |
057ace5e JG |
554 | extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp); |
555 | extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf); | |
1da177e4 LT |
556 | extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device); |
557 | extern void ata_std_dev_select (struct ata_port *ap, unsigned int device); | |
558 | extern u8 ata_check_status(struct ata_port *ap); | |
559 | extern u8 ata_altstatus(struct ata_port *ap); | |
057ace5e | 560 | extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf); |
c2bd5804 | 561 | extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes); |
1da177e4 LT |
562 | extern int ata_port_start (struct ata_port *ap); |
563 | extern void ata_port_stop (struct ata_port *ap); | |
aa8f0dc6 | 564 | extern void ata_host_stop (struct ata_host_set *host_set); |
1da177e4 LT |
565 | extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs); |
566 | extern void ata_qc_prep(struct ata_queued_cmd *qc); | |
e46834cd | 567 | extern void ata_noop_qc_prep(struct ata_queued_cmd *qc); |
9a3d9eb0 | 568 | extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc); |
1da177e4 LT |
569 | extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, |
570 | unsigned int buflen); | |
571 | extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, | |
572 | unsigned int n_elem); | |
057ace5e | 573 | extern unsigned int ata_dev_classify(const struct ata_taskfile *tf); |
6a62a04d TH |
574 | extern void ata_id_string(const u16 *id, unsigned char *s, |
575 | unsigned int ofs, unsigned int len); | |
576 | extern void ata_id_c_string(const u16 *id, unsigned char *s, | |
577 | unsigned int ofs, unsigned int len); | |
1da177e4 LT |
578 | extern void ata_bmdma_setup (struct ata_queued_cmd *qc); |
579 | extern void ata_bmdma_start (struct ata_queued_cmd *qc); | |
b73fc89f | 580 | extern void ata_bmdma_stop(struct ata_queued_cmd *qc); |
1da177e4 LT |
581 | extern u8 ata_bmdma_status(struct ata_port *ap); |
582 | extern void ata_bmdma_irq_clear(struct ata_port *ap); | |
76014427 | 583 | extern void __ata_qc_complete(struct ata_queued_cmd *qc); |
1da177e4 | 584 | extern void ata_eng_timeout(struct ata_port *ap); |
9a3dccc4 TH |
585 | extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev, |
586 | struct scsi_cmnd *cmd, | |
1da177e4 LT |
587 | void (*done)(struct scsi_cmnd *)); |
588 | extern int ata_std_bios_param(struct scsi_device *sdev, | |
589 | struct block_device *bdev, | |
590 | sector_t capacity, int geom[]); | |
591 | extern int ata_scsi_slave_config(struct scsi_device *sdev); | |
ebdfca6e AC |
592 | extern struct ata_device *ata_dev_pair(struct ata_port *ap, |
593 | struct ata_device *adev); | |
1da177e4 | 594 | |
452503f9 AC |
595 | /* |
596 | * Timing helpers | |
597 | */ | |
1bc4ccff AC |
598 | |
599 | extern unsigned int ata_pio_need_iordy(const struct ata_device *); | |
452503f9 AC |
600 | extern int ata_timing_compute(struct ata_device *, unsigned short, |
601 | struct ata_timing *, int, int); | |
602 | extern void ata_timing_merge(const struct ata_timing *, | |
603 | const struct ata_timing *, struct ata_timing *, | |
604 | unsigned int); | |
605 | ||
606 | enum { | |
607 | ATA_TIMING_SETUP = (1 << 0), | |
608 | ATA_TIMING_ACT8B = (1 << 1), | |
609 | ATA_TIMING_REC8B = (1 << 2), | |
610 | ATA_TIMING_CYC8B = (1 << 3), | |
611 | ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B | | |
612 | ATA_TIMING_CYC8B, | |
613 | ATA_TIMING_ACTIVE = (1 << 4), | |
614 | ATA_TIMING_RECOVER = (1 << 5), | |
615 | ATA_TIMING_CYCLE = (1 << 6), | |
616 | ATA_TIMING_UDMA = (1 << 7), | |
617 | ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B | | |
618 | ATA_TIMING_REC8B | ATA_TIMING_CYC8B | | |
619 | ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER | | |
620 | ATA_TIMING_CYCLE | ATA_TIMING_UDMA, | |
621 | }; | |
622 | ||
1da177e4 LT |
623 | |
624 | #ifdef CONFIG_PCI | |
625 | struct pci_bits { | |
626 | unsigned int reg; /* PCI config register to read */ | |
627 | unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */ | |
628 | unsigned long mask; | |
629 | unsigned long val; | |
630 | }; | |
631 | ||
374b1873 | 632 | extern void ata_pci_host_stop (struct ata_host_set *host_set); |
1da177e4 | 633 | extern struct ata_probe_ent * |
47a86593 | 634 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask); |
057ace5e | 635 | extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); |
17bb34a3 | 636 | extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long); |
1da177e4 LT |
637 | #endif /* CONFIG_PCI */ |
638 | ||
639 | ||
972c26bd JG |
640 | static inline int |
641 | ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc) | |
642 | { | |
643 | if (sg == &qc->pad_sgent) | |
644 | return 1; | |
645 | if (qc->pad_len) | |
646 | return 0; | |
647 | if (((sg - qc->__sg) + 1) == qc->n_elem) | |
648 | return 1; | |
649 | return 0; | |
650 | } | |
651 | ||
cc1887f3 TH |
652 | static inline struct scatterlist * |
653 | ata_qc_first_sg(struct ata_queued_cmd *qc) | |
654 | { | |
655 | if (qc->n_elem) | |
656 | return qc->__sg; | |
657 | if (qc->pad_len) | |
658 | return &qc->pad_sgent; | |
659 | return NULL; | |
660 | } | |
661 | ||
cedc9a47 JG |
662 | static inline struct scatterlist * |
663 | ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc) | |
664 | { | |
665 | if (sg == &qc->pad_sgent) | |
666 | return NULL; | |
667 | if (++sg - qc->__sg < qc->n_elem) | |
668 | return sg; | |
cc1887f3 TH |
669 | if (qc->pad_len) |
670 | return &qc->pad_sgent; | |
671 | return NULL; | |
cedc9a47 JG |
672 | } |
673 | ||
674 | #define ata_for_each_sg(sg, qc) \ | |
cc1887f3 | 675 | for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc)) |
cedc9a47 | 676 | |
1da177e4 LT |
677 | static inline unsigned int ata_tag_valid(unsigned int tag) |
678 | { | |
679 | return (tag < ATA_MAX_QUEUE) ? 1 : 0; | |
680 | } | |
681 | ||
e1211e3f | 682 | static inline unsigned int ata_class_enabled(unsigned int class) |
597afd21 TH |
683 | { |
684 | return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI; | |
685 | } | |
686 | ||
e1211e3f | 687 | static inline unsigned int ata_class_disabled(unsigned int class) |
1da177e4 | 688 | { |
e1211e3f TH |
689 | return class == ATA_DEV_ATA_UNSUP || class == ATA_DEV_ATAPI_UNSUP; |
690 | } | |
691 | ||
002c8054 TH |
692 | static inline unsigned int ata_class_absent(unsigned int class) |
693 | { | |
694 | return !ata_class_enabled(class) && !ata_class_disabled(class); | |
695 | } | |
696 | ||
e1211e3f TH |
697 | static inline unsigned int ata_dev_enabled(const struct ata_device *dev) |
698 | { | |
699 | return ata_class_enabled(dev->class); | |
700 | } | |
701 | ||
702 | static inline unsigned int ata_dev_disabled(const struct ata_device *dev) | |
703 | { | |
704 | return ata_class_disabled(dev->class); | |
1da177e4 LT |
705 | } |
706 | ||
002c8054 TH |
707 | static inline unsigned int ata_dev_absent(const struct ata_device *dev) |
708 | { | |
709 | return ata_class_absent(dev->class); | |
710 | } | |
711 | ||
1da177e4 LT |
712 | static inline u8 ata_chk_status(struct ata_port *ap) |
713 | { | |
714 | return ap->ops->check_status(ap); | |
715 | } | |
716 | ||
0baab86b EF |
717 | |
718 | /** | |
719 | * ata_pause - Flush writes and pause 400 nanoseconds. | |
720 | * @ap: Port to wait for. | |
721 | * | |
722 | * LOCKING: | |
723 | * Inherited from caller. | |
724 | */ | |
725 | ||
1da177e4 LT |
726 | static inline void ata_pause(struct ata_port *ap) |
727 | { | |
728 | ata_altstatus(ap); | |
729 | ndelay(400); | |
730 | } | |
731 | ||
0baab86b EF |
732 | |
733 | /** | |
734 | * ata_busy_wait - Wait for a port status register | |
735 | * @ap: Port to wait for. | |
736 | * | |
737 | * Waits up to max*10 microseconds for the selected bits in the port's | |
738 | * status register to be cleared. | |
739 | * Returns final value of status register. | |
740 | * | |
741 | * LOCKING: | |
742 | * Inherited from caller. | |
743 | */ | |
744 | ||
1da177e4 LT |
745 | static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits, |
746 | unsigned int max) | |
747 | { | |
748 | u8 status; | |
749 | ||
750 | do { | |
751 | udelay(10); | |
752 | status = ata_chk_status(ap); | |
753 | max--; | |
754 | } while ((status & bits) && (max > 0)); | |
755 | ||
756 | return status; | |
757 | } | |
758 | ||
0baab86b EF |
759 | |
760 | /** | |
761 | * ata_wait_idle - Wait for a port to be idle. | |
762 | * @ap: Port to wait for. | |
763 | * | |
764 | * Waits up to 10ms for port's BUSY and DRQ signals to clear. | |
765 | * Returns final value of status register. | |
766 | * | |
767 | * LOCKING: | |
768 | * Inherited from caller. | |
769 | */ | |
770 | ||
1da177e4 LT |
771 | static inline u8 ata_wait_idle(struct ata_port *ap) |
772 | { | |
773 | u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); | |
774 | ||
775 | if (status & (ATA_BUSY | ATA_DRQ)) { | |
776 | unsigned long l = ap->ioaddr.status_addr; | |
bfd60579 RD |
777 | if (ata_msg_warn(ap)) |
778 | printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n", | |
779 | status, l); | |
1da177e4 LT |
780 | } |
781 | ||
782 | return status; | |
783 | } | |
784 | ||
785 | static inline void ata_qc_set_polling(struct ata_queued_cmd *qc) | |
786 | { | |
787 | qc->tf.ctl |= ATA_NIEN; | |
788 | } | |
789 | ||
790 | static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap, | |
791 | unsigned int tag) | |
792 | { | |
793 | if (likely(ata_tag_valid(tag))) | |
794 | return &ap->qcmd[tag]; | |
795 | return NULL; | |
796 | } | |
797 | ||
798 | static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device) | |
799 | { | |
800 | memset(tf, 0, sizeof(*tf)); | |
801 | ||
802 | tf->ctl = ap->ctl; | |
803 | if (device == 0) | |
804 | tf->device = ATA_DEVICE_OBS; | |
805 | else | |
806 | tf->device = ATA_DEVICE_OBS | ATA_DEV1; | |
807 | } | |
808 | ||
2c13b7ce JG |
809 | static inline void ata_qc_reinit(struct ata_queued_cmd *qc) |
810 | { | |
811 | qc->__sg = NULL; | |
812 | qc->flags = 0; | |
813 | qc->cursect = qc->cursg = qc->cursg_ofs = 0; | |
814 | qc->nsect = 0; | |
815 | qc->nbytes = qc->curbytes = 0; | |
a22e2eb0 | 816 | qc->err_mask = 0; |
2c13b7ce JG |
817 | |
818 | ata_tf_init(qc->ap, &qc->tf, qc->dev->devno); | |
819 | } | |
820 | ||
76014427 TH |
821 | /** |
822 | * ata_qc_complete - Complete an active ATA command | |
823 | * @qc: Command to complete | |
824 | * @err_mask: ATA Status register contents | |
825 | * | |
826 | * Indicate to the mid and upper layers that an ATA | |
827 | * command has completed, with either an ok or not-ok status. | |
828 | * | |
829 | * LOCKING: | |
830 | * spin_lock_irqsave(host_set lock) | |
831 | */ | |
832 | static inline void ata_qc_complete(struct ata_queued_cmd *qc) | |
833 | { | |
834 | if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED)) | |
835 | return; | |
836 | ||
837 | __ata_qc_complete(qc); | |
838 | } | |
0baab86b EF |
839 | |
840 | /** | |
841 | * ata_irq_on - Enable interrupts on a port. | |
842 | * @ap: Port on which interrupts are enabled. | |
843 | * | |
844 | * Enable interrupts on a legacy IDE device using MMIO or PIO, | |
845 | * wait for idle, clear any pending interrupts. | |
846 | * | |
847 | * LOCKING: | |
848 | * Inherited from caller. | |
849 | */ | |
850 | ||
1da177e4 LT |
851 | static inline u8 ata_irq_on(struct ata_port *ap) |
852 | { | |
853 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
854 | u8 tmp; | |
855 | ||
856 | ap->ctl &= ~ATA_NIEN; | |
857 | ap->last_ctl = ap->ctl; | |
858 | ||
859 | if (ap->flags & ATA_FLAG_MMIO) | |
860 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
861 | else | |
862 | outb(ap->ctl, ioaddr->ctl_addr); | |
863 | tmp = ata_wait_idle(ap); | |
864 | ||
865 | ap->ops->irq_clear(ap); | |
866 | ||
867 | return tmp; | |
868 | } | |
869 | ||
0baab86b EF |
870 | |
871 | /** | |
872 | * ata_irq_ack - Acknowledge a device interrupt. | |
873 | * @ap: Port on which interrupts are enabled. | |
874 | * | |
875 | * Wait up to 10 ms for legacy IDE device to become idle (BUSY | |
876 | * or BUSY+DRQ clear). Obtain dma status and port status from | |
877 | * device. Clear the interrupt. Return port status. | |
878 | * | |
879 | * LOCKING: | |
880 | */ | |
881 | ||
1da177e4 LT |
882 | static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq) |
883 | { | |
884 | unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY; | |
885 | u8 host_stat, post_stat, status; | |
886 | ||
887 | status = ata_busy_wait(ap, bits, 1000); | |
888 | if (status & bits) | |
bfd60579 RD |
889 | if (ata_msg_err(ap)) |
890 | printk(KERN_ERR "abnormal status 0x%X\n", status); | |
1da177e4 LT |
891 | |
892 | /* get controller status; clear intr, err bits */ | |
893 | if (ap->flags & ATA_FLAG_MMIO) { | |
894 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
895 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
896 | writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR, | |
897 | mmio + ATA_DMA_STATUS); | |
898 | ||
899 | post_stat = readb(mmio + ATA_DMA_STATUS); | |
900 | } else { | |
901 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); | |
902 | outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR, | |
903 | ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); | |
904 | ||
905 | post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); | |
906 | } | |
907 | ||
bfd60579 RD |
908 | if (ata_msg_intr(ap)) |
909 | printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n", | |
910 | __FUNCTION__, | |
911 | host_stat, post_stat, status); | |
1da177e4 LT |
912 | |
913 | return status; | |
914 | } | |
915 | ||
916 | static inline u32 scr_read(struct ata_port *ap, unsigned int reg) | |
917 | { | |
918 | return ap->ops->scr_read(ap, reg); | |
919 | } | |
920 | ||
921 | static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val) | |
922 | { | |
923 | ap->ops->scr_write(ap, reg, val); | |
924 | } | |
925 | ||
8a60a071 | 926 | static inline void scr_write_flush(struct ata_port *ap, unsigned int reg, |
cdcca89e BR |
927 | u32 val) |
928 | { | |
929 | ap->ops->scr_write(ap, reg, val); | |
930 | (void) ap->ops->scr_read(ap, reg); | |
931 | } | |
932 | ||
1da177e4 LT |
933 | static inline unsigned int sata_dev_present(struct ata_port *ap) |
934 | { | |
935 | return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0; | |
936 | } | |
937 | ||
057ace5e | 938 | static inline int ata_try_flush_cache(const struct ata_device *dev) |
1da177e4 LT |
939 | { |
940 | return ata_id_wcache_enabled(dev->id) || | |
941 | ata_id_has_flush(dev->id) || | |
942 | ata_id_has_flush_ext(dev->id); | |
943 | } | |
944 | ||
a7dac447 JG |
945 | static inline unsigned int ac_err_mask(u8 status) |
946 | { | |
947 | if (status & ATA_BUSY) | |
11a56d24 | 948 | return AC_ERR_HSM; |
a7dac447 JG |
949 | if (status & (ATA_ERR | ATA_DF)) |
950 | return AC_ERR_DEV; | |
951 | return 0; | |
952 | } | |
953 | ||
954 | static inline unsigned int __ac_err_mask(u8 status) | |
955 | { | |
956 | unsigned int mask = ac_err_mask(status); | |
957 | if (mask == 0) | |
958 | return AC_ERR_OTHER; | |
959 | return mask; | |
960 | } | |
961 | ||
6037d6bb JG |
962 | static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev) |
963 | { | |
964 | ap->pad_dma = 0; | |
965 | ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ, | |
966 | &ap->pad_dma, GFP_KERNEL); | |
967 | return (ap->pad == NULL) ? -ENOMEM : 0; | |
968 | } | |
969 | ||
970 | static inline void ata_pad_free(struct ata_port *ap, struct device *dev) | |
971 | { | |
972 | dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma); | |
973 | } | |
974 | ||
1da177e4 | 975 | #endif /* __LINUX_LIBATA_H__ */ |