[mirror_ubuntu-artful-kernel.git] / include / linux / mISDNhw.h

/*
 *
 * Author	Karsten Keil <kkeil@novell.com>
 *
 *   Basic declarations for the mISDN HW channels
 *
 * Copyright 2008  by Karsten Keil <kkeil@novell.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */

#ifndef MISDNHW_H
#define MISDNHW_H
#include <linux/mISDNif.h>
#include <linux/timer.h>

/*
 * HW DEBUG 0xHHHHGGGG
 * H - hardware driver specific bits
 * G - for all drivers
 */

#define DEBUG_HW		0x00000001
#define DEBUG_HW_OPEN		0x00000002
#define DEBUG_HW_DCHANNEL	0x00000100
#define DEBUG_HW_DFIFO		0x00000200
#define DEBUG_HW_BCHANNEL	0x00001000
#define DEBUG_HW_BFIFO		0x00002000

#define MAX_DFRAME_LEN_L1	300
#define MAX_MON_FRAME		32
#define MAX_LOG_SPACE		2048
#define MISDN_COPY_SIZE		32

/* channel->Flags bit field */
#define FLG_TX_BUSY		0	/* tx_buf in use */
#define FLG_TX_NEXT		1	/* next_skb in use */
#define FLG_L1_BUSY		2	/* L1 is permanent busy */
#define FLG_L2_ACTIVATED	3	/* activated from L2 */
#define FLG_OPEN		5	/* channel is in use */
#define FLG_ACTIVE		6	/* channel is activated */
#define FLG_BUSY_TIMER		7
/* channel type */
#define FLG_DCHANNEL		8	/* channel is D-channel */
#define FLG_BCHANNEL		9	/* channel is B-channel */
#define FLG_ECHANNEL		10	/* channel is E-channel */
#define FLG_TRANSPARENT		12	/* channel use transparent data */
#define FLG_HDLC		13	/* channel use hdlc data */
#define FLG_L2DATA		14	/* channel use L2 DATA primitivs */
#define FLG_ORIGIN		15	/* channel is on origin site */
/* channel specific stuff */
#define FLG_FILLEMPTY		16	/* fill fifo on first frame (empty) */
/* arcofi specific */
#define FLG_ARCOFI_TIMER	17
#define FLG_ARCOFI_ERROR	18
/* isar specific */
#define FLG_INITIALIZED		17
#define FLG_DLEETX		18
#define FLG_LASTDLE		19
#define FLG_FIRST		20
#define FLG_LASTDATA		21
#define FLG_NMD_DATA		22
#define FLG_FTI_RUN		23
#define FLG_LL_OK		24
#define FLG_LL_CONN		25
#define FLG_DTMFSEND		26

/* workq events */
#define FLG_RECVQUEUE		30
#define	FLG_PHCHANGE		31

#define schedule_event(s, ev)	do { \
					test_and_set_bit(ev, &((s)->Flags)); \
					schedule_work(&((s)->workq)); \
				} while (0)

struct dchannel {
	struct mISDNdevice	dev;
	u_long			Flags;
	struct work_struct	workq;
	void			(*phfunc) (struct dchannel *);
	u_int			state;
	void			*l1;
	/* HW access */
	u_char			(*read_reg) (void *, u_char);
	void			(*write_reg) (void *, u_char, u_char);
	void			(*read_fifo) (void *, u_char *, int);
	void			(*write_fifo) (void *, u_char *, int);
	void			*hw;
	int			slot;	/* multiport card channel slot */
	struct timer_list	timer;
	/* receive data */
	struct sk_buff		*rx_skb;
	int			maxlen;
	/* send data */
	struct sk_buff_head	squeue;
	struct sk_buff_head	rqueue;
	struct sk_buff		*tx_skb;
	int			tx_idx;
	int			debug;
	/* statistics */
	int			err_crc;
	int			err_tx;
	int			err_rx;
};

typedef int	(dchannel_l1callback)(struct dchannel *, u_int);
extern int	create_l1(struct dchannel *, dchannel_l1callback *);

/* private L1 commands */
#define INFO0		0x8002
#define INFO1		0x8102
#define INFO2		0x8202
#define INFO3_P8	0x8302
#define INFO3_P10	0x8402
#define INFO4_P8	0x8502
#define INFO4_P10	0x8602
#define LOSTFRAMING	0x8702
#define ANYSIGNAL	0x8802
#define HW_POWERDOWN	0x8902
#define HW_RESET_REQ	0x8a02
#define HW_POWERUP_REQ	0x8b02
#define HW_DEACT_REQ	0x8c02
#define HW_ACTIVATE_REQ	0x8e02
#define HW_D_NOBLOCKED  0x8f02
#define HW_RESET_IND	0x9002
#define HW_POWERUP_IND	0x9102
#define HW_DEACT_IND	0x9202
#define HW_ACTIVATE_IND	0x9302
#define HW_DEACT_CNF	0x9402
#define HW_TESTLOOP	0x9502
#define HW_TESTRX_RAW	0x9602
#define HW_TESTRX_HDLC	0x9702
#define HW_TESTRX_OFF	0x9802

struct layer1;
extern int	l1_event(struct layer1 *, u_int);


struct bchannel {
	struct mISDNchannel	ch;
	int			nr;
	u_long			Flags;
	struct work_struct	workq;
	u_int			state;
	/* HW access */
	u_char			(*read_reg) (void *, u_char);
	void			(*write_reg) (void *, u_char, u_char);
	void			(*read_fifo) (void *, u_char *, int);
	void			(*write_fifo) (void *, u_char *, int);
	void			*hw;
	int			slot;	/* multiport card channel slot */
	struct timer_list	timer;
	/* receive data */
	struct sk_buff		*rx_skb;
	int			maxlen;
	/* send data */
	struct sk_buff		*next_skb;
	struct sk_buff		*tx_skb;
	struct sk_buff_head	rqueue;
	int			rcount;
	int			tx_idx;
	int			debug;
	/* statistics */
	int			err_crc;
	int			err_tx;
	int			err_rx;
};

extern int	mISDN_initdchannel(struct dchannel *, int, void *);
extern int	mISDN_initbchannel(struct bchannel *, int);
extern int	mISDN_freedchannel(struct dchannel *);
extern int	mISDN_freebchannel(struct bchannel *);
extern void	queue_ch_frame(struct mISDNchannel *, u_int,
			int, struct sk_buff *);
extern int	dchannel_senddata(struct dchannel *, struct sk_buff *);
extern int	bchannel_senddata(struct bchannel *, struct sk_buff *);
extern void	recv_Dchannel(struct dchannel *);
extern void	recv_Echannel(struct dchannel *, struct dchannel *);
extern void	recv_Bchannel(struct bchannel *, unsigned int id);
extern void	recv_Dchannel_skb(struct dchannel *, struct sk_buff *);
extern void	recv_Bchannel_skb(struct bchannel *, struct sk_buff *);
extern void	confirm_Bsend(struct bchannel *bch);
extern int	get_next_bframe(struct bchannel *);
extern int	get_next_dframe(struct dchannel *);

#endif
Commit	Line	Data
1b2b03f8 KK	1	/*
	2	*
	3	* Author Karsten Keil <kkeil@novell.com>
	4	*
	5	* Basic declarations for the mISDN HW channels
	6	*
	7	* Copyright 2008 by Karsten Keil <kkeil@novell.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	*/
	19
	20	#ifndef MISDNHW_H
	21	#define MISDNHW_H
	22	#include <linux/mISDNif.h>
	23	#include <linux/timer.h>
	24
	25	/*
	26	* HW DEBUG 0xHHHHGGGG
	27	* H - hardware driver specific bits
	28	* G - for all drivers
	29	*/
	30
	31	#define DEBUG_HW 0x00000001
	32	#define DEBUG_HW_OPEN 0x00000002
	33	#define DEBUG_HW_DCHANNEL 0x00000100
	34	#define DEBUG_HW_DFIFO 0x00000200
	35	#define DEBUG_HW_BCHANNEL 0x00001000
	36	#define DEBUG_HW_BFIFO 0x00002000
	37
	38	#define MAX_DFRAME_LEN_L1 300
	39	#define MAX_MON_FRAME 32
	40	#define MAX_LOG_SPACE 2048
	41	#define MISDN_COPY_SIZE 32
	42
	43	/* channel->Flags bit field */
	44	#define FLG_TX_BUSY 0 /* tx_buf in use */
	45	#define FLG_TX_NEXT 1 /* next_skb in use */
	46	#define FLG_L1_BUSY 2 /* L1 is permanent busy */
	47	#define FLG_L2_ACTIVATED 3 /* activated from L2 */
	48	#define FLG_OPEN 5 /* channel is in use */
	49	#define FLG_ACTIVE 6 /* channel is activated */
	50	#define FLG_BUSY_TIMER 7
	51	/* channel type */
	52	#define FLG_DCHANNEL 8 /* channel is D-channel */
	53	#define FLG_BCHANNEL 9 /* channel is B-channel */
	54	#define FLG_ECHANNEL 10 /* channel is E-channel */
	55	#define FLG_TRANSPARENT 12 /* channel use transparent data */
	56	#define FLG_HDLC 13 /* channel use hdlc data */
	57	#define FLG_L2DATA 14 /* channel use L2 DATA primitivs */
	58	#define FLG_ORIGIN 15 /* channel is on origin site */
	59	/* channel specific stuff */
8dd2f36f	60	#define FLG_FILLEMPTY 16 /* fill fifo on first frame (empty) */
1b2b03f8	61	/* arcofi specific */
8dd2f36f AE	62	#define FLG_ARCOFI_TIMER 17
8dd2f36f AE	63	#define FLG_ARCOFI_ERROR 18
1b2b03f8	64	/* isar specific */
8dd2f36f AE	65	#define FLG_INITIALIZED 17
	66	#define FLG_DLEETX 18
	67	#define FLG_LASTDLE 19
	68	#define FLG_FIRST 20
	69	#define FLG_LASTDATA 21
	70	#define FLG_NMD_DATA 22
	71	#define FLG_FTI_RUN 23
	72	#define FLG_LL_OK 24
	73	#define FLG_LL_CONN 25
	74	#define FLG_DTMFSEND 26
1b2b03f8 KK	75
	76	/* workq events */
	77	#define FLG_RECVQUEUE 30
	78	#define FLG_PHCHANGE 31
	79
	80	#define schedule_event(s, ev) do { \
	81	test_and_set_bit(ev, &((s)->Flags)); \
	82	schedule_work(&((s)->workq)); \
	83	} while (0)
	84
	85	struct dchannel {
	86	struct mISDNdevice dev;
	87	u_long Flags;
	88	struct work_struct workq;
	89	void (phfunc) (struct dchannel );
	90	u_int state;
	91	void *l1;
	92	/* HW access */
	93	u_char (read_reg) (void , u_char);
	94	void (write_reg) (void , u_char, u_char);
	95	void (read_fifo) (void , u_char *, int);
	96	void (write_fifo) (void , u_char *, int);
	97	void *hw;
	98	int slot; /* multiport card channel slot */
	99	struct timer_list timer;
	100	/* receive data */
	101	struct sk_buff *rx_skb;
	102	int maxlen;
	103	/* send data */
	104	struct sk_buff_head squeue;
	105	struct sk_buff_head rqueue;
	106	struct sk_buff *tx_skb;
	107	int tx_idx;
	108	int debug;
	109	/* statistics */
	110	int err_crc;
	111	int err_tx;
	112	int err_rx;
	113	};
	114
	115	typedef int (dchannel_l1callback)(struct dchannel *, u_int);
	116	extern int create_l1(struct dchannel , dchannel_l1callback );
	117
	118	/* private L1 commands */
	119	#define INFO0 0x8002
	120	#define INFO1 0x8102
	121	#define INFO2 0x8202
	122	#define INFO3_P8 0x8302
	123	#define INFO3_P10 0x8402
	124	#define INFO4_P8 0x8502
	125	#define INFO4_P10 0x8602
	126	#define LOSTFRAMING 0x8702
	127	#define ANYSIGNAL 0x8802
	128	#define HW_POWERDOWN 0x8902
	129	#define HW_RESET_REQ 0x8a02
	130	#define HW_POWERUP_REQ 0x8b02
	131	#define HW_DEACT_REQ 0x8c02
	132	#define HW_ACTIVATE_REQ 0x8e02
	133	#define HW_D_NOBLOCKED 0x8f02
	134	#define HW_RESET_IND 0x9002
	135	#define HW_POWERUP_IND 0x9102
	136	#define HW_DEACT_IND 0x9202
	137	#define HW_ACTIVATE_IND 0x9302
	138	#define HW_DEACT_CNF 0x9402
139	#define HW_TESTLOOP 0x9502
140	#define HW_TESTRX_RAW 0x9602
141	#define HW_TESTRX_HDLC 0x9702
142	#define HW_TESTRX_OFF 0x9802
143
144	struct layer1;
145	extern int l1_event(struct layer1 *, u_int);
146
147
148	struct bchannel {
149	struct mISDNchannel ch;
150	int nr;
151	u_long Flags;
152	struct work_struct workq;
153	u_int state;
154	/* HW access */
155	u_char (read_reg) (void , u_char);
156	void (write_reg) (void , u_char, u_char);
157	void (read_fifo) (void , u_char *, int);
158	void (write_fifo) (void , u_char *, int);
159	void *hw;
160	int slot; /* multiport card channel slot */
161	struct timer_list timer;
162	/* receive data */
163	struct sk_buff *rx_skb;
164	int maxlen;
165	/* send data */
166	struct sk_buff *next_skb;
167	struct sk_buff *tx_skb;
168	struct sk_buff_head rqueue;
169	int rcount;
170	int tx_idx;
171	int debug;
172	/* statistics */
173	int err_crc;
174	int err_tx;
175	int err_rx;
176	};
177
178	extern int mISDN_initdchannel(struct dchannel , int, void );
179	extern int mISDN_initbchannel(struct bchannel *, int);
180	extern int mISDN_freedchannel(struct dchannel *);
181	extern int mISDN_freebchannel(struct bchannel *);
182	extern void queue_ch_frame(struct mISDNchannel *, u_int,
183	int, struct sk_buff *);
184	extern int dchannel_senddata(struct dchannel , struct sk_buff );
185	extern int bchannel_senddata(struct bchannel , struct sk_buff );
186	extern void recv_Dchannel(struct dchannel *);
1f28fa19	187	extern void recv_Echannel(struct dchannel , struct dchannel );
7cfa153d	188	extern void recv_Bchannel(struct bchannel *, unsigned int id);
1b2b03f8 KK	189	extern void recv_Dchannel_skb(struct dchannel , struct sk_buff );
	190	extern void recv_Bchannel_skb(struct bchannel , struct sk_buff );
	191	extern void confirm_Bsend(struct bchannel *bch);
	192	extern int get_next_bframe(struct bchannel *);
	193	extern int get_next_dframe(struct dchannel *);
	194
	195	#endif