[mirror_ubuntu-artful-kernel.git] / include / linux / mfd / arizona / pdata.h

/*
 * Platform data for Arizona devices
 *
 * Copyright 2012 Wolfson Microelectronics. PLC.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef _ARIZONA_PDATA_H
#define _ARIZONA_PDATA_H

#define ARIZONA_GPN_DIR                          0x8000  /* GPN_DIR */
#define ARIZONA_GPN_DIR_MASK                     0x8000  /* GPN_DIR */
#define ARIZONA_GPN_DIR_SHIFT                        15  /* GPN_DIR */
#define ARIZONA_GPN_DIR_WIDTH                         1  /* GPN_DIR */
#define ARIZONA_GPN_PU                           0x4000  /* GPN_PU */
#define ARIZONA_GPN_PU_MASK                      0x4000  /* GPN_PU */
#define ARIZONA_GPN_PU_SHIFT                         14  /* GPN_PU */
#define ARIZONA_GPN_PU_WIDTH                          1  /* GPN_PU */
#define ARIZONA_GPN_PD                           0x2000  /* GPN_PD */
#define ARIZONA_GPN_PD_MASK                      0x2000  /* GPN_PD */
#define ARIZONA_GPN_PD_SHIFT                         13  /* GPN_PD */
#define ARIZONA_GPN_PD_WIDTH                          1  /* GPN_PD */
#define ARIZONA_GPN_LVL                          0x0800  /* GPN_LVL */
#define ARIZONA_GPN_LVL_MASK                     0x0800  /* GPN_LVL */
#define ARIZONA_GPN_LVL_SHIFT                        11  /* GPN_LVL */
#define ARIZONA_GPN_LVL_WIDTH                         1  /* GPN_LVL */
#define ARIZONA_GPN_POL                          0x0400  /* GPN_POL */
#define ARIZONA_GPN_POL_MASK                     0x0400  /* GPN_POL */
#define ARIZONA_GPN_POL_SHIFT                        10  /* GPN_POL */
#define ARIZONA_GPN_POL_WIDTH                         1  /* GPN_POL */
#define ARIZONA_GPN_OP_CFG                       0x0200  /* GPN_OP_CFG */
#define ARIZONA_GPN_OP_CFG_MASK                  0x0200  /* GPN_OP_CFG */
#define ARIZONA_GPN_OP_CFG_SHIFT                      9  /* GPN_OP_CFG */
#define ARIZONA_GPN_OP_CFG_WIDTH                      1  /* GPN_OP_CFG */
#define ARIZONA_GPN_DB                           0x0100  /* GPN_DB */
#define ARIZONA_GPN_DB_MASK                      0x0100  /* GPN_DB */
#define ARIZONA_GPN_DB_SHIFT                          8  /* GPN_DB */
#define ARIZONA_GPN_DB_WIDTH                          1  /* GPN_DB */
#define ARIZONA_GPN_FN_MASK                      0x007F  /* GPN_FN - [6:0] */
#define ARIZONA_GPN_FN_SHIFT                          0  /* GPN_FN - [6:0] */
#define ARIZONA_GPN_FN_WIDTH                          7  /* GPN_FN - [6:0] */

#define ARIZONA_MAX_GPIO 5

#define ARIZONA_32KZ_MCLK1 1
#define ARIZONA_32KZ_MCLK2 2
#define ARIZONA_32KZ_NONE  3

#define ARIZONA_MAX_INPUT 4

#define ARIZONA_DMIC_MICVDD   0
#define ARIZONA_DMIC_MICBIAS1 1
#define ARIZONA_DMIC_MICBIAS2 2
#define ARIZONA_DMIC_MICBIAS3 3

#define ARIZONA_MAX_MICBIAS 3

#define ARIZONA_INMODE_DIFF 0
#define ARIZONA_INMODE_SE   1
#define ARIZONA_INMODE_DMIC 2

#define ARIZONA_MAX_OUTPUT 6

#define ARIZONA_MAX_AIF 3

#define ARIZONA_HAP_ACT_ERM 0
#define ARIZONA_HAP_ACT_LRA 2

#define ARIZONA_MAX_PDM_SPK 2

struct regulator_init_data;

struct arizona_micbias {
	int mV;                    /** Regulated voltage */
	unsigned int ext_cap:1;    /** External capacitor fitted */
	unsigned int discharge:1;  /** Actively discharge */
	unsigned int soft_start:1; /** Disable aggressive startup ramp rate */
	unsigned int bypass:1;     /** Use bypass mode */
};

struct arizona_micd_config {
	unsigned int src;
	unsigned int bias;
	bool gpio;
};

struct arizona_micd_range {
	int max;  /** Ohms */
	int key;  /** Key to report to input layer */
};

struct arizona_pdata {
	int reset;      /** GPIO controlling /RESET, if any */
	int ldoena;     /** GPIO controlling LODENA, if any */

	/** Regulator configuration for MICVDD */
	struct regulator_init_data *micvdd;

	/** Regulator configuration for LDO1 */
	struct regulator_init_data *ldo1;

	/** If a direct 32kHz clock is provided on an MCLK specify it here */
	int clk32k_src;

	/** Mode for primary IRQ (defaults to active low) */
	unsigned int irq_flags;

	/* Base GPIO */
	int gpio_base;

	/** Pin state for GPIO pins */
	int gpio_defaults[ARIZONA_MAX_GPIO];

	/**
	 * Maximum number of channels clocks will be generated for,
	 * useful for systems where and I2S bus with multiple data
	 * lines is mastered.
	 */
	int max_channels_clocked[ARIZONA_MAX_AIF];

	/** GPIO5 is used for jack detection */
	bool jd_gpio5;

	/** Internal pull on GPIO5 is disabled when used for jack detection */
	bool jd_gpio5_nopull;

	/** set to true if jackdet contact opens on insert */
	bool jd_invert;

	/** Use the headphone detect circuit to identify the accessory */
	bool hpdet_acc_id;

	/** Check for line output with HPDET method */
	bool hpdet_acc_id_line;

	/** GPIO used for mic isolation with HPDET */
	int hpdet_id_gpio;

	/** Extra debounce timeout used during initial mic detection (ms) */
	int micd_detect_debounce;

	/** GPIO for mic detection polarity */
	int micd_pol_gpio;

	/** Mic detect ramp rate */
	int micd_bias_start_time;

	/** Mic detect sample rate */
	int micd_rate;

	/** Mic detect debounce level */
	int micd_dbtime;

	/** Mic detect timeout (ms) */
	int micd_timeout;

	/** Force MICBIAS on for mic detect */
	bool micd_force_micbias;

	/** Mic detect level parameters */
	const struct arizona_micd_range *micd_ranges;
	int num_micd_ranges;

	/** Headset polarity configurations */
	struct arizona_micd_config *micd_configs;
	int num_micd_configs;

	/** Reference voltage for DMIC inputs */
	int dmic_ref[ARIZONA_MAX_INPUT];

	/** MICBIAS configurations */
	struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS];

	/** Mode of input structures */
	int inmode[ARIZONA_MAX_INPUT];

	/** Mode for outputs */
	bool out_mono[ARIZONA_MAX_OUTPUT];

	/** PDM speaker mute setting */
	unsigned int spk_mute[ARIZONA_MAX_PDM_SPK];

	/** PDM speaker format */
	unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK];

	/** Haptic actuator type */
	unsigned int hap_act;

	/** GPIO for primary IRQ (used for edge triggered emulation) */
	int irq_gpio;
};

#endif
Commit	Line	Data
3cc72986 MB	1	/*
	2	* Platform data for Arizona devices
	3	*
	4	* Copyright 2012 Wolfson Microelectronics. PLC.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#ifndef _ARIZONA_PDATA_H
	12	#define _ARIZONA_PDATA_H
	13
	14	#define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */
	15	#define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */
	16	#define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */
	17	#define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */
	18	#define ARIZONA_GPN_PU 0x4000 /* GPN_PU */
	19	#define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */
	20	#define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */
	21	#define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */
	22	#define ARIZONA_GPN_PD 0x2000 /* GPN_PD */
	23	#define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */
	24	#define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */
	25	#define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */
	26	#define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */
	27	#define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */
	28	#define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */
	29	#define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */
	30	#define ARIZONA_GPN_POL 0x0400 /* GPN_POL */
	31	#define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */
	32	#define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */
	33	#define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */
	34	#define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */
	35	#define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */
	36	#define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */
	37	#define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */
	38	#define ARIZONA_GPN_DB 0x0100 /* GPN_DB */
	39	#define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */
	40	#define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */
	41	#define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */
	42	#define ARIZONA_GPN_FN_MASK 0x007F /* GPN_FN - [6:0] */
	43	#define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */
	44	#define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */
	45
	46	#define ARIZONA_MAX_GPIO 5
	47
	48	#define ARIZONA_32KZ_MCLK1 1
	49	#define ARIZONA_32KZ_MCLK2 2
	50	#define ARIZONA_32KZ_NONE 3
	51
e102befe	52	#define ARIZONA_MAX_INPUT 4
3cc72986 MB	53
	54	#define ARIZONA_DMIC_MICVDD 0
	55	#define ARIZONA_DMIC_MICBIAS1 1
	56	#define ARIZONA_DMIC_MICBIAS2 2
	57	#define ARIZONA_DMIC_MICBIAS3 3
	58
3d91f828 MB	59	#define ARIZONA_MAX_MICBIAS 3
3d91f828 MB	60
3cc72986 MB	61	#define ARIZONA_INMODE_DIFF 0
	62	#define ARIZONA_INMODE_SE 1
	63	#define ARIZONA_INMODE_DMIC 2
	64
e102befe	65	#define ARIZONA_MAX_OUTPUT 6
3cc72986	66
c94aa30e MB	67	#define ARIZONA_MAX_AIF 3
c94aa30e MB	68
9dd555e2 MB	69	#define ARIZONA_HAP_ACT_ERM 0
	70	#define ARIZONA_HAP_ACT_LRA 2
	71
2a51da04	72	#define ARIZONA_MAX_PDM_SPK 2
3cc72986 MB	73
	74	struct regulator_init_data;
	75
3d91f828 MB	76	struct arizona_micbias {
	77	int mV; /** Regulated voltage */
	78	unsigned int ext_cap:1; /** External capacitor fitted */
	79	unsigned int discharge:1; /** Actively discharge */
f773fc6d	80	unsigned int soft_start:1; /** Disable aggressive startup ramp rate */
544c7aad	81	unsigned int bypass:1; /** Use bypass mode */
3d91f828 MB	82	};
3d91f828 MB	83
3cc72986 MB	84	struct arizona_micd_config {
	85	unsigned int src;
	86	unsigned int bias;
	87	bool gpio;
	88	};
	89
6fed4d86 MB	90	struct arizona_micd_range {
	91	int max; /** Ohms */
	92	int key; /** Key to report to input layer */
	93	};
	94
3cc72986 MB	95	struct arizona_pdata {
	96	int reset; /** GPIO controlling /RESET, if any */
	97	int ldoena; /** GPIO controlling LODENA, if any */
	98
	99	/** Regulator configuration for MICVDD */
	100	struct regulator_init_data *micvdd;
	101
	102	/** Regulator configuration for LDO1 */
	103	struct regulator_init_data *ldo1;
	104
	105	/** If a direct 32kHz clock is provided on an MCLK specify it here */
	106	int clk32k_src;
	107
f8a0941f MB	108	/** Mode for primary IRQ (defaults to active low) */
f8a0941f MB	109	unsigned int irq_flags;
3cc72986 MB	110
	111	/* Base GPIO */
	112	int gpio_base;
	113
	114	/** Pin state for GPIO pins */
	115	int gpio_defaults[ARIZONA_MAX_GPIO];
	116
c94aa30e MB	117	/**
	118	* Maximum number of channels clocks will be generated for,
	119	* useful for systems where and I2S bus with multiple data
	120	* lines is mastered.
	121	*/
	122	int max_channels_clocked[ARIZONA_MAX_AIF];
	123
92a49871 MB	124	/** GPIO5 is used for jack detection */
	125	bool jd_gpio5;
	126
e56a0a57 MB	127	/** Internal pull on GPIO5 is disabled when used for jack detection */
	128	bool jd_gpio5_nopull;
	129
a288d648 RF	130	/** set to true if jackdet contact opens on insert */
	131	bool jd_invert;
	132
dd235eea MB	133	/** Use the headphone detect circuit to identify the accessory */
	134	bool hpdet_acc_id;
	135
9c2ba270 MB	136	/** Check for line output with HPDET method */
	137	bool hpdet_acc_id_line;
	138
1eda6aa7 MB	139	/** GPIO used for mic isolation with HPDET */
	140	int hpdet_id_gpio;
	141
cd59e796 MB	142	/** Extra debounce timeout used during initial mic detection (ms) */
	143	int micd_detect_debounce;
	144
3cc72986 MB	145	/** GPIO for mic detection polarity */
	146	int micd_pol_gpio;
	147
b17e5462 MB	148	/** Mic detect ramp rate */
	149	int micd_bias_start_time;
	150
2e033db5 MB	151	/** Mic detect sample rate */
	152	int micd_rate;
	153
	154	/** Mic detect debounce level */
	155	int micd_dbtime;
	156
7abd4e2a MB	157	/** Mic detect timeout (ms) */
	158	int micd_timeout;
	159
bbbd46e3 MB	160	/** Force MICBIAS on for mic detect */
	161	bool micd_force_micbias;
	162
6fed4d86 MB	163	/** Mic detect level parameters */
	164	const struct arizona_micd_range *micd_ranges;
	165	int num_micd_ranges;
	166
3cc72986 MB	167	/** Headset polarity configurations */
	168	struct arizona_micd_config *micd_configs;
	169	int num_micd_configs;
	170
	171	/** Reference voltage for DMIC inputs */
	172	int dmic_ref[ARIZONA_MAX_INPUT];
	173
3d91f828 MB	174	/** MICBIAS configurations */
	175	struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS];
	176
3cc72986 MB	177	/** Mode of input structures */
	178	int inmode[ARIZONA_MAX_INPUT];
	179
	180	/** Mode for outputs */
	181	bool out_mono[ARIZONA_MAX_OUTPUT];
	182
	183	/** PDM speaker mute setting */
	184	unsigned int spk_mute[ARIZONA_MAX_PDM_SPK];
	185
	186	/** PDM speaker format */
	187	unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK];
9dd555e2 MB	188
	189	/** Haptic actuator type */
	190	unsigned int hap_act;
3092f805 MB	191
	192	/** GPIO for primary IRQ (used for edge triggered emulation) */
	193	int irq_gpio;
3cc72986 MB	194	};
	195
	196	#endif