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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
d50f8f33 HZ |
2 | /* |
3 | * Maxim8925 Interface | |
4 | * | |
5 | * Copyright (C) 2009 Marvell International Ltd. | |
6 | * Haojian Zhuang <haojian.zhuang@marvell.com> | |
d50f8f33 HZ |
7 | */ |
8 | ||
9 | #ifndef __LINUX_MFD_MAX8925_H | |
10 | #define __LINUX_MFD_MAX8925_H | |
11 | ||
1f1cf8f9 | 12 | #include <linux/mutex.h> |
d50f8f33 HZ |
13 | #include <linux/interrupt.h> |
14 | ||
1ad99893 HZ |
15 | /* Unified sub device IDs for MAX8925 */ |
16 | enum { | |
17 | MAX8925_ID_SD1, | |
18 | MAX8925_ID_SD2, | |
19 | MAX8925_ID_SD3, | |
20 | MAX8925_ID_LDO1, | |
21 | MAX8925_ID_LDO2, | |
22 | MAX8925_ID_LDO3, | |
23 | MAX8925_ID_LDO4, | |
24 | MAX8925_ID_LDO5, | |
25 | MAX8925_ID_LDO6, | |
26 | MAX8925_ID_LDO7, | |
27 | MAX8925_ID_LDO8, | |
28 | MAX8925_ID_LDO9, | |
29 | MAX8925_ID_LDO10, | |
30 | MAX8925_ID_LDO11, | |
31 | MAX8925_ID_LDO12, | |
32 | MAX8925_ID_LDO13, | |
33 | MAX8925_ID_LDO14, | |
34 | MAX8925_ID_LDO15, | |
35 | MAX8925_ID_LDO16, | |
36 | MAX8925_ID_LDO17, | |
37 | MAX8925_ID_LDO18, | |
38 | MAX8925_ID_LDO19, | |
39 | MAX8925_ID_LDO20, | |
1f1cf8f9 HZ |
40 | MAX8925_ID_MAX, |
41 | }; | |
42 | ||
43 | enum { | |
44 | /* | |
45 | * Charging current threshold trigger going from fast charge | |
46 | * to TOPOFF charge. From 5% to 20% of fasting charging current. | |
47 | */ | |
48 | MAX8925_TOPOFF_THR_5PER, | |
49 | MAX8925_TOPOFF_THR_10PER, | |
50 | MAX8925_TOPOFF_THR_15PER, | |
51 | MAX8925_TOPOFF_THR_20PER, | |
52 | }; | |
53 | ||
54 | enum { | |
55 | /* Fast charging current */ | |
56 | MAX8925_FCHG_85MA, | |
57 | MAX8925_FCHG_300MA, | |
58 | MAX8925_FCHG_460MA, | |
59 | MAX8925_FCHG_600MA, | |
60 | MAX8925_FCHG_700MA, | |
61 | MAX8925_FCHG_800MA, | |
62 | MAX8925_FCHG_900MA, | |
63 | MAX8925_FCHG_1000MA, | |
1ad99893 HZ |
64 | }; |
65 | ||
d50f8f33 HZ |
66 | /* Charger registers */ |
67 | #define MAX8925_CHG_IRQ1 (0x7e) | |
68 | #define MAX8925_CHG_IRQ2 (0x7f) | |
69 | #define MAX8925_CHG_IRQ1_MASK (0x80) | |
70 | #define MAX8925_CHG_IRQ2_MASK (0x81) | |
1f1cf8f9 | 71 | #define MAX8925_CHG_STATUS (0x82) |
d50f8f33 HZ |
72 | |
73 | /* GPM registers */ | |
74 | #define MAX8925_SYSENSEL (0x00) | |
75 | #define MAX8925_ON_OFF_IRQ1 (0x01) | |
76 | #define MAX8925_ON_OFF_IRQ1_MASK (0x02) | |
1f1cf8f9 | 77 | #define MAX8925_ON_OFF_STATUS (0x03) |
d50f8f33 HZ |
78 | #define MAX8925_ON_OFF_IRQ2 (0x0d) |
79 | #define MAX8925_ON_OFF_IRQ2_MASK (0x0e) | |
80 | #define MAX8925_RESET_CNFG (0x0f) | |
81 | ||
82 | /* Touch registers */ | |
83 | #define MAX8925_TSC_IRQ (0x00) | |
84 | #define MAX8925_TSC_IRQ_MASK (0x01) | |
1f1cf8f9 HZ |
85 | #define MAX8925_TSC_CNFG1 (0x02) |
86 | #define MAX8925_ADC_SCHED (0x10) | |
1ad99893 | 87 | #define MAX8925_ADC_RES_END (0x6f) |
d50f8f33 | 88 | |
1f1cf8f9 HZ |
89 | #define MAX8925_NREF_OK (1 << 4) |
90 | ||
d50f8f33 | 91 | /* RTC registers */ |
1f1cf8f9 HZ |
92 | #define MAX8925_ALARM0_CNTL (0x18) |
93 | #define MAX8925_ALARM1_CNTL (0x19) | |
d50f8f33 HZ |
94 | #define MAX8925_RTC_IRQ (0x1c) |
95 | #define MAX8925_RTC_IRQ_MASK (0x1d) | |
1f1cf8f9 | 96 | #define MAX8925_MPL_CNTL (0x1e) |
d50f8f33 | 97 | |
1ad99893 HZ |
98 | /* WLED registers */ |
99 | #define MAX8925_WLED_MODE_CNTL (0x84) | |
100 | #define MAX8925_WLED_CNTL (0x85) | |
101 | ||
102 | /* MAX8925 Registers */ | |
103 | #define MAX8925_SDCTL1 (0x04) | |
104 | #define MAX8925_SDCTL2 (0x07) | |
105 | #define MAX8925_SDCTL3 (0x0A) | |
106 | #define MAX8925_SDV1 (0x06) | |
107 | #define MAX8925_SDV2 (0x09) | |
108 | #define MAX8925_SDV3 (0x0C) | |
109 | #define MAX8925_LDOCTL1 (0x18) | |
110 | #define MAX8925_LDOCTL2 (0x1C) | |
111 | #define MAX8925_LDOCTL3 (0x20) | |
112 | #define MAX8925_LDOCTL4 (0x24) | |
113 | #define MAX8925_LDOCTL5 (0x28) | |
114 | #define MAX8925_LDOCTL6 (0x2C) | |
115 | #define MAX8925_LDOCTL7 (0x30) | |
116 | #define MAX8925_LDOCTL8 (0x34) | |
117 | #define MAX8925_LDOCTL9 (0x38) | |
118 | #define MAX8925_LDOCTL10 (0x3C) | |
119 | #define MAX8925_LDOCTL11 (0x40) | |
120 | #define MAX8925_LDOCTL12 (0x44) | |
121 | #define MAX8925_LDOCTL13 (0x48) | |
122 | #define MAX8925_LDOCTL14 (0x4C) | |
123 | #define MAX8925_LDOCTL15 (0x50) | |
124 | #define MAX8925_LDOCTL16 (0x10) | |
125 | #define MAX8925_LDOCTL17 (0x14) | |
126 | #define MAX8925_LDOCTL18 (0x72) | |
127 | #define MAX8925_LDOCTL19 (0x5C) | |
128 | #define MAX8925_LDOCTL20 (0x9C) | |
129 | #define MAX8925_LDOVOUT1 (0x1A) | |
130 | #define MAX8925_LDOVOUT2 (0x1E) | |
131 | #define MAX8925_LDOVOUT3 (0x22) | |
132 | #define MAX8925_LDOVOUT4 (0x26) | |
133 | #define MAX8925_LDOVOUT5 (0x2A) | |
134 | #define MAX8925_LDOVOUT6 (0x2E) | |
135 | #define MAX8925_LDOVOUT7 (0x32) | |
136 | #define MAX8925_LDOVOUT8 (0x36) | |
137 | #define MAX8925_LDOVOUT9 (0x3A) | |
138 | #define MAX8925_LDOVOUT10 (0x3E) | |
139 | #define MAX8925_LDOVOUT11 (0x42) | |
140 | #define MAX8925_LDOVOUT12 (0x46) | |
141 | #define MAX8925_LDOVOUT13 (0x4A) | |
142 | #define MAX8925_LDOVOUT14 (0x4E) | |
143 | #define MAX8925_LDOVOUT15 (0x52) | |
144 | #define MAX8925_LDOVOUT16 (0x12) | |
145 | #define MAX8925_LDOVOUT17 (0x16) | |
146 | #define MAX8925_LDOVOUT18 (0x74) | |
147 | #define MAX8925_LDOVOUT19 (0x5E) | |
148 | #define MAX8925_LDOVOUT20 (0x9E) | |
149 | ||
d50f8f33 HZ |
150 | /* bit definitions */ |
151 | #define CHG_IRQ1_MASK (0x07) | |
152 | #define CHG_IRQ2_MASK (0xff) | |
153 | #define ON_OFF_IRQ1_MASK (0xff) | |
154 | #define ON_OFF_IRQ2_MASK (0x03) | |
155 | #define TSC_IRQ_MASK (0x03) | |
156 | #define RTC_IRQ_MASK (0x0c) | |
157 | ||
d50f8f33 HZ |
158 | #define MAX8925_NAME_SIZE (32) |
159 | ||
1f1cf8f9 | 160 | /* IRQ definitions */ |
d50f8f33 | 161 | enum { |
1f1cf8f9 HZ |
162 | MAX8925_IRQ_VCHG_DC_OVP, |
163 | MAX8925_IRQ_VCHG_DC_F, | |
164 | MAX8925_IRQ_VCHG_DC_R, | |
1f1cf8f9 HZ |
165 | MAX8925_IRQ_VCHG_THM_OK_R, |
166 | MAX8925_IRQ_VCHG_THM_OK_F, | |
167 | MAX8925_IRQ_VCHG_SYSLOW_F, | |
168 | MAX8925_IRQ_VCHG_SYSLOW_R, | |
169 | MAX8925_IRQ_VCHG_RST, | |
170 | MAX8925_IRQ_VCHG_DONE, | |
171 | MAX8925_IRQ_VCHG_TOPOFF, | |
172 | MAX8925_IRQ_VCHG_TMR_FAULT, | |
173 | MAX8925_IRQ_GPM_RSTIN, | |
174 | MAX8925_IRQ_GPM_MPL, | |
175 | MAX8925_IRQ_GPM_SW_3SEC, | |
176 | MAX8925_IRQ_GPM_EXTON_F, | |
177 | MAX8925_IRQ_GPM_EXTON_R, | |
178 | MAX8925_IRQ_GPM_SW_1SEC, | |
179 | MAX8925_IRQ_GPM_SW_F, | |
180 | MAX8925_IRQ_GPM_SW_R, | |
181 | MAX8925_IRQ_GPM_SYSCKEN_F, | |
182 | MAX8925_IRQ_GPM_SYSCKEN_R, | |
183 | MAX8925_IRQ_RTC_ALARM1, | |
184 | MAX8925_IRQ_RTC_ALARM0, | |
185 | MAX8925_IRQ_TSC_STICK, | |
186 | MAX8925_IRQ_TSC_NSTICK, | |
187 | MAX8925_NR_IRQS, | |
d50f8f33 HZ |
188 | }; |
189 | ||
4e405ae2 QX |
190 | |
191 | ||
d50f8f33 HZ |
192 | struct max8925_chip { |
193 | struct device *dev; | |
1f1cf8f9 HZ |
194 | struct i2c_client *i2c; |
195 | struct i2c_client *adc; | |
196 | struct i2c_client *rtc; | |
d50f8f33 HZ |
197 | struct mutex io_lock; |
198 | struct mutex irq_lock; | |
d50f8f33 | 199 | |
1f1cf8f9 HZ |
200 | int irq_base; |
201 | int core_irq; | |
202 | int tsc_irq; | |
ba74e80e | 203 | unsigned int wakeup_flag; |
d50f8f33 HZ |
204 | }; |
205 | ||
1ad99893 HZ |
206 | struct max8925_backlight_pdata { |
207 | int lxw_scl; /* 0/1 -- 0.8Ohm/0.4Ohm */ | |
208 | int lxw_freq; /* 700KHz ~ 1400KHz */ | |
209 | int dual_string; /* 0/1 -- single/dual string */ | |
210 | }; | |
211 | ||
212 | struct max8925_touch_pdata { | |
213 | unsigned int flags; | |
214 | }; | |
215 | ||
1f1cf8f9 HZ |
216 | struct max8925_power_pdata { |
217 | int (*set_charger)(int); | |
218 | unsigned batt_detect:1; | |
219 | unsigned topoff_threshold:2; | |
220 | unsigned fast_charge:3; /* charge current */ | |
92de378b | 221 | unsigned no_temp_support:1; /* set if no temperature detect */ |
5ba1fa0a | 222 | unsigned no_insert_detect:1; /* set if no ac insert detect */ |
e7a5f6d5 PR |
223 | char **supplied_to; |
224 | int num_supplicants; | |
1f1cf8f9 HZ |
225 | }; |
226 | ||
227 | /* | |
228 | * irq_base: stores IRQ base number of MAX8925 in platform | |
229 | * tsc_irq: stores IRQ number of MAX8925 TSC | |
230 | */ | |
d50f8f33 | 231 | struct max8925_platform_data { |
1ad99893 HZ |
232 | struct max8925_backlight_pdata *backlight; |
233 | struct max8925_touch_pdata *touch; | |
1f1cf8f9 | 234 | struct max8925_power_pdata *power; |
51acdb61 HZ |
235 | struct regulator_init_data *sd1; |
236 | struct regulator_init_data *sd2; | |
237 | struct regulator_init_data *sd3; | |
238 | struct regulator_init_data *ldo1; | |
239 | struct regulator_init_data *ldo2; | |
240 | struct regulator_init_data *ldo3; | |
241 | struct regulator_init_data *ldo4; | |
242 | struct regulator_init_data *ldo5; | |
243 | struct regulator_init_data *ldo6; | |
244 | struct regulator_init_data *ldo7; | |
245 | struct regulator_init_data *ldo8; | |
246 | struct regulator_init_data *ldo9; | |
247 | struct regulator_init_data *ldo10; | |
248 | struct regulator_init_data *ldo11; | |
249 | struct regulator_init_data *ldo12; | |
250 | struct regulator_init_data *ldo13; | |
251 | struct regulator_init_data *ldo14; | |
252 | struct regulator_init_data *ldo15; | |
253 | struct regulator_init_data *ldo16; | |
254 | struct regulator_init_data *ldo17; | |
255 | struct regulator_init_data *ldo18; | |
256 | struct regulator_init_data *ldo19; | |
257 | struct regulator_init_data *ldo20; | |
1ad99893 | 258 | |
1f1cf8f9 HZ |
259 | int irq_base; |
260 | int tsc_irq; | |
d50f8f33 HZ |
261 | }; |
262 | ||
263 | extern int max8925_reg_read(struct i2c_client *, int); | |
264 | extern int max8925_reg_write(struct i2c_client *, int, unsigned char); | |
265 | extern int max8925_bulk_read(struct i2c_client *, int, int, unsigned char *); | |
266 | extern int max8925_bulk_write(struct i2c_client *, int, int, unsigned char *); | |
267 | extern int max8925_set_bits(struct i2c_client *, int, unsigned char, | |
268 | unsigned char); | |
269 | ||
270 | extern int max8925_device_init(struct max8925_chip *, | |
271 | struct max8925_platform_data *); | |
272 | extern void max8925_device_exit(struct max8925_chip *); | |
273 | #endif /* __LINUX_MFD_MAX8925_H */ | |
274 |