[mirror_ubuntu-jammy-kernel.git] / include / linux / mfd / pcf50633 / core.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * core.h  -- Core driver for NXP PCF50633
 *
 * (C) 2006-2008 by Openmoko, Inc.
 * All rights reserved.
 */

#ifndef __LINUX_MFD_PCF50633_CORE_H
#define __LINUX_MFD_PCF50633_CORE_H

#include <linux/i2c.h>
#include <linux/workqueue.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/power_supply.h>
#include <linux/mfd/pcf50633/backlight.h>

struct pcf50633;
struct regmap;

#define PCF50633_NUM_REGULATORS	11

struct pcf50633_platform_data {
	struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS];

	char **batteries;
	int num_batteries;

	/*
	 * Should be set accordingly to the reference resistor used, see
	 * I_{ch(ref)} charger reference current in the pcf50633 User
	 * Manual.
	 */
	int charger_reference_current_ma;

	/* Callbacks */
	void (*probe_done)(struct pcf50633 *);
	void (*mbc_event_callback)(struct pcf50633 *, int);
	void (*regulator_registered)(struct pcf50633 *, int);
	void (*force_shutdown)(struct pcf50633 *);

	u8 resumers[5];

	struct pcf50633_bl_platform_data *backlight_data;
};

struct pcf50633_irq {
	void (*handler) (int, void *);
	void *data;
};

int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
			void (*handler) (int, void *), void *data);
int pcf50633_free_irq(struct pcf50633 *pcf, int irq);

int pcf50633_irq_mask(struct pcf50633 *pcf, int irq);
int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq);
int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq);

int pcf50633_read_block(struct pcf50633 *, u8 reg,
					int nr_regs, u8 *data);
int pcf50633_write_block(struct pcf50633 *pcf, u8 reg,
					int nr_regs, u8 *data);
u8 pcf50633_reg_read(struct pcf50633 *, u8 reg);
int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val);

int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val);
int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits);

/* Interrupt registers */

#define PCF50633_REG_INT1	0x02
#define PCF50633_REG_INT2	0x03
#define PCF50633_REG_INT3	0x04
#define PCF50633_REG_INT4	0x05
#define PCF50633_REG_INT5	0x06

#define PCF50633_REG_INT1M	0x07
#define PCF50633_REG_INT2M	0x08
#define PCF50633_REG_INT3M	0x09
#define PCF50633_REG_INT4M	0x0a
#define PCF50633_REG_INT5M	0x0b

enum {
	/* Chip IRQs */
	PCF50633_IRQ_ADPINS,
	PCF50633_IRQ_ADPREM,
	PCF50633_IRQ_USBINS,
	PCF50633_IRQ_USBREM,
	PCF50633_IRQ_RESERVED1,
	PCF50633_IRQ_RESERVED2,
	PCF50633_IRQ_ALARM,
	PCF50633_IRQ_SECOND,
	PCF50633_IRQ_ONKEYR,
	PCF50633_IRQ_ONKEYF,
	PCF50633_IRQ_EXTON1R,
	PCF50633_IRQ_EXTON1F,
	PCF50633_IRQ_EXTON2R,
	PCF50633_IRQ_EXTON2F,
	PCF50633_IRQ_EXTON3R,
	PCF50633_IRQ_EXTON3F,
	PCF50633_IRQ_BATFULL,
	PCF50633_IRQ_CHGHALT,
	PCF50633_IRQ_THLIMON,
	PCF50633_IRQ_THLIMOFF,
	PCF50633_IRQ_USBLIMON,
	PCF50633_IRQ_USBLIMOFF,
	PCF50633_IRQ_ADCRDY,
	PCF50633_IRQ_ONKEY1S,
	PCF50633_IRQ_LOWSYS,
	PCF50633_IRQ_LOWBAT,
	PCF50633_IRQ_HIGHTMP,
	PCF50633_IRQ_AUTOPWRFAIL,
	PCF50633_IRQ_DWN1PWRFAIL,
	PCF50633_IRQ_DWN2PWRFAIL,
	PCF50633_IRQ_LEDPWRFAIL,
	PCF50633_IRQ_LEDOVP,
	PCF50633_IRQ_LDO1PWRFAIL,
	PCF50633_IRQ_LDO2PWRFAIL,
	PCF50633_IRQ_LDO3PWRFAIL,
	PCF50633_IRQ_LDO4PWRFAIL,
	PCF50633_IRQ_LDO5PWRFAIL,
	PCF50633_IRQ_LDO6PWRFAIL,
	PCF50633_IRQ_HCLDOPWRFAIL,
	PCF50633_IRQ_HCLDOOVL,

	/* Always last */
	PCF50633_NUM_IRQ,
};

struct pcf50633 {
	struct device *dev;
	struct regmap *regmap;

	struct pcf50633_platform_data *pdata;
	int irq;
	struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
	struct work_struct irq_work;
	struct workqueue_struct *work_queue;
	struct mutex lock;

	u8 mask_regs[5];

	u8 suspend_irq_masks[5];
	u8 resume_reason[5];
	int is_suspended;

	int onkey1s_held;

	struct platform_device *rtc_pdev;
	struct platform_device *mbc_pdev;
	struct platform_device *adc_pdev;
	struct platform_device *input_pdev;
	struct platform_device *bl_pdev;
	struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS];
};

enum pcf50633_reg_int1 {
	PCF50633_INT1_ADPINS	= 0x01,	/* Adapter inserted */
	PCF50633_INT1_ADPREM	= 0x02,	/* Adapter removed */
	PCF50633_INT1_USBINS	= 0x04,	/* USB inserted */
	PCF50633_INT1_USBREM	= 0x08,	/* USB removed */
	/* reserved */
	PCF50633_INT1_ALARM	= 0x40, /* RTC alarm time is reached */
	PCF50633_INT1_SECOND	= 0x80,	/* RTC periodic second interrupt */
};

enum pcf50633_reg_int2 {
	PCF50633_INT2_ONKEYR	= 0x01, /* ONKEY rising edge */
	PCF50633_INT2_ONKEYF	= 0x02, /* ONKEY falling edge */
	PCF50633_INT2_EXTON1R	= 0x04, /* EXTON1 rising edge */
	PCF50633_INT2_EXTON1F	= 0x08, /* EXTON1 falling edge */
	PCF50633_INT2_EXTON2R	= 0x10, /* EXTON2 rising edge */
	PCF50633_INT2_EXTON2F	= 0x20, /* EXTON2 falling edge */
	PCF50633_INT2_EXTON3R	= 0x40, /* EXTON3 rising edge */
	PCF50633_INT2_EXTON3F	= 0x80, /* EXTON3 falling edge */
};

enum pcf50633_reg_int3 {
	PCF50633_INT3_BATFULL	= 0x01, /* Battery full */
	PCF50633_INT3_CHGHALT	= 0x02,	/* Charger halt */
	PCF50633_INT3_THLIMON	= 0x04,
	PCF50633_INT3_THLIMOFF	= 0x08,
	PCF50633_INT3_USBLIMON	= 0x10,
	PCF50633_INT3_USBLIMOFF	= 0x20,
	PCF50633_INT3_ADCRDY	= 0x40, /* ADC result ready */
	PCF50633_INT3_ONKEY1S	= 0x80,	/* ONKEY pressed 1 second */
};

enum pcf50633_reg_int4 {
	PCF50633_INT4_LOWSYS		= 0x01,
	PCF50633_INT4_LOWBAT		= 0x02,
	PCF50633_INT4_HIGHTMP		= 0x04,
	PCF50633_INT4_AUTOPWRFAIL	= 0x08,
	PCF50633_INT4_DWN1PWRFAIL	= 0x10,
	PCF50633_INT4_DWN2PWRFAIL	= 0x20,
	PCF50633_INT4_LEDPWRFAIL	= 0x40,
	PCF50633_INT4_LEDOVP		= 0x80,
};

enum pcf50633_reg_int5 {
	PCF50633_INT5_LDO1PWRFAIL	= 0x01,
	PCF50633_INT5_LDO2PWRFAIL	= 0x02,
	PCF50633_INT5_LDO3PWRFAIL	= 0x04,
	PCF50633_INT5_LDO4PWRFAIL	= 0x08,
	PCF50633_INT5_LDO5PWRFAIL	= 0x10,
	PCF50633_INT5_LDO6PWRFAIL	= 0x20,
	PCF50633_INT5_HCLDOPWRFAIL	= 0x40,
	PCF50633_INT5_HCLDOOVL		= 0x80,
};

/* misc. registers */
#define PCF50633_REG_OOCSHDWN	0x0c

/* LED registers */
#define PCF50633_REG_LEDOUT 0x28
#define PCF50633_REG_LEDENA 0x29
#define PCF50633_REG_LEDCTL 0x2a
#define PCF50633_REG_LEDDIM 0x2b

static inline struct pcf50633 *dev_to_pcf50633(struct device *dev)
{
	return dev_get_drvdata(dev);
}

int pcf50633_irq_init(struct pcf50633 *pcf, int irq);
void pcf50633_irq_free(struct pcf50633 *pcf);
#ifdef CONFIG_PM
int pcf50633_irq_suspend(struct pcf50633 *pcf);
int pcf50633_irq_resume(struct pcf50633 *pcf);
#endif

#endif
Commit	Line	Data
2874c5fd	1	/* SPDX-License-Identifier: GPL-2.0-or-later */
f52046b1 BR	2	/*
	3	* core.h -- Core driver for NXP PCF50633
	4	*
	5	* (C) 2006-2008 by Openmoko, Inc.
	6	* All rights reserved.
f52046b1 BR	7	*/
	8
	9	#ifndef __LINUX_MFD_PCF50633_CORE_H
	10	#define __LINUX_MFD_PCF50633_CORE_H
	11
	12	#include <linux/i2c.h>
	13	#include <linux/workqueue.h>
	14	#include <linux/regulator/driver.h>
	15	#include <linux/regulator/machine.h>
	16	#include <linux/power_supply.h>
f5bf403a	17	#include <linux/mfd/pcf50633/backlight.h>
f52046b1 BR	18
f52046b1 BR	19	struct pcf50633;
6e3ad118	20	struct regmap;
f52046b1 BR	21
	22	#define PCF50633_NUM_REGULATORS 11
	23
	24	struct pcf50633_platform_data {
	25	struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS];
	26
	27	char **batteries;
	28	int num_batteries;
	29
31b4ff06 BR	30	/*
	31	* Should be set accordingly to the reference resistor used, see
	32	* I_{ch(ref)} charger reference current in the pcf50633 User
	33	* Manual.
	34	*/
	35	int charger_reference_current_ma;
9705ecc5	36
f52046b1 BR	37	/* Callbacks */
	38	void (probe_done)(struct pcf50633 );
	39	void (mbc_event_callback)(struct pcf50633 , int);
	40	void (regulator_registered)(struct pcf50633 , int);
	41	void (force_shutdown)(struct pcf50633 );
	42
	43	u8 resumers[5];
f5bf403a LPC	44
f5bf403a LPC	45	struct pcf50633_bl_platform_data *backlight_data;
f52046b1 BR	46	};
f52046b1 BR	47
f52046b1 BR	48	struct pcf50633_irq {
	49	void (handler) (int, void );
	50	void *data;
	51	};
	52
	53	int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
	54	void (handler) (int, void ), void *data);
	55	int pcf50633_free_irq(struct pcf50633 *pcf, int irq);
	56
	57	int pcf50633_irq_mask(struct pcf50633 *pcf, int irq);
	58	int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq);
	59	int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq);
	60
	61	int pcf50633_read_block(struct pcf50633 *, u8 reg,
	62	int nr_regs, u8 *data);
	63	int pcf50633_write_block(struct pcf50633 *pcf, u8 reg,
	64	int nr_regs, u8 *data);
	65	u8 pcf50633_reg_read(struct pcf50633 *, u8 reg);
	66	int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val);
	67
	68	int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val);
	69	int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits);
	70
	71	/* Interrupt registers */
	72
	73	#define PCF50633_REG_INT1 0x02
	74	#define PCF50633_REG_INT2 0x03
	75	#define PCF50633_REG_INT3 0x04
	76	#define PCF50633_REG_INT4 0x05
	77	#define PCF50633_REG_INT5 0x06
	78
	79	#define PCF50633_REG_INT1M 0x07
	80	#define PCF50633_REG_INT2M 0x08
	81	#define PCF50633_REG_INT3M 0x09
	82	#define PCF50633_REG_INT4M 0x0a
	83	#define PCF50633_REG_INT5M 0x0b
	84
	85	enum {
	86	/* Chip IRQs */
	87	PCF50633_IRQ_ADPINS,
	88	PCF50633_IRQ_ADPREM,
	89	PCF50633_IRQ_USBINS,
	90	PCF50633_IRQ_USBREM,
	91	PCF50633_IRQ_RESERVED1,
	92	PCF50633_IRQ_RESERVED2,
	93	PCF50633_IRQ_ALARM,
	94	PCF50633_IRQ_SECOND,
	95	PCF50633_IRQ_ONKEYR,
	96	PCF50633_IRQ_ONKEYF,
	97	PCF50633_IRQ_EXTON1R,
	98	PCF50633_IRQ_EXTON1F,
	99	PCF50633_IRQ_EXTON2R,
	100	PCF50633_IRQ_EXTON2F,
	101	PCF50633_IRQ_EXTON3R,
	102	PCF50633_IRQ_EXTON3F,
	103	PCF50633_IRQ_BATFULL,
	104	PCF50633_IRQ_CHGHALT,
	105	PCF50633_IRQ_THLIMON,
	106	PCF50633_IRQ_THLIMOFF,
	107	PCF50633_IRQ_USBLIMON,
	108	PCF50633_IRQ_USBLIMOFF,
	109	PCF50633_IRQ_ADCRDY,
	110	PCF50633_IRQ_ONKEY1S,
	111	PCF50633_IRQ_LOWSYS,
112	PCF50633_IRQ_LOWBAT,
113	PCF50633_IRQ_HIGHTMP,
114	PCF50633_IRQ_AUTOPWRFAIL,
115	PCF50633_IRQ_DWN1PWRFAIL,
116	PCF50633_IRQ_DWN2PWRFAIL,
117	PCF50633_IRQ_LEDPWRFAIL,
118	PCF50633_IRQ_LEDOVP,
119	PCF50633_IRQ_LDO1PWRFAIL,
120	PCF50633_IRQ_LDO2PWRFAIL,
121	PCF50633_IRQ_LDO3PWRFAIL,
122	PCF50633_IRQ_LDO4PWRFAIL,
123	PCF50633_IRQ_LDO5PWRFAIL,
124	PCF50633_IRQ_LDO6PWRFAIL,
125	PCF50633_IRQ_HCLDOPWRFAIL,
126	PCF50633_IRQ_HCLDOOVL,
127
128	/* Always last */
129	PCF50633_NUM_IRQ,
130	};
131
132	struct pcf50633 {
133	struct device *dev;
6e3ad118	134	struct regmap *regmap;
f52046b1 BR	135
	136	struct pcf50633_platform_data *pdata;
	137	int irq;
	138	struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
	139	struct work_struct irq_work;
ed52e62e	140	struct workqueue_struct *work_queue;
f52046b1 BR	141	struct mutex lock;
	142
	143	u8 mask_regs[5];
	144
	145	u8 suspend_irq_masks[5];
	146	u8 resume_reason[5];
	147	int is_suspended;
	148
	149	int onkey1s_held;
	150
	151	struct platform_device *rtc_pdev;
	152	struct platform_device *mbc_pdev;
	153	struct platform_device *adc_pdev;
	154	struct platform_device *input_pdev;
f5bf403a	155	struct platform_device *bl_pdev;
f52046b1 BR	156	struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS];
	157	};
	158
	159	enum pcf50633_reg_int1 {
	160	PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
	161	PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
	162	PCF50633_INT1_USBINS = 0x04, /* USB inserted */
	163	PCF50633_INT1_USBREM = 0x08, /* USB removed */
	164	/* reserved */
	165	PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
	166	PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
	167	};
	168
	169	enum pcf50633_reg_int2 {
	170	PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
	171	PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
	172	PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
	173	PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
	174	PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
	175	PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
	176	PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
	177	PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
	178	};
	179
	180	enum pcf50633_reg_int3 {
	181	PCF50633_INT3_BATFULL = 0x01, /* Battery full */
	182	PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
	183	PCF50633_INT3_THLIMON = 0x04,
	184	PCF50633_INT3_THLIMOFF = 0x08,
	185	PCF50633_INT3_USBLIMON = 0x10,
	186	PCF50633_INT3_USBLIMOFF = 0x20,
	187	PCF50633_INT3_ADCRDY = 0x40, /* ADC result ready */
	188	PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
	189	};
	190
	191	enum pcf50633_reg_int4 {
	192	PCF50633_INT4_LOWSYS = 0x01,
	193	PCF50633_INT4_LOWBAT = 0x02,
	194	PCF50633_INT4_HIGHTMP = 0x04,
	195	PCF50633_INT4_AUTOPWRFAIL = 0x08,
	196	PCF50633_INT4_DWN1PWRFAIL = 0x10,
	197	PCF50633_INT4_DWN2PWRFAIL = 0x20,
	198	PCF50633_INT4_LEDPWRFAIL = 0x40,
	199	PCF50633_INT4_LEDOVP = 0x80,
	200	};
	201
	202	enum pcf50633_reg_int5 {
	203	PCF50633_INT5_LDO1PWRFAIL = 0x01,
	204	PCF50633_INT5_LDO2PWRFAIL = 0x02,
	205	PCF50633_INT5_LDO3PWRFAIL = 0x04,
	206	PCF50633_INT5_LDO4PWRFAIL = 0x08,
	207	PCF50633_INT5_LDO5PWRFAIL = 0x10,
	208	PCF50633_INT5_LDO6PWRFAIL = 0x20,
	209	PCF50633_INT5_HCLDOPWRFAIL = 0x40,
	210	PCF50633_INT5_HCLDOOVL = 0x80,
	211	};
	212
	213	/* misc. registers */
	214	#define PCF50633_REG_OOCSHDWN 0x0c
	215
	216	/* LED registers */
	217	#define PCF50633_REG_LEDOUT 0x28
	218	#define PCF50633_REG_LEDENA 0x29
	219	#define PCF50633_REG_LEDCTL 0x2a
220	#define PCF50633_REG_LEDDIM 0x2b
221
68d641ef LPC	222	static inline struct pcf50633 dev_to_pcf50633(struct device dev)
	223	{
	224	return dev_get_drvdata(dev);
	225	}
f52046b1	226
f337134f MB	227	int pcf50633_irq_init(struct pcf50633 *pcf, int irq);
	228	void pcf50633_irq_free(struct pcf50633 *pcf);
	229	#ifdef CONFIG_PM
	230	int pcf50633_irq_suspend(struct pcf50633 *pcf);
	231	int pcf50633_irq_resume(struct pcf50633 *pcf);
	232	#endif
	233
68d641ef	234	#endif