[mirror_ubuntu-bionic-kernel.git] / include / linux / mfd / rn5t618.h

/*
 * MFD core driver for Ricoh RN5T618 PMIC
 *
 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef __LINUX_MFD_RN5T618_H
#define __LINUX_MFD_RN5T618_H

#include <linux/regmap.h>

#define RN5T618_LSIVER			0x00
#define RN5T618_OTPVER			0x01
#define RN5T618_IODAC			0x02
#define RN5T618_VINDAC			0x03
#define RN5T618_OUT32KEN		0x05
#define RN5T618_CPUCNT			0x06
#define RN5T618_PSWR			0x07
#define RN5T618_PONHIS			0x09
#define RN5T618_POFFHIS			0x0a
#define RN5T618_WATCHDOG		0x0b
#define RN5T618_WATCHDOGCNT		0x0c
#define RN5T618_PWRFUNC			0x0d
#define RN5T618_SLPCNT			0x0e
#define RN5T618_REPCNT			0x0f
#define RN5T618_PWRONTIMSET		0x10
#define RN5T618_NOETIMSETCNT		0x11
#define RN5T618_PWRIREN			0x12
#define RN5T618_PWRIRQ			0x13
#define RN5T618_PWRMON			0x14
#define RN5T618_PWRIRSEL		0x15
#define RN5T618_DC1_SLOT		0x16
#define RN5T618_DC2_SLOT		0x17
#define RN5T618_DC3_SLOT		0x18
#define RN5T618_DC4_SLOT		0x19
#define RN5T618_LDO1_SLOT		0x1b
#define RN5T618_LDO2_SLOT		0x1c
#define RN5T618_LDO3_SLOT		0x1d
#define RN5T618_LDO4_SLOT		0x1e
#define RN5T618_LDO5_SLOT		0x1f
#define RN5T618_PSO0_SLOT		0x25
#define RN5T618_PSO1_SLOT		0x26
#define RN5T618_PSO2_SLOT		0x27
#define RN5T618_PSO3_SLOT		0x28
#define RN5T618_LDORTC1_SLOT		0x2a
#define RN5T618_DC1CTL			0x2c
#define RN5T618_DC1CTL2			0x2d
#define RN5T618_DC2CTL			0x2e
#define RN5T618_DC2CTL2			0x2f
#define RN5T618_DC3CTL			0x30
#define RN5T618_DC3CTL2			0x31
#define RN5T618_DC4CTL			0x32
#define RN5T618_DC4CTL2			0x33
#define RN5T618_DC5CTL			0x34
#define RN5T618_DC5CTL2			0x35
#define RN5T618_DC1DAC			0x36
#define RN5T618_DC2DAC			0x37
#define RN5T618_DC3DAC			0x38
#define RN5T618_DC4DAC			0x39
#define RN5T618_DC5DAC			0x3a
#define RN5T618_DC1DAC_SLP		0x3b
#define RN5T618_DC2DAC_SLP		0x3c
#define RN5T618_DC3DAC_SLP		0x3d
#define RN5T618_DC4DAC_SLP		0x3e
#define RN5T618_DCIREN			0x40
#define RN5T618_DCIRQ			0x41
#define RN5T618_DCIRMON			0x42
#define RN5T618_LDOEN1			0x44
#define RN5T618_LDOEN2			0x45
#define RN5T618_LDODIS			0x46
#define RN5T618_LDO1DAC			0x4c
#define RN5T618_LDO2DAC			0x4d
#define RN5T618_LDO3DAC			0x4e
#define RN5T618_LDO4DAC			0x4f
#define RN5T618_LDO5DAC			0x50
#define RN5T618_LDO6DAC			0x51
#define RN5T618_LDO7DAC			0x52
#define RN5T618_LDO8DAC			0x53
#define RN5T618_LDO9DAC			0x54
#define RN5T618_LDO10DAC		0x55
#define RN5T618_LDORTCDAC		0x56
#define RN5T618_LDORTC2DAC		0x57
#define RN5T618_LDO1DAC_SLP		0x58
#define RN5T618_LDO2DAC_SLP		0x59
#define RN5T618_LDO3DAC_SLP		0x5a
#define RN5T618_LDO4DAC_SLP		0x5b
#define RN5T618_LDO5DAC_SLP		0x5c
#define RN5T618_ADCCNT1			0x64
#define RN5T618_ADCCNT2			0x65
#define RN5T618_ADCCNT3			0x66
#define RN5T618_ILIMDATAH		0x68
#define RN5T618_ILIMDATAL		0x69
#define RN5T618_VBATDATAH		0x6a
#define RN5T618_VBATDATAL		0x6b
#define RN5T618_VADPDATAH		0x6c
#define RN5T618_VADPDATAL		0x6d
#define RN5T618_VUSBDATAH		0x6e
#define RN5T618_VUSBDATAL		0x6f
#define RN5T618_VSYSDATAH		0x70
#define RN5T618_VSYSDATAL		0x71
#define RN5T618_VTHMDATAH		0x72
#define RN5T618_VTHMDATAL		0x73
#define RN5T618_AIN1DATAH		0x74
#define RN5T618_AIN1DATAL		0x75
#define RN5T618_AIN0DATAH		0x76
#define RN5T618_AIN0DATAL		0x77
#define RN5T618_ILIMTHL			0x78
#define RN5T618_ILIMTHH			0x79
#define RN5T618_VBATTHL			0x7a
#define RN5T618_VBATTHH			0x7b
#define RN5T618_VADPTHL			0x7c
#define RN5T618_VADPTHH			0x7d
#define RN5T618_VUSBTHL			0x7e
#define RN5T618_VUSBTHH			0x7f
#define RN5T618_VSYSTHL			0x80
#define RN5T618_VSYSTHH			0x81
#define RN5T618_VTHMTHL			0x82
#define RN5T618_VTHMTHH			0x83
#define RN5T618_AIN1THL			0x84
#define RN5T618_AIN1THH			0x85
#define RN5T618_AIN0THL			0x86
#define RN5T618_AIN0THH			0x87
#define RN5T618_EN_ADCIR1		0x88
#define RN5T618_EN_ADCIR2		0x89
#define RN5T618_EN_ADCIR3		0x8a
#define RN5T618_IR_ADC1			0x8c
#define RN5T618_IR_ADC2			0x8d
#define RN5T618_IR_ADC3			0x8e
#define RN5T618_IOSEL			0x90
#define RN5T618_IOOUT			0x91
#define RN5T618_GPEDGE1			0x92
#define RN5T618_GPEDGE2			0x93
#define RN5T618_EN_GPIR			0x94
#define RN5T618_IR_GPR			0x95
#define RN5T618_IR_GPF			0x96
#define RN5T618_MON_IOIN		0x97
#define RN5T618_GPLED_FUNC		0x98
#define RN5T618_INTPOL			0x9c
#define RN5T618_INTEN			0x9d
#define RN5T618_INTMON			0x9e
#define RN5T618_PREVINDAC		0xb0
#define RN5T618_BATDAC			0xb1
#define RN5T618_CHGCTL1			0xb3
#define RN5T618_CHGCTL2			0xb4
#define RN5T618_VSYSSET			0xb5
#define RN5T618_REGISET1		0xb6
#define RN5T618_REGISET2		0xb7
#define RN5T618_CHGISET			0xb8
#define RN5T618_TIMSET			0xb9
#define RN5T618_BATSET1			0xba
#define RN5T618_BATSET2			0xbb
#define RN5T618_DIESET			0xbc
#define RN5T618_CHGSTATE		0xbd
#define RN5T618_CHGCTRL_IRFMASK		0xbe
#define RN5T618_CHGSTAT_IRFMASK1	0xbf
#define RN5T618_CHGSTAT_IRFMASK2	0xc0
#define RN5T618_CHGERR_IRFMASK		0xc1
#define RN5T618_CHGCTRL_IRR		0xc2
#define RN5T618_CHGSTAT_IRR1		0xc3
#define RN5T618_CHGSTAT_IRR2		0xc4
#define RN5T618_CHGERR_IRR		0xc5
#define RN5T618_CHGCTRL_MONI		0xc6
#define RN5T618_CHGSTAT_MONI1		0xc7
#define RN5T618_CHGSTAT_MONI2		0xc8
#define RN5T618_CHGERR_MONI		0xc9
#define RN5T618_CHGCTRL_DETMOD1		0xca
#define RN5T618_CHGCTRL_DETMOD2		0xcb
#define RN5T618_CHGSTAT_DETMOD1		0xcc
#define RN5T618_CHGSTAT_DETMOD2		0xcd
#define RN5T618_CHGSTAT_DETMOD3		0xce
#define RN5T618_CHGERR_DETMOD1		0xcf
#define RN5T618_CHGERR_DETMOD2		0xd0
#define RN5T618_CHGOSCCTL		0xd4
#define RN5T618_CHGOSCSCORESET1		0xd5
#define RN5T618_CHGOSCSCORESET2		0xd6
#define RN5T618_CHGOSCSCORESET3		0xd7
#define RN5T618_CHGOSCFREQSET1		0xd8
#define RN5T618_CHGOSCFREQSET2		0xd9
#define RN5T618_CONTROL			0xe0
#define RN5T618_SOC			0xe1
#define RN5T618_RE_CAP_H		0xe2
#define RN5T618_RE_CAP_L		0xe3
#define RN5T618_FA_CAP_H		0xe4
#define RN5T618_FA_CAP_L		0xe5
#define RN5T618_AGE			0xe6
#define RN5T618_TT_EMPTY_H		0xe7
#define RN5T618_TT_EMPTY_L		0xe8
#define RN5T618_TT_FULL_H		0xe9
#define RN5T618_TT_FULL_L		0xea
#define RN5T618_VOLTAGE_1		0xeb
#define RN5T618_VOLTAGE_0		0xec
#define RN5T618_TEMP_1			0xed
#define RN5T618_TEMP_0			0xee
#define RN5T618_CC_CTRL			0xef
#define RN5T618_CC_COUNT2		0xf0
#define RN5T618_CC_COUNT1		0xf1
#define RN5T618_CC_COUNT0		0xf2
#define RN5T618_CC_SUMREG3		0xf3
#define RN5T618_CC_SUMREG2		0xf4
#define RN5T618_CC_SUMREG1		0xf5
#define RN5T618_CC_SUMREG0		0xf6
#define RN5T618_CC_OFFREG1		0xf7
#define RN5T618_CC_OFFREG0		0xf8
#define RN5T618_CC_GAINREG1		0xf9
#define RN5T618_CC_GAINREG0		0xfa
#define RN5T618_CC_AVEREG1		0xfb
#define RN5T618_CC_AVEREG0		0xfc
#define RN5T618_MAX_REG			0xfc

#define RN5T618_REPCNT_REPWRON		BIT(0)
#define RN5T618_SLPCNT_SWPWROFF		BIT(0)
#define RN5T618_WATCHDOG_WDOGEN		BIT(2)
#define RN5T618_WATCHDOG_WDOGTIM_M	(BIT(0) | BIT(1))
#define RN5T618_WATCHDOG_WDOGTIM_S	0
#define RN5T618_PWRIRQ_IR_WDOG		BIT(6)

enum {
	RN5T618_DCDC1,
	RN5T618_DCDC2,
	RN5T618_DCDC3,
	RN5T618_DCDC4,
	RN5T618_DCDC5,
	RN5T618_LDO1,
	RN5T618_LDO2,
	RN5T618_LDO3,
	RN5T618_LDO4,
	RN5T618_LDO5,
	RN5T618_LDO6,
	RN5T618_LDO7,
	RN5T618_LDO8,
	RN5T618_LDO9,
	RN5T618_LDO10,
	RN5T618_LDORTC1,
	RN5T618_LDORTC2,
	RN5T618_REG_NUM,
};

enum {
	RN5T567 = 0,
	RN5T618,
	RC5T619,
};

struct rn5t618 {
	struct regmap *regmap;
	long variant;
};

#endif /* __LINUX_MFD_RN5T618_H */
Commit	Line	Data
9bb9e29c BG	1	/*
	2	* MFD core driver for Ricoh RN5T618 PMIC
	3	*
	4	* Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* version 2 as published by the Free Software Foundation.
	9	*
	10	* You should have received a copy of the GNU General Public License
	11	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	12	*/
	13
	14	#ifndef __LINUX_MFD_RN5T618_H
	15	#define __LINUX_MFD_RN5T618_H
	16
	17	#include <linux/regmap.h>
	18
	19	#define RN5T618_LSIVER 0x00
	20	#define RN5T618_OTPVER 0x01
	21	#define RN5T618_IODAC 0x02
	22	#define RN5T618_VINDAC 0x03
a99ab50d	23	#define RN5T618_OUT32KEN 0x05
9bb9e29c BG	24	#define RN5T618_CPUCNT 0x06
	25	#define RN5T618_PSWR 0x07
	26	#define RN5T618_PONHIS 0x09
	27	#define RN5T618_POFFHIS 0x0a
	28	#define RN5T618_WATCHDOG 0x0b
	29	#define RN5T618_WATCHDOGCNT 0x0c
	30	#define RN5T618_PWRFUNC 0x0d
	31	#define RN5T618_SLPCNT 0x0e
	32	#define RN5T618_REPCNT 0x0f
	33	#define RN5T618_PWRONTIMSET 0x10
	34	#define RN5T618_NOETIMSETCNT 0x11
	35	#define RN5T618_PWRIREN 0x12
	36	#define RN5T618_PWRIRQ 0x13
	37	#define RN5T618_PWRMON 0x14
	38	#define RN5T618_PWRIRSEL 0x15
	39	#define RN5T618_DC1_SLOT 0x16
	40	#define RN5T618_DC2_SLOT 0x17
	41	#define RN5T618_DC3_SLOT 0x18
a99ab50d	42	#define RN5T618_DC4_SLOT 0x19
9bb9e29c BG	43	#define RN5T618_LDO1_SLOT 0x1b
	44	#define RN5T618_LDO2_SLOT 0x1c
	45	#define RN5T618_LDO3_SLOT 0x1d
	46	#define RN5T618_LDO4_SLOT 0x1e
	47	#define RN5T618_LDO5_SLOT 0x1f
	48	#define RN5T618_PSO0_SLOT 0x25
	49	#define RN5T618_PSO1_SLOT 0x26
	50	#define RN5T618_PSO2_SLOT 0x27
	51	#define RN5T618_PSO3_SLOT 0x28
	52	#define RN5T618_LDORTC1_SLOT 0x2a
	53	#define RN5T618_DC1CTL 0x2c
	54	#define RN5T618_DC1CTL2 0x2d
	55	#define RN5T618_DC2CTL 0x2e
	56	#define RN5T618_DC2CTL2 0x2f
	57	#define RN5T618_DC3CTL 0x30
	58	#define RN5T618_DC3CTL2 0x31
a99ab50d SA	59	#define RN5T618_DC4CTL 0x32
a99ab50d SA	60	#define RN5T618_DC4CTL2 0x33
c5e589a1 PHH	61	#define RN5T618_DC5CTL 0x34
c5e589a1 PHH	62	#define RN5T618_DC5CTL2 0x35
9bb9e29c BG	63	#define RN5T618_DC1DAC 0x36
	64	#define RN5T618_DC2DAC 0x37
	65	#define RN5T618_DC3DAC 0x38
a99ab50d	66	#define RN5T618_DC4DAC 0x39
c5e589a1	67	#define RN5T618_DC5DAC 0x3a
9bb9e29c BG	68	#define RN5T618_DC1DAC_SLP 0x3b
	69	#define RN5T618_DC2DAC_SLP 0x3c
	70	#define RN5T618_DC3DAC_SLP 0x3d
a99ab50d	71	#define RN5T618_DC4DAC_SLP 0x3e
9bb9e29c BG	72	#define RN5T618_DCIREN 0x40
	73	#define RN5T618_DCIRQ 0x41
	74	#define RN5T618_DCIRMON 0x42
	75	#define RN5T618_LDOEN1 0x44
	76	#define RN5T618_LDOEN2 0x45
	77	#define RN5T618_LDODIS 0x46
	78	#define RN5T618_LDO1DAC 0x4c
	79	#define RN5T618_LDO2DAC 0x4d
	80	#define RN5T618_LDO3DAC 0x4e
	81	#define RN5T618_LDO4DAC 0x4f
	82	#define RN5T618_LDO5DAC 0x50
c5e589a1 PHH	83	#define RN5T618_LDO6DAC 0x51
	84	#define RN5T618_LDO7DAC 0x52
	85	#define RN5T618_LDO8DAC 0x53
	86	#define RN5T618_LDO9DAC 0x54
	87	#define RN5T618_LDO10DAC 0x55
9bb9e29c BG	88	#define RN5T618_LDORTCDAC 0x56
	89	#define RN5T618_LDORTC2DAC 0x57
	90	#define RN5T618_LDO1DAC_SLP 0x58
	91	#define RN5T618_LDO2DAC_SLP 0x59
	92	#define RN5T618_LDO3DAC_SLP 0x5a
	93	#define RN5T618_LDO4DAC_SLP 0x5b
	94	#define RN5T618_LDO5DAC_SLP 0x5c
	95	#define RN5T618_ADCCNT1 0x64
	96	#define RN5T618_ADCCNT2 0x65
	97	#define RN5T618_ADCCNT3 0x66
	98	#define RN5T618_ILIMDATAH 0x68
	99	#define RN5T618_ILIMDATAL 0x69
	100	#define RN5T618_VBATDATAH 0x6a
	101	#define RN5T618_VBATDATAL 0x6b
	102	#define RN5T618_VADPDATAH 0x6c
	103	#define RN5T618_VADPDATAL 0x6d
	104	#define RN5T618_VUSBDATAH 0x6e
	105	#define RN5T618_VUSBDATAL 0x6f
	106	#define RN5T618_VSYSDATAH 0x70
	107	#define RN5T618_VSYSDATAL 0x71
	108	#define RN5T618_VTHMDATAH 0x72
	109	#define RN5T618_VTHMDATAL 0x73
	110	#define RN5T618_AIN1DATAH 0x74
	111	#define RN5T618_AIN1DATAL 0x75
	112	#define RN5T618_AIN0DATAH 0x76
	113	#define RN5T618_AIN0DATAL 0x77
	114	#define RN5T618_ILIMTHL 0x78
	115	#define RN5T618_ILIMTHH 0x79
	116	#define RN5T618_VBATTHL 0x7a
	117	#define RN5T618_VBATTHH 0x7b
	118	#define RN5T618_VADPTHL 0x7c
	119	#define RN5T618_VADPTHH 0x7d
	120	#define RN5T618_VUSBTHL 0x7e
	121	#define RN5T618_VUSBTHH 0x7f
	122	#define RN5T618_VSYSTHL 0x80
	123	#define RN5T618_VSYSTHH 0x81
	124	#define RN5T618_VTHMTHL 0x82
	125	#define RN5T618_VTHMTHH 0x83
	126	#define RN5T618_AIN1THL 0x84
	127	#define RN5T618_AIN1THH 0x85
	128	#define RN5T618_AIN0THL 0x86
	129	#define RN5T618_AIN0THH 0x87
	130	#define RN5T618_EN_ADCIR1 0x88
	131	#define RN5T618_EN_ADCIR2 0x89
	132	#define RN5T618_EN_ADCIR3 0x8a
	133	#define RN5T618_IR_ADC1 0x8c
	134	#define RN5T618_IR_ADC2 0x8d
	135	#define RN5T618_IR_ADC3 0x8e
	136	#define RN5T618_IOSEL 0x90
	137	#define RN5T618_IOOUT 0x91
	138	#define RN5T618_GPEDGE1 0x92
	139	#define RN5T618_GPEDGE2 0x93
	140	#define RN5T618_EN_GPIR 0x94
	141	#define RN5T618_IR_GPR 0x95
	142	#define RN5T618_IR_GPF 0x96
	143	#define RN5T618_MON_IOIN 0x97
	144	#define RN5T618_GPLED_FUNC 0x98
	145	#define RN5T618_INTPOL 0x9c
	146	#define RN5T618_INTEN 0x9d
	147	#define RN5T618_INTMON 0x9e
	148	#define RN5T618_PREVINDAC 0xb0
	149	#define RN5T618_BATDAC 0xb1
	150	#define RN5T618_CHGCTL1 0xb3
	151	#define RN5T618_CHGCTL2 0xb4
152	#define RN5T618_VSYSSET 0xb5
153	#define RN5T618_REGISET1 0xb6
154	#define RN5T618_REGISET2 0xb7
155	#define RN5T618_CHGISET 0xb8
156	#define RN5T618_TIMSET 0xb9
157	#define RN5T618_BATSET1 0xba
158	#define RN5T618_BATSET2 0xbb
159	#define RN5T618_DIESET 0xbc
160	#define RN5T618_CHGSTATE 0xbd
161	#define RN5T618_CHGCTRL_IRFMASK 0xbe
162	#define RN5T618_CHGSTAT_IRFMASK1 0xbf
163	#define RN5T618_CHGSTAT_IRFMASK2 0xc0
164	#define RN5T618_CHGERR_IRFMASK 0xc1
165	#define RN5T618_CHGCTRL_IRR 0xc2
166	#define RN5T618_CHGSTAT_IRR1 0xc3
167	#define RN5T618_CHGSTAT_IRR2 0xc4
168	#define RN5T618_CHGERR_IRR 0xc5
169	#define RN5T618_CHGCTRL_MONI 0xc6
170	#define RN5T618_CHGSTAT_MONI1 0xc7
171	#define RN5T618_CHGSTAT_MONI2 0xc8
172	#define RN5T618_CHGERR_MONI 0xc9
173	#define RN5T618_CHGCTRL_DETMOD1 0xca
174	#define RN5T618_CHGCTRL_DETMOD2 0xcb
175	#define RN5T618_CHGSTAT_DETMOD1 0xcc
176	#define RN5T618_CHGSTAT_DETMOD2 0xcd
177	#define RN5T618_CHGSTAT_DETMOD3 0xce
178	#define RN5T618_CHGERR_DETMOD1 0xcf
179	#define RN5T618_CHGERR_DETMOD2 0xd0
180	#define RN5T618_CHGOSCCTL 0xd4
181	#define RN5T618_CHGOSCSCORESET1 0xd5
182	#define RN5T618_CHGOSCSCORESET2 0xd6
183	#define RN5T618_CHGOSCSCORESET3 0xd7
184	#define RN5T618_CHGOSCFREQSET1 0xd8
185	#define RN5T618_CHGOSCFREQSET2 0xd9
186	#define RN5T618_CONTROL 0xe0
187	#define RN5T618_SOC 0xe1
188	#define RN5T618_RE_CAP_H 0xe2
189	#define RN5T618_RE_CAP_L 0xe3
190	#define RN5T618_FA_CAP_H 0xe4
191	#define RN5T618_FA_CAP_L 0xe5
192	#define RN5T618_AGE 0xe6
193	#define RN5T618_TT_EMPTY_H 0xe7
194	#define RN5T618_TT_EMPTY_L 0xe8
195	#define RN5T618_TT_FULL_H 0xe9
196	#define RN5T618_TT_FULL_L 0xea
197	#define RN5T618_VOLTAGE_1 0xeb
198	#define RN5T618_VOLTAGE_0 0xec
199	#define RN5T618_TEMP_1 0xed
200	#define RN5T618_TEMP_0 0xee
201	#define RN5T618_CC_CTRL 0xef
202	#define RN5T618_CC_COUNT2 0xf0
203	#define RN5T618_CC_COUNT1 0xf1
204	#define RN5T618_CC_COUNT0 0xf2
205	#define RN5T618_CC_SUMREG3 0xf3
206	#define RN5T618_CC_SUMREG2 0xf4
207	#define RN5T618_CC_SUMREG1 0xf5
208	#define RN5T618_CC_SUMREG0 0xf6
209	#define RN5T618_CC_OFFREG1 0xf7
210	#define RN5T618_CC_OFFREG0 0xf8
211	#define RN5T618_CC_GAINREG1 0xf9
212	#define RN5T618_CC_GAINREG0 0xfa
213	#define RN5T618_CC_AVEREG1 0xfb
214	#define RN5T618_CC_AVEREG0 0xfc
215	#define RN5T618_MAX_REG 0xfc
216
217	#define RN5T618_REPCNT_REPWRON BIT(0)
218	#define RN5T618_SLPCNT_SWPWROFF BIT(0)
219	#define RN5T618_WATCHDOG_WDOGEN BIT(2)
220	#define RN5T618_WATCHDOG_WDOGTIM_M (BIT(0) \| BIT(1))
221	#define RN5T618_WATCHDOG_WDOGTIM_S 0
222	#define RN5T618_PWRIRQ_IR_WDOG BIT(6)
223
224	enum {
225	RN5T618_DCDC1,
226	RN5T618_DCDC2,
227	RN5T618_DCDC3,
ed6d362d	228	RN5T618_DCDC4,
83b2a3c2	229	RN5T618_DCDC5,
9bb9e29c BG	230	RN5T618_LDO1,
	231	RN5T618_LDO2,
	232	RN5T618_LDO3,
	233	RN5T618_LDO4,
	234	RN5T618_LDO5,
83b2a3c2 PHH	235	RN5T618_LDO6,
	236	RN5T618_LDO7,
	237	RN5T618_LDO8,
	238	RN5T618_LDO9,
	239	RN5T618_LDO10,
9bb9e29c BG	240	RN5T618_LDORTC1,
	241	RN5T618_LDORTC2,
	242	RN5T618_REG_NUM,
	243	};
	244
a99ab50d SA	245	enum {
	246	RN5T567 = 0,
	247	RN5T618,
c5e589a1	248	RC5T619,
a99ab50d SA	249	};
a99ab50d SA	250
9bb9e29c BG	251	struct rn5t618 {
9bb9e29c BG	252	struct regmap *regmap;
a99ab50d	253	long variant;
9bb9e29c BG	254	};
	255
	256	#endif /* __LINUX_MFD_RN5T618_H */