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1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License Terms: GNU General Public License, version 2 | |
5 | */ | |
6 | ||
20406ebf SI |
7 | #ifndef __LINUX_MFD_TC3589x_H |
8 | #define __LINUX_MFD_TC3589x_H | |
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9 | |
10 | #include <linux/device.h> | |
11 | ||
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12 | enum tx3589x_block { |
13 | TC3589x_BLOCK_GPIO = 1 << 0, | |
14 | TC3589x_BLOCK_KEYPAD = 1 << 1, | |
15 | }; | |
16 | ||
20406ebf SI |
17 | #define TC3589x_RSTCTRL_IRQRST (1 << 4) |
18 | #define TC3589x_RSTCTRL_TIMRST (1 << 3) | |
19 | #define TC3589x_RSTCTRL_ROTRST (1 << 2) | |
20 | #define TC3589x_RSTCTRL_KBDRST (1 << 1) | |
21 | #define TC3589x_RSTCTRL_GPIRST (1 << 0) | |
22 | ||
23 | #define TC3589x_IRQST 0x91 | |
24 | ||
25 | #define TC3589x_MANFCODE_MAGIC 0x03 | |
26 | #define TC3589x_MANFCODE 0x80 | |
27 | #define TC3589x_VERSION 0x81 | |
28 | #define TC3589x_IOCFG 0xA7 | |
29 | ||
30 | #define TC3589x_CLKMODE 0x88 | |
31 | #define TC3589x_CLKCFG 0x89 | |
32 | #define TC3589x_CLKEN 0x8A | |
33 | ||
34 | #define TC3589x_RSTCTRL 0x82 | |
35 | #define TC3589x_EXTRSTN 0x83 | |
36 | #define TC3589x_RSTINTCLR 0x84 | |
37 | ||
38 | #define TC3589x_GPIOIS0 0xC9 | |
39 | #define TC3589x_GPIOIS1 0xCA | |
40 | #define TC3589x_GPIOIS2 0xCB | |
41 | #define TC3589x_GPIOIBE0 0xCC | |
42 | #define TC3589x_GPIOIBE1 0xCD | |
43 | #define TC3589x_GPIOIBE2 0xCE | |
44 | #define TC3589x_GPIOIEV0 0xCF | |
45 | #define TC3589x_GPIOIEV1 0xD0 | |
46 | #define TC3589x_GPIOIEV2 0xD1 | |
47 | #define TC3589x_GPIOIE0 0xD2 | |
48 | #define TC3589x_GPIOIE1 0xD3 | |
49 | #define TC3589x_GPIOIE2 0xD4 | |
50 | #define TC3589x_GPIORIS0 0xD6 | |
51 | #define TC3589x_GPIORIS1 0xD7 | |
52 | #define TC3589x_GPIORIS2 0xD8 | |
53 | #define TC3589x_GPIOMIS0 0xD9 | |
54 | #define TC3589x_GPIOMIS1 0xDA | |
55 | #define TC3589x_GPIOMIS2 0xDB | |
56 | #define TC3589x_GPIOIC0 0xDC | |
57 | #define TC3589x_GPIOIC1 0xDD | |
58 | #define TC3589x_GPIOIC2 0xDE | |
59 | ||
60 | #define TC3589x_GPIODATA0 0xC0 | |
61 | #define TC3589x_GPIOMASK0 0xc1 | |
62 | #define TC3589x_GPIODATA1 0xC2 | |
63 | #define TC3589x_GPIOMASK1 0xc3 | |
64 | #define TC3589x_GPIODATA2 0xC4 | |
65 | #define TC3589x_GPIOMASK2 0xC5 | |
66 | ||
67 | #define TC3589x_GPIODIR0 0xC6 | |
68 | #define TC3589x_GPIODIR1 0xC7 | |
69 | #define TC3589x_GPIODIR2 0xC8 | |
70 | ||
71 | #define TC3589x_GPIOSYNC0 0xE6 | |
72 | #define TC3589x_GPIOSYNC1 0xE7 | |
73 | #define TC3589x_GPIOSYNC2 0xE8 | |
74 | ||
75 | #define TC3589x_GPIOWAKE0 0xE9 | |
76 | #define TC3589x_GPIOWAKE1 0xEA | |
77 | #define TC3589x_GPIOWAKE2 0xEB | |
78 | ||
79 | #define TC3589x_GPIOODM0 0xE0 | |
80 | #define TC3589x_GPIOODE0 0xE1 | |
81 | #define TC3589x_GPIOODM1 0xE2 | |
82 | #define TC3589x_GPIOODE1 0xE3 | |
83 | #define TC3589x_GPIOODM2 0xE4 | |
84 | #define TC3589x_GPIOODE2 0xE5 | |
85 | ||
86 | #define TC3589x_INT_GPIIRQ 0 | |
87 | #define TC3589x_INT_TI0IRQ 1 | |
88 | #define TC3589x_INT_TI1IRQ 2 | |
89 | #define TC3589x_INT_TI2IRQ 3 | |
90 | #define TC3589x_INT_ROTIRQ 5 | |
91 | #define TC3589x_INT_KBDIRQ 6 | |
92 | #define TC3589x_INT_PORIRQ 7 | |
93 | ||
94 | #define TC3589x_NR_INTERNAL_IRQS 8 | |
95 | #define TC3589x_INT_GPIO(x) (TC3589x_NR_INTERNAL_IRQS + (x)) | |
96 | ||
97 | struct tc3589x { | |
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98 | struct mutex lock; |
99 | struct device *dev; | |
100 | struct i2c_client *i2c; | |
101 | ||
102 | int irq_base; | |
103 | int num_gpio; | |
20406ebf | 104 | struct tc3589x_platform_data *pdata; |
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105 | }; |
106 | ||
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107 | extern int tc3589x_reg_write(struct tc3589x *tc3589x, u8 reg, u8 data); |
108 | extern int tc3589x_reg_read(struct tc3589x *tc3589x, u8 reg); | |
109 | extern int tc3589x_block_read(struct tc3589x *tc3589x, u8 reg, u8 length, | |
b4ecd326 | 110 | u8 *values); |
20406ebf | 111 | extern int tc3589x_block_write(struct tc3589x *tc3589x, u8 reg, u8 length, |
b4ecd326 | 112 | const u8 *values); |
20406ebf | 113 | extern int tc3589x_set_bits(struct tc3589x *tc3589x, u8 reg, u8 mask, u8 val); |
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114 | |
115 | /** | |
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116 | * struct tc3589x_gpio_platform_data - TC3589x GPIO platform data |
117 | * @gpio_base: first gpio number assigned to TC3589x. A maximum of | |
118 | * %TC3589x_NR_GPIOS GPIOs will be allocated. | |
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119 | * @setup: callback for board-specific initialization |
120 | * @remove: callback for board-specific teardown | |
b4ecd326 | 121 | */ |
20406ebf | 122 | struct tc3589x_gpio_platform_data { |
b4ecd326 | 123 | int gpio_base; |
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124 | void (*setup)(struct tc3589x *tc3589x, unsigned gpio_base); |
125 | void (*remove)(struct tc3589x *tc3589x, unsigned gpio_base); | |
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126 | }; |
127 | ||
128 | /** | |
20406ebf | 129 | * struct tc3589x_platform_data - TC3589x platform data |
611b7590 | 130 | * @block: bitmask of blocks to enable (use TC3589x_BLOCK_*) |
20406ebf | 131 | * @irq_base: base IRQ number. %TC3589x_NR_IRQS irqs will be used. |
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132 | * @gpio: GPIO-specific platform data |
133 | */ | |
20406ebf | 134 | struct tc3589x_platform_data { |
611b7590 | 135 | unsigned int block; |
b4ecd326 | 136 | int irq_base; |
20406ebf | 137 | struct tc3589x_gpio_platform_data *gpio; |
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138 | }; |
139 | ||
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140 | #define TC3589x_NR_GPIOS 24 |
141 | #define TC3589x_NR_IRQS TC3589x_INT_GPIO(TC3589x_NR_GPIOS) | |
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142 | |
143 | #endif |