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mmc: dw_mmc: clear IDSTS register when initialize IDMAC
[mirror_ubuntu-bionic-kernel.git] / include / linux / mfd / tmio.h
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1#ifndef MFD_TMIO_H
2#define MFD_TMIO_H
3
c8be24c2 4#include <linux/device.h>
b53cde35 5#include <linux/fb.h>
64e8867b 6#include <linux/io.h>
c8be24c2 7#include <linux/jiffies.h>
64e8867b 8#include <linux/platform_device.h>
7311bef0 9#include <linux/pm_runtime.h>
b53cde35 10
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11#define tmio_ioread8(addr) readb(addr)
12#define tmio_ioread16(addr) readw(addr)
13#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
14#define tmio_ioread32(addr) \
15 (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
16
17#define tmio_iowrite8(val, addr) writeb((val), (addr))
18#define tmio_iowrite16(val, addr) writew((val), (addr))
19#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
20#define tmio_iowrite32(val, addr) \
21 do { \
22 writew((val), (addr)); \
23 writew((val) >> 16, (addr) + 2); \
24 } while (0)
25
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26#define CNF_CMD 0x04
27#define CNF_CTL_BASE 0x10
28#define CNF_INT_PIN 0x3d
29#define CNF_STOP_CLK_CTL 0x40
30#define CNF_GCLK_CTL 0x41
31#define CNF_SD_CLK_MODE 0x42
32#define CNF_PIN_STATUS 0x44
33#define CNF_PWR_CTL_1 0x48
34#define CNF_PWR_CTL_2 0x49
35#define CNF_PWR_CTL_3 0x4a
36#define CNF_CARD_DETECT_MODE 0x4c
37#define CNF_SD_SLOT 0x50
38#define CNF_EXT_GCLK_CTL_1 0xf0
39#define CNF_EXT_GCLK_CTL_2 0xf1
40#define CNF_EXT_GCLK_CTL_3 0xf9
41#define CNF_SD_LED_EN_1 0xfa
42#define CNF_SD_LED_EN_2 0xfe
43
44#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
45
46#define sd_config_write8(base, shift, reg, val) \
47 tmio_iowrite8((val), (base) + ((reg) << (shift)))
48#define sd_config_write16(base, shift, reg, val) \
49 tmio_iowrite16((val), (base) + ((reg) << (shift)))
50#define sd_config_write32(base, shift, reg, val) \
51 do { \
52 tmio_iowrite16((val), (base) + ((reg) << (shift))); \
53 tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
54 } while (0)
55
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56/* tmio MMC platform flags */
57#define TMIO_MMC_WRPROTECT_DISABLE (1 << 0)
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58/*
59 * Some controllers can support a 2-byte block size when the bus width
60 * is configured in 4-bit mode.
61 */
62#define TMIO_MMC_BLKSZ_2BYTES (1 << 1)
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63/*
64 * Some controllers can support SDIO IRQ signalling.
65 */
66#define TMIO_MMC_SDIO_IRQ (1 << 2)
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67/*
68 * Some controllers require waiting for the SD bus to become
69 * idle before writing to some registers.
70 */
71#define TMIO_MMC_HAS_IDLE_WAIT (1 << 4)
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72/*
73 * A GPIO is used for card hotplug detection. We need an extra flag for this,
74 * because 0 is a valid GPIO number too, and requiring users to specify
75 * cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility.
76 */
77#define TMIO_MMC_USE_GPIO_CD (1 << 5)
ac8fb3e8 78
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79int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
80int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
81void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
82void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
83
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84struct tmio_mmc_dma {
85 void *chan_priv_tx;
86 void *chan_priv_rx;
93173054 87 int alignment_shift;
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88};
89
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90struct tmio_mmc_host;
91
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92/*
93 * data for the MMC controller
94 */
95struct tmio_mmc_data {
707f0b2f 96 unsigned int hclk;
b741d440 97 unsigned long capabilities;
02cb3221 98 unsigned long capabilities2;
ac8fb3e8 99 unsigned long flags;
a2b14dc9 100 u32 ocr_mask; /* available voltages */
42a45339 101 struct tmio_mmc_dma *dma;
7311bef0 102 struct device *dev;
c8be24c2 103 unsigned int cd_gpio;
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104 void (*set_pwr)(struct platform_device *host, int state);
105 void (*set_clk_div)(struct platform_device *host, int state);
19ca7502 106 int (*get_cd)(struct platform_device *host);
973ed3af 107 int (*write16_hook)(struct tmio_mmc_host *host, int addr);
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108 /* clock management callbacks */
109 int (*clk_enable)(struct platform_device *pdev, unsigned int *f);
110 void (*clk_disable)(struct platform_device *pdev);
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111};
112
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113/*
114 * data for the NAND controller
115 */
116struct tmio_nand_data {
117 struct nand_bbt_descr *badblock_pattern;
118 struct mtd_partition *partition;
119 unsigned int num_partitions;
120};
121
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122#define FBIO_TMIO_ACC_WRITE 0x7C639300
123#define FBIO_TMIO_ACC_SYNC 0x7C639301
124
125struct tmio_fb_data {
126 int (*lcd_set_power)(struct platform_device *fb_dev,
127 bool on);
128 int (*lcd_mode)(struct platform_device *fb_dev,
129 const struct fb_videomode *mode);
130 int num_modes;
131 struct fb_videomode *modes;
132
133 /* in mm: size of screen */
134 int height;
135 int width;
136};
137
138
f024ff10 139#endif