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1/*
2 * Core driver interface for TI TPS65090 PMIC family
3 *
4 * Copyright (C) 2012 NVIDIA Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 *
20 */
21
22#ifndef __LINUX_MFD_TPS65090_H
23#define __LINUX_MFD_TPS65090_H
24
06c4998b 25#include <linux/irq.h>
b9c79323 26#include <linux/regmap.h>
06c4998b 27
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28/* TPS65090 IRQs */
29enum {
751391c7 30 TPS65090_IRQ_INTERRUPT,
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31 TPS65090_IRQ_VAC_STATUS_CHANGE,
32 TPS65090_IRQ_VSYS_STATUS_CHANGE,
33 TPS65090_IRQ_BAT_STATUS_CHANGE,
34 TPS65090_IRQ_CHARGING_STATUS_CHANGE,
35 TPS65090_IRQ_CHARGING_COMPLETE,
36 TPS65090_IRQ_OVERLOAD_DCDC1,
37 TPS65090_IRQ_OVERLOAD_DCDC2,
38 TPS65090_IRQ_OVERLOAD_DCDC3,
39 TPS65090_IRQ_OVERLOAD_FET1,
40 TPS65090_IRQ_OVERLOAD_FET2,
41 TPS65090_IRQ_OVERLOAD_FET3,
42 TPS65090_IRQ_OVERLOAD_FET4,
43 TPS65090_IRQ_OVERLOAD_FET5,
44 TPS65090_IRQ_OVERLOAD_FET6,
45 TPS65090_IRQ_OVERLOAD_FET7,
46};
06c4998b 47
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48/* TPS65090 Regulator ID */
49enum {
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50 TPS65090_REGULATOR_DCDC1,
51 TPS65090_REGULATOR_DCDC2,
52 TPS65090_REGULATOR_DCDC3,
53 TPS65090_REGULATOR_FET1,
54 TPS65090_REGULATOR_FET2,
55 TPS65090_REGULATOR_FET3,
56 TPS65090_REGULATOR_FET4,
57 TPS65090_REGULATOR_FET5,
58 TPS65090_REGULATOR_FET6,
59 TPS65090_REGULATOR_FET7,
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60 TPS65090_REGULATOR_LDO1,
61 TPS65090_REGULATOR_LDO2,
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62
63 /* Last entry for maximum ID */
8620ca9f 64 TPS65090_REGULATOR_MAX,
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65};
66
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67/* Register addresses */
68#define TPS65090_REG_INTR_STS 0x00
69#define TPS65090_REG_INTR_STS2 0x01
70#define TPS65090_REG_INTR_MASK 0x02
71#define TPS65090_REG_INTR_MASK2 0x03
72#define TPS65090_REG_CG_CTRL0 0x04
73#define TPS65090_REG_CG_CTRL1 0x05
74#define TPS65090_REG_CG_CTRL2 0x06
75#define TPS65090_REG_CG_CTRL3 0x07
76#define TPS65090_REG_CG_CTRL4 0x08
77#define TPS65090_REG_CG_CTRL5 0x09
78#define TPS65090_REG_CG_STATUS1 0x0a
79#define TPS65090_REG_CG_STATUS2 0x0b
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80#define TPS65090_REG_AD_OUT1 0x17
81#define TPS65090_REG_AD_OUT2 0x18
82
83#define TPS65090_MAX_REG TPS65090_REG_AD_OUT2
84#define TPS65090_NUM_REGS (TPS65090_MAX_REG + 1)
c42ba72e 85
06c4998b 86struct tps65090 {
06c4998b 87 struct device *dev;
06c4998b 88 struct regmap *rmap;
759f2598 89 struct regmap_irq_chip_data *irq_data;
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90};
91
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92/*
93 * struct tps65090_regulator_plat_data
94 *
95 * @reg_init_data: The regulator init data.
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96 * @enable_ext_control: Enable extrenal control or not. Only available for
97 * DCDC1, DCDC2 and DCDC3.
98 * @gpio: Gpio number if external control is enabled and controlled through
99 * gpio.
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100 * @overcurrent_wait_valid: True if the overcurrent_wait should be applied.
101 * @overcurrent_wait: Value to set as the overcurrent wait time. This is the
102 * actual bitfield value, not a time in ms (valid value are 0 - 3).
24282a1c 103 */
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104struct tps65090_regulator_plat_data {
105 struct regulator_init_data *reg_init_data;
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106 bool enable_ext_control;
107 int gpio;
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108 bool overcurrent_wait_valid;
109 int overcurrent_wait;
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110};
111
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112struct tps65090_platform_data {
113 int irq_base;
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114
115 char **supplied_to;
116 size_t num_supplicants;
117 int enable_low_current_chrg;
118
8620ca9f 119 struct tps65090_regulator_plat_data *reg_pdata[TPS65090_REGULATOR_MAX];
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120};
121
122/*
123 * NOTE: the functions below are not intended for use outside
124 * of the TPS65090 sub-device drivers
125 */
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126static inline int tps65090_write(struct device *dev, int reg, uint8_t val)
127{
128 struct tps65090 *tps = dev_get_drvdata(dev);
129
130 return regmap_write(tps->rmap, reg, val);
131}
132
133static inline int tps65090_read(struct device *dev, int reg, uint8_t *val)
134{
135 struct tps65090 *tps = dev_get_drvdata(dev);
136 unsigned int temp_val;
137 int ret;
138
139 ret = regmap_read(tps->rmap, reg, &temp_val);
140 if (!ret)
141 *val = temp_val;
142 return ret;
143}
144
145static inline int tps65090_set_bits(struct device *dev, int reg,
146 uint8_t bit_num)
147{
148 struct tps65090 *tps = dev_get_drvdata(dev);
149
150 return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u);
151}
152
153static inline int tps65090_clr_bits(struct device *dev, int reg,
154 uint8_t bit_num)
155{
156 struct tps65090 *tps = dev_get_drvdata(dev);
157
158 return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u);
159}
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160
161#endif /*__LINUX_MFD_TPS65090_H */