projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 9bbf6a15 RM |
1 | /* |
| 2 | * Copyright (c) 2017 Intel Corporation | |
| 3 | * | |
| 4 | * Functions to access TPS68470 power management chip. | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or | |
| 7 | * modify it under the terms of the GNU General Public License as | |
| 8 | * published by the Free Software Foundation version 2. | |
| 9 | * | |
| 10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
| 11 | * kind, whether express or implied; without even the implied warranty | |
| 12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 13 | * GNU General Public License for more details. | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef __LINUX_MFD_TPS68470_H | |
| 17 | #define __LINUX_MFD_TPS68470_H | |
| 18 | ||
| 19 | /* Register addresses */ | |
| 20 | #define TPS68470_REG_POSTDIV2 0x06 | |
| 21 | #define TPS68470_REG_BOOSTDIV 0x07 | |
| 22 | #define TPS68470_REG_BUCKDIV 0x08 | |
| 23 | #define TPS68470_REG_PLLSWR 0x09 | |
| 24 | #define TPS68470_REG_XTALDIV 0x0A | |
| 25 | #define TPS68470_REG_PLLDIV 0x0B | |
| 26 | #define TPS68470_REG_POSTDIV 0x0C | |
| 27 | #define TPS68470_REG_PLLCTL 0x0D | |
| 28 | #define TPS68470_REG_PLLCTL2 0x0E | |
| 29 | #define TPS68470_REG_CLKCFG1 0x0F | |
| 30 | #define TPS68470_REG_CLKCFG2 0x10 | |
| 31 | #define TPS68470_REG_GPCTL0A 0x14 | |
| 32 | #define TPS68470_REG_GPCTL0B 0x15 | |
| 33 | #define TPS68470_REG_GPCTL1A 0x16 | |
| 34 | #define TPS68470_REG_GPCTL1B 0x17 | |
| 35 | #define TPS68470_REG_GPCTL2A 0x18 | |
| 36 | #define TPS68470_REG_GPCTL2B 0x19 | |
| 37 | #define TPS68470_REG_GPCTL3A 0x1A | |
| 38 | #define TPS68470_REG_GPCTL3B 0x1B | |
| 39 | #define TPS68470_REG_GPCTL4A 0x1C | |
| 40 | #define TPS68470_REG_GPCTL4B 0x1D | |
| 41 | #define TPS68470_REG_GPCTL5A 0x1E | |
| 42 | #define TPS68470_REG_GPCTL5B 0x1F | |
| 43 | #define TPS68470_REG_GPCTL6A 0x20 | |
| 44 | #define TPS68470_REG_GPCTL6B 0x21 | |
| 45 | #define TPS68470_REG_SGPO 0x22 | |
| 46 | #define TPS68470_REG_GPDI 0x26 | |
| 47 | #define TPS68470_REG_GPDO 0x27 | |
| 48 | #define TPS68470_REG_VCMVAL 0x3C | |
| 49 | #define TPS68470_REG_VAUX1VAL 0x3D | |
| 50 | #define TPS68470_REG_VAUX2VAL 0x3E | |
| 51 | #define TPS68470_REG_VIOVAL 0x3F | |
| 52 | #define TPS68470_REG_VSIOVAL 0x40 | |
| 53 | #define TPS68470_REG_VAVAL 0x41 | |
| 54 | #define TPS68470_REG_VDVAL 0x42 | |
| 55 | #define TPS68470_REG_S_I2C_CTL 0x43 | |
| 56 | #define TPS68470_REG_VCMCTL 0x44 | |
| 57 | #define TPS68470_REG_VAUX1CTL 0x45 | |
| 58 | #define TPS68470_REG_VAUX2CTL 0x46 | |
| 59 | #define TPS68470_REG_VACTL 0x47 | |
| 60 | #define TPS68470_REG_VDCTL 0x48 | |
| 61 | #define TPS68470_REG_RESET 0x50 | |
| 62 | #define TPS68470_REG_REVID 0xFF | |
| 63 | ||
| 64 | #define TPS68470_REG_MAX TPS68470_REG_REVID | |
| 65 | ||
| 66 | /* Register field definitions */ | |
| 67 | ||
| 68 | #define TPS68470_REG_RESET_MASK GENMASK(7, 0) | |
| 69 | #define TPS68470_VAVAL_AVOLT_MASK GENMASK(6, 0) | |
| 70 | ||
| 71 | #define TPS68470_VDVAL_DVOLT_MASK GENMASK(5, 0) | |
| 72 | #define TPS68470_VCMVAL_VCVOLT_MASK GENMASK(6, 0) | |
| 73 | #define TPS68470_VIOVAL_IOVOLT_MASK GENMASK(6, 0) | |
| 74 | #define TPS68470_VSIOVAL_IOVOLT_MASK GENMASK(6, 0) | |
| 75 | #define TPS68470_VAUX1VAL_AUX1VOLT_MASK GENMASK(6, 0) | |
| 76 | #define TPS68470_VAUX2VAL_AUX2VOLT_MASK GENMASK(6, 0) | |
| 77 | ||
| 78 | #define TPS68470_VACTL_EN_MASK GENMASK(0, 0) | |
| 79 | #define TPS68470_VDCTL_EN_MASK GENMASK(0, 0) | |
| 80 | #define TPS68470_VCMCTL_EN_MASK GENMASK(0, 0) | |
| 81 | #define TPS68470_S_I2C_CTL_EN_MASK GENMASK(1, 0) | |
| 82 | #define TPS68470_VAUX1CTL_EN_MASK GENMASK(0, 0) | |
| 83 | #define TPS68470_VAUX2CTL_EN_MASK GENMASK(0, 0) | |
| 84 | #define TPS68470_PLL_EN_MASK GENMASK(0, 0) | |
| 85 | ||
| 86 | #define TPS68470_CLKCFG1_MODE_A_MASK GENMASK(1, 0) | |
| 87 | #define TPS68470_CLKCFG1_MODE_B_MASK GENMASK(3, 2) | |
| 88 | ||
| 89 | #define TPS68470_GPIO_CTL_REG_A(x) (TPS68470_REG_GPCTL0A + (x) * 2) | |
| 90 | #define TPS68470_GPIO_CTL_REG_B(x) (TPS68470_REG_GPCTL0B + (x) * 2) | |
| 91 | #define TPS68470_GPIO_MODE_MASK GENMASK(1, 0) | |
| 92 | #define TPS68470_GPIO_MODE_IN 0 | |
| 93 | #define TPS68470_GPIO_MODE_IN_PULLUP 1 | |
| 94 | #define TPS68470_GPIO_MODE_OUT_CMOS 2 | |
| 95 | #define TPS68470_GPIO_MODE_OUT_ODRAIN 3 | |
| 96 | ||
| 97 | #endif /* __LINUX_MFD_TPS68470_H */ |