[mirror_ubuntu-artful-kernel.git] / include / linux / mfd / twl6040.h

/*
 * MFD driver for twl6040
 *
 * Authors:     Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
 *              Misael Lopez Cruz <misael.lopez@ti.com>
 *
 * Copyright:   (C) 2011 Texas Instruments, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#ifndef __TWL6040_CODEC_H__
#define __TWL6040_CODEC_H__

#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/regulator/consumer.h>
#include <linux/clk.h>

#define TWL6040_REG_ASICID		0x01
#define TWL6040_REG_ASICREV		0x02
#define TWL6040_REG_INTID		0x03
#define TWL6040_REG_INTMR		0x04
#define TWL6040_REG_NCPCTL		0x05
#define TWL6040_REG_LDOCTL		0x06
#define TWL6040_REG_HPPLLCTL		0x07
#define TWL6040_REG_LPPLLCTL		0x08
#define TWL6040_REG_LPPLLDIV		0x09
#define TWL6040_REG_AMICBCTL		0x0A
#define TWL6040_REG_DMICBCTL		0x0B
#define TWL6040_REG_MICLCTL		0x0C
#define TWL6040_REG_MICRCTL		0x0D
#define TWL6040_REG_MICGAIN		0x0E
#define TWL6040_REG_LINEGAIN		0x0F
#define TWL6040_REG_HSLCTL		0x10
#define TWL6040_REG_HSRCTL		0x11
#define TWL6040_REG_HSGAIN		0x12
#define TWL6040_REG_EARCTL		0x13
#define TWL6040_REG_HFLCTL		0x14
#define TWL6040_REG_HFLGAIN		0x15
#define TWL6040_REG_HFRCTL		0x16
#define TWL6040_REG_HFRGAIN		0x17
#define TWL6040_REG_VIBCTLL		0x18
#define TWL6040_REG_VIBDATL		0x19
#define TWL6040_REG_VIBCTLR		0x1A
#define TWL6040_REG_VIBDATR		0x1B
#define TWL6040_REG_HKCTL1		0x1C
#define TWL6040_REG_HKCTL2		0x1D
#define TWL6040_REG_GPOCTL		0x1E
#define TWL6040_REG_ALB			0x1F
#define TWL6040_REG_DLB			0x20
#define TWL6040_REG_TRIM1		0x28
#define TWL6040_REG_TRIM2		0x29
#define TWL6040_REG_TRIM3		0x2A
#define TWL6040_REG_HSOTRIM		0x2B
#define TWL6040_REG_HFOTRIM		0x2C
#define TWL6040_REG_ACCCTL		0x2D
#define TWL6040_REG_STATUS		0x2E

/* INTID (0x03) fields */

#define TWL6040_THINT			0x01
#define TWL6040_PLUGINT			0x02
#define TWL6040_UNPLUGINT		0x04
#define TWL6040_HOOKINT			0x08
#define TWL6040_HFINT			0x10
#define TWL6040_VIBINT			0x20
#define TWL6040_READYINT		0x40

/* INTMR (0x04) fields */

#define TWL6040_THMSK			0x01
#define TWL6040_PLUGMSK			0x02
#define TWL6040_HOOKMSK			0x08
#define TWL6040_HFMSK			0x10
#define TWL6040_VIBMSK			0x20
#define TWL6040_READYMSK		0x40
#define TWL6040_ALLINT_MSK		0x7B

/* NCPCTL (0x05) fields */

#define TWL6040_NCPENA			0x01
#define TWL6040_NCPOPEN			0x40

/* LDOCTL (0x06) fields */

#define TWL6040_LSLDOENA		0x01
#define TWL6040_HSLDOENA		0x04
#define TWL6040_REFENA			0x40
#define TWL6040_OSCENA			0x80

/* HPPLLCTL (0x07) fields */

#define TWL6040_HPLLENA			0x01
#define TWL6040_HPLLRST			0x02
#define TWL6040_HPLLBP			0x04
#define TWL6040_HPLLSQRENA		0x08
#define TWL6040_MCLK_12000KHZ		(0 << 5)
#define TWL6040_MCLK_19200KHZ		(1 << 5)
#define TWL6040_MCLK_26000KHZ		(2 << 5)
#define TWL6040_MCLK_38400KHZ		(3 << 5)
#define TWL6040_MCLK_MSK		0x60

/* LPPLLCTL (0x08) fields */

#define TWL6040_LPLLENA			0x01
#define TWL6040_LPLLRST			0x02
#define TWL6040_LPLLSEL			0x04
#define TWL6040_LPLLFIN			0x08
#define TWL6040_HPLLSEL			0x10

/* HSLCTL/R (0x10/0x11) fields */

#define TWL6040_HSDACENA		(1 << 0)
#define TWL6040_HSDACMODE		(1 << 1)
#define TWL6040_HSDRVENA		(1 << 2)
#define TWL6040_HSDRVMODE		(1 << 3)

/* HFLCTL/R (0x14/0x16) fields */

#define TWL6040_HFDACENA		(1 << 0)
#define TWL6040_HFPGAENA		(1 << 1)
#define TWL6040_HFDRVENA		(1 << 4)

/* VIBCTLL/R (0x18/0x1A) fields */

#define TWL6040_VIBENA			(1 << 0)
#define TWL6040_VIBSEL			(1 << 1)
#define TWL6040_VIBCTRL			(1 << 2)
#define TWL6040_VIBCTRL_P		(1 << 3)
#define TWL6040_VIBCTRL_N		(1 << 4)

/* VIBDATL/R (0x19/0x1B) fields */

#define TWL6040_VIBDAT_MAX		0x64

/* GPOCTL (0x1E) fields */

#define TWL6040_GPO1			0x01
#define TWL6040_GPO2			0x02
#define TWL6040_GPO3			0x04

/* ACCCTL (0x2D) fields */

#define TWL6040_I2CSEL			0x01
#define TWL6040_RESETSPLIT		0x04
#define TWL6040_INTCLRMODE		0x08
#define TWL6040_I2CMODE(x)		((x & 0x3) << 4)

/* STATUS (0x2E) fields */

#define TWL6040_PLUGCOMP		0x02
#define TWL6040_VIBLOCDET		0x10
#define TWL6040_VIBROCDET		0x20
#define TWL6040_TSHUTDET                0x40

#define TWL6040_CELLS			3

#define TWL6040_REV_ES1_0		0x00
#define TWL6040_REV_ES1_1		0x01 /* Rev ES1.1 and ES1.2 */
#define TWL6040_REV_ES1_3		0x02
#define TWL6041_REV_ES2_0		0x10

#define TWL6040_IRQ_TH			0
#define TWL6040_IRQ_PLUG		1
#define TWL6040_IRQ_HOOK		2
#define TWL6040_IRQ_HF			3
#define TWL6040_IRQ_VIB			4
#define TWL6040_IRQ_READY		5

/* PLL selection */
#define TWL6040_SYSCLK_SEL_LPPLL	0
#define TWL6040_SYSCLK_SEL_HPPLL	1

#define TWL6040_GPO_MAX	3

/* TODO: All platform data struct can be removed */
struct twl6040_codec_data {
	u16 hs_left_step;
	u16 hs_right_step;
	u16 hf_left_step;
	u16 hf_right_step;
};

struct twl6040_vibra_data {
	unsigned int vibldrv_res;	/* left driver resistance */
	unsigned int vibrdrv_res;	/* right driver resistance */
	unsigned int viblmotor_res;	/* left motor resistance */
	unsigned int vibrmotor_res;	/* right motor resistance */
	int vddvibl_uV;			/* VDDVIBL volt, set 0 for fixed reg */
	int vddvibr_uV;			/* VDDVIBR volt, set 0 for fixed reg */
};

struct twl6040_gpo_data {
	int gpio_base;
};

struct twl6040_platform_data {
	int audpwron_gpio;	/* audio power-on gpio */

	struct twl6040_codec_data *codec;
	struct twl6040_vibra_data *vibra;
	struct twl6040_gpo_data *gpo;
};

struct regmap;
struct regmap_irq_chips_data;

struct twl6040 {
	struct device *dev;
	struct regmap *regmap;
	struct regmap_irq_chip_data *irq_data;
	struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
	struct clk *clk32k;
	struct mutex mutex;
	struct mutex irq_mutex;
	struct mfd_cell cells[TWL6040_CELLS];
	struct completion ready;

	int audpwron;
	int power_count;
	int rev;

	/* PLL configuration */
	int pll;
	unsigned int sysclk;
	unsigned int mclk;

	unsigned int irq;
	unsigned int irq_ready;
	unsigned int irq_th;
};

int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg);
int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg,
		      u8 val);
int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg,
		     u8 mask);
int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg,
		       u8 mask);
int twl6040_power(struct twl6040 *twl6040, int on);
int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
		    unsigned int freq_in, unsigned int freq_out);
int twl6040_get_pll(struct twl6040 *twl6040);
unsigned int twl6040_get_sysclk(struct twl6040 *twl6040);

/* Get the combined status of the vibra control register */
int twl6040_get_vibralr_status(struct twl6040 *twl6040);

static inline int twl6040_get_revid(struct twl6040 *twl6040)
{
	return twl6040->rev;
}


#endif  /* End of __TWL6040_CODEC_H__ */
Commit	Line	Data
f19b2823 MLC	1	/*
	2	* MFD driver for twl6040
	3	*
	4	* Authors: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
	5	* Misael Lopez Cruz <misael.lopez@ti.com>
	6	*
	7	* Copyright: (C) 2011 Texas Instruments, Inc.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	21	* 02110-1301 USA
	22	*
	23	*/
	24
	25	#ifndef __TWL6040_CODEC_H__
	26	#define __TWL6040_CODEC_H__
	27
	28	#include <linux/interrupt.h>
	29	#include <linux/mfd/core.h>
5af7df6b	30	#include <linux/regulator/consumer.h>
68bab866	31	#include <linux/clk.h>
f19b2823 MLC	32
	33	#define TWL6040_REG_ASICID 0x01
	34	#define TWL6040_REG_ASICREV 0x02
	35	#define TWL6040_REG_INTID 0x03
	36	#define TWL6040_REG_INTMR 0x04
	37	#define TWL6040_REG_NCPCTL 0x05
	38	#define TWL6040_REG_LDOCTL 0x06
	39	#define TWL6040_REG_HPPLLCTL 0x07
	40	#define TWL6040_REG_LPPLLCTL 0x08
	41	#define TWL6040_REG_LPPLLDIV 0x09
	42	#define TWL6040_REG_AMICBCTL 0x0A
	43	#define TWL6040_REG_DMICBCTL 0x0B
	44	#define TWL6040_REG_MICLCTL 0x0C
	45	#define TWL6040_REG_MICRCTL 0x0D
	46	#define TWL6040_REG_MICGAIN 0x0E
	47	#define TWL6040_REG_LINEGAIN 0x0F
	48	#define TWL6040_REG_HSLCTL 0x10
	49	#define TWL6040_REG_HSRCTL 0x11
	50	#define TWL6040_REG_HSGAIN 0x12
	51	#define TWL6040_REG_EARCTL 0x13
	52	#define TWL6040_REG_HFLCTL 0x14
	53	#define TWL6040_REG_HFLGAIN 0x15
	54	#define TWL6040_REG_HFRCTL 0x16
	55	#define TWL6040_REG_HFRGAIN 0x17
	56	#define TWL6040_REG_VIBCTLL 0x18
	57	#define TWL6040_REG_VIBDATL 0x19
	58	#define TWL6040_REG_VIBCTLR 0x1A
	59	#define TWL6040_REG_VIBDATR 0x1B
	60	#define TWL6040_REG_HKCTL1 0x1C
	61	#define TWL6040_REG_HKCTL2 0x1D
	62	#define TWL6040_REG_GPOCTL 0x1E
	63	#define TWL6040_REG_ALB 0x1F
	64	#define TWL6040_REG_DLB 0x20
	65	#define TWL6040_REG_TRIM1 0x28
	66	#define TWL6040_REG_TRIM2 0x29
	67	#define TWL6040_REG_TRIM3 0x2A
	68	#define TWL6040_REG_HSOTRIM 0x2B
	69	#define TWL6040_REG_HFOTRIM 0x2C
	70	#define TWL6040_REG_ACCCTL 0x2D
	71	#define TWL6040_REG_STATUS 0x2E
	72
f19b2823 MLC	73	/* INTID (0x03) fields */
	74
	75	#define TWL6040_THINT 0x01
	76	#define TWL6040_PLUGINT 0x02
	77	#define TWL6040_UNPLUGINT 0x04
	78	#define TWL6040_HOOKINT 0x08
	79	#define TWL6040_HFINT 0x10
	80	#define TWL6040_VIBINT 0x20
	81	#define TWL6040_READYINT 0x40
	82
	83	/* INTMR (0x04) fields */
	84
	85	#define TWL6040_THMSK 0x01
	86	#define TWL6040_PLUGMSK 0x02
	87	#define TWL6040_HOOKMSK 0x08
	88	#define TWL6040_HFMSK 0x10
	89	#define TWL6040_VIBMSK 0x20
	90	#define TWL6040_READYMSK 0x40
	91	#define TWL6040_ALLINT_MSK 0x7B
	92
	93	/* NCPCTL (0x05) fields */
	94
	95	#define TWL6040_NCPENA 0x01
	96	#define TWL6040_NCPOPEN 0x40
	97
	98	/* LDOCTL (0x06) fields */
	99
	100	#define TWL6040_LSLDOENA 0x01
	101	#define TWL6040_HSLDOENA 0x04
	102	#define TWL6040_REFENA 0x40
	103	#define TWL6040_OSCENA 0x80
	104
	105	/* HPPLLCTL (0x07) fields */
	106
	107	#define TWL6040_HPLLENA 0x01
	108	#define TWL6040_HPLLRST 0x02
	109	#define TWL6040_HPLLBP 0x04
	110	#define TWL6040_HPLLSQRENA 0x08
	111	#define TWL6040_MCLK_12000KHZ (0 << 5)
	112	#define TWL6040_MCLK_19200KHZ (1 << 5)
	113	#define TWL6040_MCLK_26000KHZ (2 << 5)
	114	#define TWL6040_MCLK_38400KHZ (3 << 5)
	115	#define TWL6040_MCLK_MSK 0x60
	116
	117	/* LPPLLCTL (0x08) fields */
	118
	119	#define TWL6040_LPLLENA 0x01
	120	#define TWL6040_LPLLRST 0x02
	121	#define TWL6040_LPLLSEL 0x04
	122	#define TWL6040_LPLLFIN 0x08
	123	#define TWL6040_HPLLSEL 0x10
	124
ab6cf139	125	/* HSLCTL/R (0x10/0x11) fields */
f19b2823	126
33b6816c	127	#define TWL6040_HSDACENA (1 << 0)
ab6cf139	128	#define TWL6040_HSDACMODE (1 << 1)
fa223ec3	129	#define TWL6040_HSDRVENA (1 << 2)
ab6cf139	130	#define TWL6040_HSDRVMODE (1 << 3)
f19b2823	131
fa223ec3 PU	132	/* HFLCTL/R (0x14/0x16) fields */
	133
	134	#define TWL6040_HFDACENA (1 << 0)
	135	#define TWL6040_HFPGAENA (1 << 1)
	136	#define TWL6040_HFDRVENA (1 << 4)
	137
1e036f65	138	/* VIBCTLL/R (0x18/0x1A) fields */
f19b2823	139
1e036f65 PU	140	#define TWL6040_VIBENA (1 << 0)
	141	#define TWL6040_VIBSEL (1 << 1)
	142	#define TWL6040_VIBCTRL (1 << 2)
	143	#define TWL6040_VIBCTRL_P (1 << 3)
	144	#define TWL6040_VIBCTRL_N (1 << 4)
f19b2823	145
1e036f65	146	/* VIBDATL/R (0x19/0x1B) fields */
f19b2823 MLC	147
	148	#define TWL6040_VIBDAT_MAX 0x64
	149
f19b2823 MLC	150	/* GPOCTL (0x1E) fields */
	151
	152	#define TWL6040_GPO1 0x01
	153	#define TWL6040_GPO2 0x02
35736dce	154	#define TWL6040_GPO3 0x04
f19b2823 MLC	155
	156	/* ACCCTL (0x2D) fields */
	157
	158	#define TWL6040_I2CSEL 0x01
	159	#define TWL6040_RESETSPLIT 0x04
	160	#define TWL6040_INTCLRMODE 0x08
11e38e11	161	#define TWL6040_I2CMODE(x) ((x & 0x3) << 4)
f19b2823	162
f19b2823 MLC	163	/* STATUS (0x2E) fields */
	164
	165	#define TWL6040_PLUGCOMP 0x02
	166	#define TWL6040_VIBLOCDET 0x10
	167	#define TWL6040_VIBROCDET 0x20
	168	#define TWL6040_TSHUTDET 0x40
	169
5cbe786a	170	#define TWL6040_CELLS 3
f19b2823 MLC	171
f19b2823 MLC	172	#define TWL6040_REV_ES1_0 0x00
be4ac00a PU	173	#define TWL6040_REV_ES1_1 0x01 /* Rev ES1.1 and ES1.2 */
be4ac00a PU	174	#define TWL6040_REV_ES1_3 0x02
1fc74aef	175	#define TWL6041_REV_ES2_0 0x10
f19b2823 MLC	176
	177	#define TWL6040_IRQ_TH 0
	178	#define TWL6040_IRQ_PLUG 1
	179	#define TWL6040_IRQ_HOOK 2
	180	#define TWL6040_IRQ_HF 3
	181	#define TWL6040_IRQ_VIB 4
	182	#define TWL6040_IRQ_READY 5
	183
cfb7a33b PU	184	/* PLL selection */
	185	#define TWL6040_SYSCLK_SEL_LPPLL 0
	186	#define TWL6040_SYSCLK_SEL_HPPLL 1
f19b2823	187
5cbe786a PU	188	#define TWL6040_GPO_MAX 3
5cbe786a PU	189
df04b624	190	/* TODO: All platform data struct can be removed */
8eaeb939 PU	191	struct twl6040_codec_data {
	192	u16 hs_left_step;
	193	u16 hs_right_step;
	194	u16 hf_left_step;
	195	u16 hf_right_step;
	196	};
	197
	198	struct twl6040_vibra_data {
	199	unsigned int vibldrv_res; /* left driver resistance */
	200	unsigned int vibrdrv_res; /* right driver resistance */
	201	unsigned int viblmotor_res; /* left motor resistance */
	202	unsigned int vibrmotor_res; /* right motor resistance */
	203	int vddvibl_uV; /* VDDVIBL volt, set 0 for fixed reg */
	204	int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */
	205	};
	206
5cbe786a PU	207	struct twl6040_gpo_data {
	208	int gpio_base;
	209	};
	210
8eaeb939 PU	211	struct twl6040_platform_data {
8eaeb939 PU	212	int audpwron_gpio; /* audio power-on gpio */
8eaeb939 PU	213
	214	struct twl6040_codec_data *codec;
	215	struct twl6040_vibra_data *vibra;
5cbe786a	216	struct twl6040_gpo_data *gpo;
8eaeb939 PU	217	};
	218
	219	struct regmap;
ab7edb14	220	struct regmap_irq_chips_data;
8eaeb939	221
f19b2823 MLC	222	struct twl6040 {
f19b2823 MLC	223	struct device *dev;
8eaeb939	224	struct regmap *regmap;
ab7edb14	225	struct regmap_irq_chip_data *irq_data;
5af7df6b	226	struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
68bab866	227	struct clk *clk32k;
f19b2823	228	struct mutex mutex;
f19b2823 MLC	229	struct mutex irq_mutex;
	230	struct mfd_cell cells[TWL6040_CELLS];
	231	struct completion ready;
	232
	233	int audpwron;
	234	int power_count;
	235	int rev;
	236
f8447d6c	237	/* PLL configuration */
cfb7a33b	238	int pll;
f19b2823	239	unsigned int sysclk;
f8447d6c	240	unsigned int mclk;
f19b2823 MLC	241
f19b2823 MLC	242	unsigned int irq;
ab7edb14 PU	243	unsigned int irq_ready;
ab7edb14 PU	244	unsigned int irq_th;
f19b2823 MLC	245	};
f19b2823 MLC	246
f19b2823 MLC	247	int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg);
	248	int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg,
	249	u8 val);
	250	int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg,
	251	u8 mask);
	252	int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg,
	253	u8 mask);
	254	int twl6040_power(struct twl6040 *twl6040, int on);
cfb7a33b	255	int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
f19b2823	256	unsigned int freq_in, unsigned int freq_out);
cfb7a33b	257	int twl6040_get_pll(struct twl6040 *twl6040);
f19b2823	258	unsigned int twl6040_get_sysclk(struct twl6040 *twl6040);
ab7edb14	259
70601ec1 PU	260	/* Get the combined status of the vibra control register */
70601ec1 PU	261	int twl6040_get_vibralr_status(struct twl6040 *twl6040);
f19b2823	262
a69882ae PU	263	static inline int twl6040_get_revid(struct twl6040 *twl6040)
	264	{
	265	return twl6040->rev;
	266	}
	267
70601ec1	268
f19b2823	269	#endif /* End of __TWL6040_CODEC_H__ */