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89b4012b MB |
1 | /* |
2 | * core.h -- Core Driver for Wolfson WM8350 PMIC | |
3 | * | |
4 | * Copyright 2007 Wolfson Microelectronics PLC | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | * | |
11 | */ | |
12 | ||
13 | #ifndef __LINUX_MFD_WM8350_CORE_H_ | |
14 | #define __LINUX_MFD_WM8350_CORE_H_ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/mutex.h> | |
18 | #include <linux/workqueue.h> | |
19 | ||
add41cb4 MB |
20 | #include <linux/mfd/wm8350/audio.h> |
21 | #include <linux/mfd/wm8350/gpio.h> | |
da09155a | 22 | #include <linux/mfd/wm8350/pmic.h> |
add41cb4 MB |
23 | #include <linux/mfd/wm8350/rtc.h> |
24 | #include <linux/mfd/wm8350/supply.h> | |
25 | #include <linux/mfd/wm8350/wdt.h> | |
da09155a | 26 | |
89b4012b MB |
27 | /* |
28 | * Register values. | |
29 | */ | |
30 | #define WM8350_RESET_ID 0x00 | |
31 | #define WM8350_ID 0x01 | |
b797a555 | 32 | #define WM8350_REVISION 0x02 |
89b4012b MB |
33 | #define WM8350_SYSTEM_CONTROL_1 0x03 |
34 | #define WM8350_SYSTEM_CONTROL_2 0x04 | |
35 | #define WM8350_SYSTEM_HIBERNATE 0x05 | |
36 | #define WM8350_INTERFACE_CONTROL 0x06 | |
37 | #define WM8350_POWER_MGMT_1 0x08 | |
38 | #define WM8350_POWER_MGMT_2 0x09 | |
39 | #define WM8350_POWER_MGMT_3 0x0A | |
40 | #define WM8350_POWER_MGMT_4 0x0B | |
41 | #define WM8350_POWER_MGMT_5 0x0C | |
42 | #define WM8350_POWER_MGMT_6 0x0D | |
43 | #define WM8350_POWER_MGMT_7 0x0E | |
44 | ||
45 | #define WM8350_SYSTEM_INTERRUPTS 0x18 | |
46 | #define WM8350_INT_STATUS_1 0x19 | |
47 | #define WM8350_INT_STATUS_2 0x1A | |
48 | #define WM8350_POWER_UP_INT_STATUS 0x1B | |
49 | #define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C | |
50 | #define WM8350_OVER_CURRENT_INT_STATUS 0x1D | |
51 | #define WM8350_GPIO_INT_STATUS 0x1E | |
52 | #define WM8350_COMPARATOR_INT_STATUS 0x1F | |
53 | #define WM8350_SYSTEM_INTERRUPTS_MASK 0x20 | |
54 | #define WM8350_INT_STATUS_1_MASK 0x21 | |
55 | #define WM8350_INT_STATUS_2_MASK 0x22 | |
56 | #define WM8350_POWER_UP_INT_STATUS_MASK 0x23 | |
57 | #define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24 | |
58 | #define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25 | |
59 | #define WM8350_GPIO_INT_STATUS_MASK 0x26 | |
60 | #define WM8350_COMPARATOR_INT_STATUS_MASK 0x27 | |
4008e879 | 61 | #define WM8350_CHARGER_OVERRIDES 0xE2 |
14431aa0 MB |
62 | #define WM8350_MISC_OVERRIDES 0xE3 |
63 | #define WM8350_COMPARATOR_OVERRIDES 0xE7 | |
64 | #define WM8350_STATE_MACHINE_STATUS 0xE9 | |
89b4012b MB |
65 | |
66 | #define WM8350_MAX_REGISTER 0xFF | |
67 | ||
68 | /* | |
69 | * Field Definitions. | |
70 | */ | |
71 | ||
72 | /* | |
73 | * R0 (0x00) - Reset/ID | |
74 | */ | |
75 | #define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF | |
76 | ||
77 | /* | |
78 | * R1 (0x01) - ID | |
79 | */ | |
80 | #define WM8350_CHIP_REV_MASK 0x7000 | |
81 | #define WM8350_CONF_STS_MASK 0x0C00 | |
82 | #define WM8350_CUST_ID_MASK 0x00FF | |
83 | ||
b797a555 MB |
84 | /* |
85 | * R2 (0x02) - Revision | |
86 | */ | |
87 | #define WM8350_MASK_REV_MASK 0x00FF | |
88 | ||
89b4012b MB |
89 | /* |
90 | * R3 (0x03) - System Control 1 | |
91 | */ | |
92 | #define WM8350_CHIP_ON 0x8000 | |
93 | #define WM8350_POWERCYCLE 0x2000 | |
94 | #define WM8350_VCC_FAULT_OV 0x1000 | |
95 | #define WM8350_REG_RSTB_TIME_MASK 0x0C00 | |
96 | #define WM8350_BG_SLEEP 0x0200 | |
97 | #define WM8350_MEM_VALID 0x0020 | |
98 | #define WM8350_CHIP_SET_UP 0x0010 | |
99 | #define WM8350_ON_DEB_T 0x0008 | |
100 | #define WM8350_ON_POL 0x0002 | |
101 | #define WM8350_IRQ_POL 0x0001 | |
102 | ||
103 | /* | |
104 | * R4 (0x04) - System Control 2 | |
105 | */ | |
106 | #define WM8350_USB_SUSPEND_8MA 0x8000 | |
107 | #define WM8350_USB_SUSPEND 0x4000 | |
108 | #define WM8350_USB_MSTR 0x2000 | |
109 | #define WM8350_USB_MSTR_SRC 0x1000 | |
110 | #define WM8350_USB_500MA 0x0800 | |
111 | #define WM8350_USB_NOLIM 0x0400 | |
112 | ||
113 | /* | |
114 | * R5 (0x05) - System Hibernate | |
115 | */ | |
116 | #define WM8350_HIBERNATE 0x8000 | |
117 | #define WM8350_WDOG_HIB_MODE 0x0080 | |
118 | #define WM8350_REG_HIB_STARTUP_SEQ 0x0040 | |
119 | #define WM8350_REG_RESET_HIB_MODE 0x0020 | |
120 | #define WM8350_RST_HIB_MODE 0x0010 | |
121 | #define WM8350_IRQ_HIB_MODE 0x0008 | |
122 | #define WM8350_MEMRST_HIB_MODE 0x0004 | |
123 | #define WM8350_PCCOMP_HIB_MODE 0x0002 | |
124 | #define WM8350_TEMPMON_HIB_MODE 0x0001 | |
125 | ||
126 | /* | |
127 | * R6 (0x06) - Interface Control | |
128 | */ | |
129 | #define WM8350_USE_DEV_PINS 0x8000 | |
130 | #define WM8350_USE_DEV_PINS_MASK 0x8000 | |
131 | #define WM8350_USE_DEV_PINS_SHIFT 15 | |
132 | #define WM8350_DEV_ADDR_MASK 0x6000 | |
133 | #define WM8350_DEV_ADDR_SHIFT 13 | |
134 | #define WM8350_CONFIG_DONE 0x1000 | |
135 | #define WM8350_CONFIG_DONE_MASK 0x1000 | |
136 | #define WM8350_CONFIG_DONE_SHIFT 12 | |
137 | #define WM8350_RECONFIG_AT_ON 0x0800 | |
138 | #define WM8350_RECONFIG_AT_ON_MASK 0x0800 | |
139 | #define WM8350_RECONFIG_AT_ON_SHIFT 11 | |
140 | #define WM8350_AUTOINC 0x0200 | |
141 | #define WM8350_AUTOINC_MASK 0x0200 | |
142 | #define WM8350_AUTOINC_SHIFT 9 | |
143 | #define WM8350_ARA 0x0100 | |
144 | #define WM8350_ARA_MASK 0x0100 | |
145 | #define WM8350_ARA_SHIFT 8 | |
146 | #define WM8350_SPI_CFG 0x0008 | |
147 | #define WM8350_SPI_CFG_MASK 0x0008 | |
148 | #define WM8350_SPI_CFG_SHIFT 3 | |
149 | #define WM8350_SPI_4WIRE 0x0004 | |
150 | #define WM8350_SPI_4WIRE_MASK 0x0004 | |
151 | #define WM8350_SPI_4WIRE_SHIFT 2 | |
152 | #define WM8350_SPI_3WIRE 0x0002 | |
153 | #define WM8350_SPI_3WIRE_MASK 0x0002 | |
154 | #define WM8350_SPI_3WIRE_SHIFT 1 | |
155 | ||
156 | /* Bit values for R06 (0x06) */ | |
157 | #define WM8350_USE_DEV_PINS_PRIMARY 0 | |
158 | #define WM8350_USE_DEV_PINS_DEV 1 | |
159 | ||
160 | #define WM8350_DEV_ADDR_34 0 | |
161 | #define WM8350_DEV_ADDR_36 1 | |
162 | #define WM8350_DEV_ADDR_3C 2 | |
163 | #define WM8350_DEV_ADDR_3E 3 | |
164 | ||
165 | #define WM8350_CONFIG_DONE_OFF 0 | |
166 | #define WM8350_CONFIG_DONE_DONE 1 | |
167 | ||
168 | #define WM8350_RECONFIG_AT_ON_OFF 0 | |
169 | #define WM8350_RECONFIG_AT_ON_ON 1 | |
170 | ||
171 | #define WM8350_AUTOINC_OFF 0 | |
172 | #define WM8350_AUTOINC_ON 1 | |
173 | ||
174 | #define WM8350_ARA_OFF 0 | |
175 | #define WM8350_ARA_ON 1 | |
176 | ||
177 | #define WM8350_SPI_CFG_CMOS 0 | |
178 | #define WM8350_SPI_CFG_OD 1 | |
179 | ||
180 | #define WM8350_SPI_4WIRE_3WIRE 0 | |
181 | #define WM8350_SPI_4WIRE_4WIRE 1 | |
182 | ||
183 | #define WM8350_SPI_3WIRE_I2C 0 | |
184 | #define WM8350_SPI_3WIRE_SPI 1 | |
185 | ||
186 | /* | |
187 | * R8 (0x08) - Power mgmt (1) | |
188 | */ | |
189 | #define WM8350_CODEC_ISEL_MASK 0xC000 | |
190 | #define WM8350_VBUFEN 0x2000 | |
191 | #define WM8350_OUTPUT_DRAIN_EN 0x0400 | |
192 | #define WM8350_MIC_DET_ENA 0x0100 | |
193 | #define WM8350_BIASEN 0x0020 | |
194 | #define WM8350_MICBEN 0x0010 | |
195 | #define WM8350_VMIDEN 0x0004 | |
196 | #define WM8350_VMID_MASK 0x0003 | |
197 | #define WM8350_VMID_SHIFT 0 | |
198 | ||
199 | /* | |
200 | * R9 (0x09) - Power mgmt (2) | |
201 | */ | |
202 | #define WM8350_IN3R_ENA 0x0800 | |
203 | #define WM8350_IN3L_ENA 0x0400 | |
204 | #define WM8350_INR_ENA 0x0200 | |
205 | #define WM8350_INL_ENA 0x0100 | |
206 | #define WM8350_MIXINR_ENA 0x0080 | |
207 | #define WM8350_MIXINL_ENA 0x0040 | |
208 | #define WM8350_OUT4_ENA 0x0020 | |
209 | #define WM8350_OUT3_ENA 0x0010 | |
210 | #define WM8350_MIXOUTR_ENA 0x0002 | |
211 | #define WM8350_MIXOUTL_ENA 0x0001 | |
212 | ||
213 | /* | |
214 | * R10 (0x0A) - Power mgmt (3) | |
215 | */ | |
216 | #define WM8350_IN3R_TO_OUT2R 0x0080 | |
217 | #define WM8350_OUT2R_ENA 0x0008 | |
218 | #define WM8350_OUT2L_ENA 0x0004 | |
219 | #define WM8350_OUT1R_ENA 0x0002 | |
220 | #define WM8350_OUT1L_ENA 0x0001 | |
221 | ||
222 | /* | |
223 | * R11 (0x0B) - Power mgmt (4) | |
224 | */ | |
225 | #define WM8350_SYSCLK_ENA 0x4000 | |
226 | #define WM8350_ADC_HPF_ENA 0x2000 | |
227 | #define WM8350_FLL_ENA 0x0800 | |
228 | #define WM8350_FLL_OSC_ENA 0x0400 | |
229 | #define WM8350_TOCLK_ENA 0x0100 | |
230 | #define WM8350_DACR_ENA 0x0020 | |
231 | #define WM8350_DACL_ENA 0x0010 | |
232 | #define WM8350_ADCR_ENA 0x0008 | |
233 | #define WM8350_ADCL_ENA 0x0004 | |
234 | ||
235 | /* | |
236 | * R12 (0x0C) - Power mgmt (5) | |
237 | */ | |
238 | #define WM8350_CODEC_ENA 0x1000 | |
239 | #define WM8350_RTC_TICK_ENA 0x0800 | |
240 | #define WM8350_OSC32K_ENA 0x0400 | |
241 | #define WM8350_CHG_ENA 0x0200 | |
242 | #define WM8350_ACC_DET_ENA 0x0100 | |
243 | #define WM8350_AUXADC_ENA 0x0080 | |
244 | #define WM8350_DCMP4_ENA 0x0008 | |
245 | #define WM8350_DCMP3_ENA 0x0004 | |
246 | #define WM8350_DCMP2_ENA 0x0002 | |
247 | #define WM8350_DCMP1_ENA 0x0001 | |
248 | ||
249 | /* | |
250 | * R13 (0x0D) - Power mgmt (6) | |
251 | */ | |
252 | #define WM8350_LS_ENA 0x8000 | |
253 | #define WM8350_LDO4_ENA 0x0800 | |
254 | #define WM8350_LDO3_ENA 0x0400 | |
255 | #define WM8350_LDO2_ENA 0x0200 | |
256 | #define WM8350_LDO1_ENA 0x0100 | |
257 | #define WM8350_DC6_ENA 0x0020 | |
258 | #define WM8350_DC5_ENA 0x0010 | |
259 | #define WM8350_DC4_ENA 0x0008 | |
260 | #define WM8350_DC3_ENA 0x0004 | |
261 | #define WM8350_DC2_ENA 0x0002 | |
262 | #define WM8350_DC1_ENA 0x0001 | |
263 | ||
264 | /* | |
265 | * R14 (0x0E) - Power mgmt (7) | |
266 | */ | |
267 | #define WM8350_CS2_ENA 0x0002 | |
268 | #define WM8350_CS1_ENA 0x0001 | |
269 | ||
270 | /* | |
271 | * R24 (0x18) - System Interrupts | |
272 | */ | |
273 | #define WM8350_OC_INT 0x2000 | |
274 | #define WM8350_UV_INT 0x1000 | |
275 | #define WM8350_PUTO_INT 0x0800 | |
276 | #define WM8350_CS_INT 0x0200 | |
277 | #define WM8350_EXT_INT 0x0100 | |
278 | #define WM8350_CODEC_INT 0x0080 | |
279 | #define WM8350_GP_INT 0x0040 | |
280 | #define WM8350_AUXADC_INT 0x0020 | |
281 | #define WM8350_RTC_INT 0x0010 | |
282 | #define WM8350_SYS_INT 0x0008 | |
283 | #define WM8350_CHG_INT 0x0004 | |
284 | #define WM8350_USB_INT 0x0002 | |
285 | #define WM8350_WKUP_INT 0x0001 | |
286 | ||
287 | /* | |
288 | * R25 (0x19) - Interrupt Status 1 | |
289 | */ | |
290 | #define WM8350_CHG_BAT_HOT_EINT 0x8000 | |
291 | #define WM8350_CHG_BAT_COLD_EINT 0x4000 | |
292 | #define WM8350_CHG_BAT_FAIL_EINT 0x2000 | |
293 | #define WM8350_CHG_TO_EINT 0x1000 | |
294 | #define WM8350_CHG_END_EINT 0x0800 | |
295 | #define WM8350_CHG_START_EINT 0x0400 | |
296 | #define WM8350_CHG_FAST_RDY_EINT 0x0200 | |
297 | #define WM8350_RTC_PER_EINT 0x0080 | |
298 | #define WM8350_RTC_SEC_EINT 0x0040 | |
299 | #define WM8350_RTC_ALM_EINT 0x0020 | |
300 | #define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004 | |
301 | #define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002 | |
302 | #define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001 | |
303 | ||
304 | /* | |
305 | * R26 (0x1A) - Interrupt Status 2 | |
306 | */ | |
307 | #define WM8350_CS1_EINT 0x2000 | |
308 | #define WM8350_CS2_EINT 0x1000 | |
309 | #define WM8350_USB_LIMIT_EINT 0x0400 | |
310 | #define WM8350_AUXADC_DATARDY_EINT 0x0100 | |
311 | #define WM8350_AUXADC_DCOMP4_EINT 0x0080 | |
312 | #define WM8350_AUXADC_DCOMP3_EINT 0x0040 | |
313 | #define WM8350_AUXADC_DCOMP2_EINT 0x0020 | |
314 | #define WM8350_AUXADC_DCOMP1_EINT 0x0010 | |
315 | #define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008 | |
316 | #define WM8350_SYS_CHIP_GT115_EINT 0x0004 | |
317 | #define WM8350_SYS_CHIP_GT140_EINT 0x0002 | |
318 | #define WM8350_SYS_WDOG_TO_EINT 0x0001 | |
319 | ||
320 | /* | |
321 | * R27 (0x1B) - Power Up Interrupt Status | |
322 | */ | |
323 | #define WM8350_PUTO_LDO4_EINT 0x0800 | |
324 | #define WM8350_PUTO_LDO3_EINT 0x0400 | |
325 | #define WM8350_PUTO_LDO2_EINT 0x0200 | |
326 | #define WM8350_PUTO_LDO1_EINT 0x0100 | |
327 | #define WM8350_PUTO_DC6_EINT 0x0020 | |
328 | #define WM8350_PUTO_DC5_EINT 0x0010 | |
329 | #define WM8350_PUTO_DC4_EINT 0x0008 | |
330 | #define WM8350_PUTO_DC3_EINT 0x0004 | |
331 | #define WM8350_PUTO_DC2_EINT 0x0002 | |
332 | #define WM8350_PUTO_DC1_EINT 0x0001 | |
333 | ||
334 | /* | |
335 | * R28 (0x1C) - Under Voltage Interrupt status | |
336 | */ | |
337 | #define WM8350_UV_LDO4_EINT 0x0800 | |
338 | #define WM8350_UV_LDO3_EINT 0x0400 | |
339 | #define WM8350_UV_LDO2_EINT 0x0200 | |
340 | #define WM8350_UV_LDO1_EINT 0x0100 | |
341 | #define WM8350_UV_DC6_EINT 0x0020 | |
342 | #define WM8350_UV_DC5_EINT 0x0010 | |
343 | #define WM8350_UV_DC4_EINT 0x0008 | |
344 | #define WM8350_UV_DC3_EINT 0x0004 | |
345 | #define WM8350_UV_DC2_EINT 0x0002 | |
346 | #define WM8350_UV_DC1_EINT 0x0001 | |
347 | ||
348 | /* | |
349 | * R29 (0x1D) - Over Current Interrupt status | |
350 | */ | |
351 | #define WM8350_OC_LS_EINT 0x8000 | |
352 | ||
353 | /* | |
354 | * R30 (0x1E) - GPIO Interrupt Status | |
355 | */ | |
356 | #define WM8350_GP12_EINT 0x1000 | |
357 | #define WM8350_GP11_EINT 0x0800 | |
358 | #define WM8350_GP10_EINT 0x0400 | |
359 | #define WM8350_GP9_EINT 0x0200 | |
360 | #define WM8350_GP8_EINT 0x0100 | |
361 | #define WM8350_GP7_EINT 0x0080 | |
362 | #define WM8350_GP6_EINT 0x0040 | |
363 | #define WM8350_GP5_EINT 0x0020 | |
364 | #define WM8350_GP4_EINT 0x0010 | |
365 | #define WM8350_GP3_EINT 0x0008 | |
366 | #define WM8350_GP2_EINT 0x0004 | |
367 | #define WM8350_GP1_EINT 0x0002 | |
368 | #define WM8350_GP0_EINT 0x0001 | |
369 | ||
370 | /* | |
371 | * R31 (0x1F) - Comparator Interrupt Status | |
372 | */ | |
373 | #define WM8350_EXT_USB_FB_EINT 0x8000 | |
374 | #define WM8350_EXT_WALL_FB_EINT 0x4000 | |
375 | #define WM8350_EXT_BAT_FB_EINT 0x2000 | |
376 | #define WM8350_CODEC_JCK_DET_L_EINT 0x0800 | |
377 | #define WM8350_CODEC_JCK_DET_R_EINT 0x0400 | |
378 | #define WM8350_CODEC_MICSCD_EINT 0x0200 | |
379 | #define WM8350_CODEC_MICD_EINT 0x0100 | |
380 | #define WM8350_WKUP_OFF_STATE_EINT 0x0040 | |
381 | #define WM8350_WKUP_HIB_STATE_EINT 0x0020 | |
382 | #define WM8350_WKUP_CONV_FAULT_EINT 0x0010 | |
383 | #define WM8350_WKUP_WDOG_RST_EINT 0x0008 | |
384 | #define WM8350_WKUP_GP_PWR_ON_EINT 0x0004 | |
385 | #define WM8350_WKUP_ONKEY_EINT 0x0002 | |
386 | #define WM8350_WKUP_GP_WAKEUP_EINT 0x0001 | |
387 | ||
388 | /* | |
389 | * R32 (0x20) - System Interrupts Mask | |
390 | */ | |
391 | #define WM8350_IM_OC_INT 0x2000 | |
392 | #define WM8350_IM_UV_INT 0x1000 | |
393 | #define WM8350_IM_PUTO_INT 0x0800 | |
394 | #define WM8350_IM_SPARE_INT 0x0400 | |
395 | #define WM8350_IM_CS_INT 0x0200 | |
396 | #define WM8350_IM_EXT_INT 0x0100 | |
397 | #define WM8350_IM_CODEC_INT 0x0080 | |
398 | #define WM8350_IM_GP_INT 0x0040 | |
399 | #define WM8350_IM_AUXADC_INT 0x0020 | |
400 | #define WM8350_IM_RTC_INT 0x0010 | |
401 | #define WM8350_IM_SYS_INT 0x0008 | |
402 | #define WM8350_IM_CHG_INT 0x0004 | |
403 | #define WM8350_IM_USB_INT 0x0002 | |
404 | #define WM8350_IM_WKUP_INT 0x0001 | |
405 | ||
406 | /* | |
407 | * R33 (0x21) - Interrupt Status 1 Mask | |
408 | */ | |
409 | #define WM8350_IM_CHG_BAT_HOT_EINT 0x8000 | |
410 | #define WM8350_IM_CHG_BAT_COLD_EINT 0x4000 | |
411 | #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000 | |
412 | #define WM8350_IM_CHG_TO_EINT 0x1000 | |
413 | #define WM8350_IM_CHG_END_EINT 0x0800 | |
414 | #define WM8350_IM_CHG_START_EINT 0x0400 | |
415 | #define WM8350_IM_CHG_FAST_RDY_EINT 0x0200 | |
416 | #define WM8350_IM_RTC_PER_EINT 0x0080 | |
417 | #define WM8350_IM_RTC_SEC_EINT 0x0040 | |
418 | #define WM8350_IM_RTC_ALM_EINT 0x0020 | |
419 | #define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004 | |
420 | #define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002 | |
421 | #define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001 | |
422 | ||
423 | /* | |
424 | * R34 (0x22) - Interrupt Status 2 Mask | |
425 | */ | |
426 | #define WM8350_IM_SPARE2_EINT 0x8000 | |
427 | #define WM8350_IM_SPARE1_EINT 0x4000 | |
428 | #define WM8350_IM_CS1_EINT 0x2000 | |
429 | #define WM8350_IM_CS2_EINT 0x1000 | |
430 | #define WM8350_IM_USB_LIMIT_EINT 0x0400 | |
431 | #define WM8350_IM_AUXADC_DATARDY_EINT 0x0100 | |
432 | #define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080 | |
433 | #define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040 | |
434 | #define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020 | |
435 | #define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010 | |
436 | #define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008 | |
437 | #define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004 | |
438 | #define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002 | |
439 | #define WM8350_IM_SYS_WDOG_TO_EINT 0x0001 | |
440 | ||
441 | /* | |
442 | * R35 (0x23) - Power Up Interrupt Status Mask | |
443 | */ | |
444 | #define WM8350_IM_PUTO_LDO4_EINT 0x0800 | |
445 | #define WM8350_IM_PUTO_LDO3_EINT 0x0400 | |
446 | #define WM8350_IM_PUTO_LDO2_EINT 0x0200 | |
447 | #define WM8350_IM_PUTO_LDO1_EINT 0x0100 | |
448 | #define WM8350_IM_PUTO_DC6_EINT 0x0020 | |
449 | #define WM8350_IM_PUTO_DC5_EINT 0x0010 | |
450 | #define WM8350_IM_PUTO_DC4_EINT 0x0008 | |
451 | #define WM8350_IM_PUTO_DC3_EINT 0x0004 | |
452 | #define WM8350_IM_PUTO_DC2_EINT 0x0002 | |
453 | #define WM8350_IM_PUTO_DC1_EINT 0x0001 | |
454 | ||
455 | /* | |
456 | * R36 (0x24) - Under Voltage Interrupt status Mask | |
457 | */ | |
458 | #define WM8350_IM_UV_LDO4_EINT 0x0800 | |
459 | #define WM8350_IM_UV_LDO3_EINT 0x0400 | |
460 | #define WM8350_IM_UV_LDO2_EINT 0x0200 | |
461 | #define WM8350_IM_UV_LDO1_EINT 0x0100 | |
462 | #define WM8350_IM_UV_DC6_EINT 0x0020 | |
463 | #define WM8350_IM_UV_DC5_EINT 0x0010 | |
464 | #define WM8350_IM_UV_DC4_EINT 0x0008 | |
465 | #define WM8350_IM_UV_DC3_EINT 0x0004 | |
466 | #define WM8350_IM_UV_DC2_EINT 0x0002 | |
467 | #define WM8350_IM_UV_DC1_EINT 0x0001 | |
468 | ||
469 | /* | |
470 | * R37 (0x25) - Over Current Interrupt status Mask | |
471 | */ | |
472 | #define WM8350_IM_OC_LS_EINT 0x8000 | |
473 | ||
474 | /* | |
475 | * R38 (0x26) - GPIO Interrupt Status Mask | |
476 | */ | |
477 | #define WM8350_IM_GP12_EINT 0x1000 | |
478 | #define WM8350_IM_GP11_EINT 0x0800 | |
479 | #define WM8350_IM_GP10_EINT 0x0400 | |
480 | #define WM8350_IM_GP9_EINT 0x0200 | |
481 | #define WM8350_IM_GP8_EINT 0x0100 | |
482 | #define WM8350_IM_GP7_EINT 0x0080 | |
483 | #define WM8350_IM_GP6_EINT 0x0040 | |
484 | #define WM8350_IM_GP5_EINT 0x0020 | |
485 | #define WM8350_IM_GP4_EINT 0x0010 | |
486 | #define WM8350_IM_GP3_EINT 0x0008 | |
487 | #define WM8350_IM_GP2_EINT 0x0004 | |
488 | #define WM8350_IM_GP1_EINT 0x0002 | |
489 | #define WM8350_IM_GP0_EINT 0x0001 | |
490 | ||
491 | /* | |
492 | * R39 (0x27) - Comparator Interrupt Status Mask | |
493 | */ | |
494 | #define WM8350_IM_EXT_USB_FB_EINT 0x8000 | |
495 | #define WM8350_IM_EXT_WALL_FB_EINT 0x4000 | |
496 | #define WM8350_IM_EXT_BAT_FB_EINT 0x2000 | |
497 | #define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800 | |
498 | #define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400 | |
499 | #define WM8350_IM_CODEC_MICSCD_EINT 0x0200 | |
500 | #define WM8350_IM_CODEC_MICD_EINT 0x0100 | |
501 | #define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040 | |
502 | #define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020 | |
503 | #define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010 | |
504 | #define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008 | |
505 | #define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004 | |
506 | #define WM8350_IM_WKUP_ONKEY_EINT 0x0002 | |
507 | #define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001 | |
508 | ||
509 | /* | |
510 | * R220 (0xDC) - RAM BIST 1 | |
511 | */ | |
512 | #define WM8350_READ_STATUS 0x0800 | |
513 | #define WM8350_TSTRAM_CLK 0x0100 | |
514 | #define WM8350_TSTRAM_CLK_ENA 0x0080 | |
515 | #define WM8350_STARTSEQ 0x0040 | |
516 | #define WM8350_READ_SRC 0x0020 | |
517 | #define WM8350_COUNT_DIR 0x0010 | |
518 | #define WM8350_TSTRAM_MODE_MASK 0x000E | |
519 | #define WM8350_TSTRAM_ENA 0x0001 | |
520 | ||
521 | /* | |
522 | * R225 (0xE1) - DCDC/LDO status | |
523 | */ | |
524 | #define WM8350_LS_STS 0x8000 | |
525 | #define WM8350_LDO4_STS 0x0800 | |
526 | #define WM8350_LDO3_STS 0x0400 | |
527 | #define WM8350_LDO2_STS 0x0200 | |
528 | #define WM8350_LDO1_STS 0x0100 | |
529 | #define WM8350_DC6_STS 0x0020 | |
530 | #define WM8350_DC5_STS 0x0010 | |
531 | #define WM8350_DC4_STS 0x0008 | |
532 | #define WM8350_DC3_STS 0x0004 | |
533 | #define WM8350_DC2_STS 0x0002 | |
534 | #define WM8350_DC1_STS 0x0001 | |
535 | ||
4008e879 MB |
536 | /* |
537 | * R226 (0xE2) - Charger status | |
538 | */ | |
539 | #define WM8350_CHG_BATT_HOT_OVRDE 0x8000 | |
540 | #define WM8350_CHG_BATT_COLD_OVRDE 0x4000 | |
541 | ||
14431aa0 MB |
542 | /* |
543 | * R227 (0xE3) - Misc Overrides | |
544 | */ | |
545 | #define WM8350_USB_LIMIT_OVRDE 0x0400 | |
546 | ||
547 | /* | |
548 | * R227 (0xE7) - Comparator Overrides | |
549 | */ | |
550 | #define WM8350_USB_FB_OVRDE 0x8000 | |
551 | #define WM8350_WALL_FB_OVRDE 0x4000 | |
552 | #define WM8350_BATT_FB_OVRDE 0x2000 | |
553 | ||
554 | ||
555 | /* | |
556 | * R233 (0xE9) - State Machinine Status | |
557 | */ | |
558 | #define WM8350_USB_SM_MASK 0x0700 | |
559 | #define WM8350_USB_SM_SHIFT 8 | |
560 | ||
561 | #define WM8350_USB_SM_100_SLV 1 | |
562 | #define WM8350_USB_SM_500_SLV 5 | |
563 | #define WM8350_USB_SM_STDBY_SLV 7 | |
564 | ||
89b4012b MB |
565 | /* WM8350 wake up conditions */ |
566 | #define WM8350_IRQ_WKUP_OFF_STATE 43 | |
567 | #define WM8350_IRQ_WKUP_HIB_STATE 44 | |
568 | #define WM8350_IRQ_WKUP_CONV_FAULT 45 | |
569 | #define WM8350_IRQ_WKUP_WDOG_RST 46 | |
570 | #define WM8350_IRQ_WKUP_GP_PWR_ON 47 | |
571 | #define WM8350_IRQ_WKUP_ONKEY 48 | |
572 | #define WM8350_IRQ_WKUP_GP_WAKEUP 49 | |
573 | ||
574 | /* wm8350 chip revisions */ | |
575 | #define WM8350_REV_E 0x4 | |
576 | #define WM8350_REV_F 0x5 | |
577 | #define WM8350_REV_G 0x6 | |
0c8a6016 | 578 | #define WM8350_REV_H 0x7 |
89b4012b | 579 | |
ebccec0f MB |
580 | #define WM8350_NUM_IRQ 63 |
581 | ||
89b4012b MB |
582 | struct wm8350_reg_access { |
583 | u16 readable; /* Mask of readable bits */ | |
584 | u16 writable; /* Mask of writable bits */ | |
585 | u16 vol; /* Mask of volatile bits */ | |
586 | }; | |
587 | extern const struct wm8350_reg_access wm8350_reg_io_map[]; | |
588 | extern const u16 wm8350_mode0_defaults[]; | |
589 | extern const u16 wm8350_mode1_defaults[]; | |
590 | extern const u16 wm8350_mode2_defaults[]; | |
591 | extern const u16 wm8350_mode3_defaults[]; | |
592 | ||
593 | struct wm8350; | |
594 | ||
595 | struct wm8350_irq { | |
596 | void (*handler) (struct wm8350 *, int, void *); | |
597 | void *data; | |
598 | }; | |
599 | ||
600 | struct wm8350 { | |
89b4012b MB |
601 | struct device *dev; |
602 | ||
603 | /* device IO */ | |
604 | union { | |
605 | struct i2c_client *i2c_client; | |
606 | struct spi_device *spi_device; | |
607 | }; | |
608 | int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest); | |
609 | int (*write_dev)(struct wm8350 *wm8350, char reg, int size, | |
610 | void *src); | |
611 | u16 *reg_cache; | |
ebccec0f | 612 | |
67488526 MB |
613 | struct mutex auxadc_mutex; |
614 | ||
ebccec0f MB |
615 | /* Interrupt handling */ |
616 | struct work_struct irq_work; | |
617 | struct mutex irq_mutex; /* IRQ table mutex */ | |
618 | struct wm8350_irq irq[WM8350_NUM_IRQ]; | |
619 | int chip_irq; | |
da09155a MB |
620 | |
621 | /* Client devices */ | |
add41cb4 MB |
622 | struct wm8350_codec codec; |
623 | struct wm8350_gpio gpio; | |
da09155a | 624 | struct wm8350_pmic pmic; |
add41cb4 MB |
625 | struct wm8350_power power; |
626 | struct wm8350_rtc rtc; | |
627 | struct wm8350_wdt wdt; | |
89b4012b MB |
628 | }; |
629 | ||
bcdd4efc MB |
630 | /** |
631 | * Data to be supplied by the platform to initialise the WM8350. | |
632 | * | |
633 | * @init: Function called during driver initialisation. Should be | |
634 | * used by the platform to configure GPIO functions and similar. | |
635 | */ | |
636 | struct wm8350_platform_data { | |
637 | int (*init)(struct wm8350 *wm8350); | |
638 | }; | |
639 | ||
640 | ||
89b4012b MB |
641 | /* |
642 | * WM8350 device initialisation and exit. | |
643 | */ | |
ebccec0f | 644 | int wm8350_device_init(struct wm8350 *wm8350, int irq, |
bcdd4efc | 645 | struct wm8350_platform_data *pdata); |
89b4012b MB |
646 | void wm8350_device_exit(struct wm8350 *wm8350); |
647 | ||
648 | /* | |
649 | * WM8350 device IO | |
650 | */ | |
651 | int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask); | |
652 | int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask); | |
653 | u16 wm8350_reg_read(struct wm8350 *wm8350, int reg); | |
654 | int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val); | |
655 | int wm8350_reg_lock(struct wm8350 *wm8350); | |
656 | int wm8350_reg_unlock(struct wm8350 *wm8350); | |
657 | int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest); | |
658 | int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src); | |
659 | ||
ebccec0f MB |
660 | /* |
661 | * WM8350 internal interrupts | |
662 | */ | |
663 | int wm8350_register_irq(struct wm8350 *wm8350, int irq, | |
664 | void (*handler) (struct wm8350 *, int, void *), | |
665 | void *data); | |
666 | int wm8350_free_irq(struct wm8350 *wm8350, int irq); | |
667 | int wm8350_mask_irq(struct wm8350 *wm8350, int irq); | |
668 | int wm8350_unmask_irq(struct wm8350 *wm8350, int irq); | |
669 | ||
670 | ||
89b4012b | 671 | #endif |